media: cx25840: add pin to pad mapping and output format configuration
This commit adds pin to pad mapping and output format configuration support in CX2584x-series chips to cx25840 driver. This functionality is then used to allow disabling ivtv-specific hacks and configuration values (called a "generic mode"), so cx25840 driver can be used for other devices not needing them without risking compatibility problems. Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>alistair/sunxi64-5.4-dsi
Maciej S. Szmigiero
Mauro Carvalho Chehab
parent
763549a3cf
commit
e81a9076b4
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@ -21,6 +21,9 @@
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* CX23888 DIF support for the HVR1850
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* Copyright (C) 2011 Steven Toth <stoth@kernellabs.com>
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*
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* CX2584x pin to pad mapping and output format configuration support are
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* Copyright (C) 2011 Maciej S. Szmigiero <mail@maciej.szmigiero.name>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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@ -316,6 +319,217 @@ static int cx23885_s_io_pin_config(struct v4l2_subdev *sd, size_t n,
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return 0;
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}
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static u8 cx25840_function_to_pad(struct i2c_client *client, u8 function)
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{
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if (function > CX25840_PAD_VRESET) {
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v4l_err(client, "invalid function %u, assuming default\n",
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(unsigned int)function);
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return 0;
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}
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return function;
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}
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static void cx25840_set_invert(u8 *pinctrl3, u8 *voutctrl4, u8 function,
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u8 pin, bool invert)
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{
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switch (function) {
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case CX25840_PAD_IRQ_N:
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if (invert)
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*pinctrl3 &= ~2;
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else
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*pinctrl3 |= 2;
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break;
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case CX25840_PAD_ACTIVE:
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if (invert)
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*voutctrl4 |= BIT(2);
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else
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*voutctrl4 &= ~BIT(2);
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break;
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case CX25840_PAD_VACTIVE:
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if (invert)
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*voutctrl4 |= BIT(5);
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else
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*voutctrl4 &= ~BIT(5);
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break;
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case CX25840_PAD_CBFLAG:
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if (invert)
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*voutctrl4 |= BIT(4);
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else
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*voutctrl4 &= ~BIT(4);
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break;
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case CX25840_PAD_VRESET:
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if (invert)
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*voutctrl4 |= BIT(0);
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else
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*voutctrl4 &= ~BIT(0);
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break;
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}
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if (function != CX25840_PAD_DEFAULT)
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return;
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switch (pin) {
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case CX25840_PIN_DVALID_PRGM0:
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if (invert)
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*voutctrl4 |= BIT(6);
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else
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*voutctrl4 &= ~BIT(6);
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break;
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case CX25840_PIN_HRESET_PRGM2:
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if (invert)
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*voutctrl4 |= BIT(1);
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else
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*voutctrl4 &= ~BIT(1);
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break;
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}
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}
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static int cx25840_s_io_pin_config(struct v4l2_subdev *sd, size_t n,
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struct v4l2_subdev_io_pin_config *p)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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unsigned int i;
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u8 pinctrl[6], pinconf[10], voutctrl4;
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for (i = 0; i < 6; i++)
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pinctrl[i] = cx25840_read(client, 0x114 + i);
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for (i = 0; i < 10; i++)
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pinconf[i] = cx25840_read(client, 0x11c + i);
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voutctrl4 = cx25840_read(client, 0x407);
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for (i = 0; i < n; i++) {
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u8 strength = p[i].strength;
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if (strength != CX25840_PIN_DRIVE_SLOW &&
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strength != CX25840_PIN_DRIVE_MEDIUM &&
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strength != CX25840_PIN_DRIVE_FAST) {
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v4l_err(client,
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"invalid drive speed for pin %u (%u), assuming fast\n",
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(unsigned int)p[i].pin,
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(unsigned int)strength);
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strength = CX25840_PIN_DRIVE_FAST;
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}
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switch (p[i].pin) {
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case CX25840_PIN_DVALID_PRGM0:
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if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_DISABLE))
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pinctrl[0] &= ~BIT(6);
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else
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pinctrl[0] |= BIT(6);
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pinconf[3] &= 0xf0;
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pinconf[3] |= cx25840_function_to_pad(client,
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p[i].function);
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cx25840_set_invert(&pinctrl[3], &voutctrl4,
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p[i].function,
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CX25840_PIN_DVALID_PRGM0,
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p[i].flags &
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BIT(V4L2_SUBDEV_IO_PIN_ACTIVE_LOW));
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pinctrl[4] &= ~(3 << 2); /* CX25840_PIN_DRIVE_MEDIUM */
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switch (strength) {
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case CX25840_PIN_DRIVE_SLOW:
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pinctrl[4] |= 1 << 2;
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break;
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case CX25840_PIN_DRIVE_FAST:
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pinctrl[4] |= 2 << 2;
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break;
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}
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break;
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case CX25840_PIN_HRESET_PRGM2:
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if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_DISABLE))
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pinctrl[1] &= ~BIT(0);
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else
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pinctrl[1] |= BIT(0);
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pinconf[4] &= 0xf0;
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pinconf[4] |= cx25840_function_to_pad(client,
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p[i].function);
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cx25840_set_invert(&pinctrl[3], &voutctrl4,
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p[i].function,
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CX25840_PIN_HRESET_PRGM2,
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p[i].flags &
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BIT(V4L2_SUBDEV_IO_PIN_ACTIVE_LOW));
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pinctrl[4] &= ~(3 << 2); /* CX25840_PIN_DRIVE_MEDIUM */
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switch (strength) {
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case CX25840_PIN_DRIVE_SLOW:
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pinctrl[4] |= 1 << 2;
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break;
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case CX25840_PIN_DRIVE_FAST:
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pinctrl[4] |= 2 << 2;
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break;
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}
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break;
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case CX25840_PIN_PLL_CLK_PRGM7:
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if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_DISABLE))
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pinctrl[2] &= ~BIT(2);
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else
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pinctrl[2] |= BIT(2);
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switch (p[i].function) {
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case CX25840_PAD_XTI_X5_DLL:
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pinconf[6] = 0;
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break;
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case CX25840_PAD_AUX_PLL:
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pinconf[6] = 1;
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break;
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case CX25840_PAD_VID_PLL:
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pinconf[6] = 5;
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break;
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case CX25840_PAD_XTI:
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pinconf[6] = 2;
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break;
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default:
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pinconf[6] = 3;
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pinconf[6] |=
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cx25840_function_to_pad(client,
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p[i].function)
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<< 4;
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}
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break;
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default:
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v4l_err(client, "invalid or unsupported pin %u\n",
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(unsigned int)p[i].pin);
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break;
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}
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}
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cx25840_write(client, 0x407, voutctrl4);
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for (i = 0; i < 6; i++)
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cx25840_write(client, 0x114 + i, pinctrl[i]);
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for (i = 0; i < 10; i++)
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cx25840_write(client, 0x11c + i, pinconf[i]);
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return 0;
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}
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static int common_s_io_pin_config(struct v4l2_subdev *sd, size_t n,
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struct v4l2_subdev_io_pin_config *pincfg)
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{
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@ -323,6 +537,8 @@ static int common_s_io_pin_config(struct v4l2_subdev *sd, size_t n,
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if (is_cx2388x(state))
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return cx23885_s_io_pin_config(sd, n, pincfg);
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else if (is_cx2584x(state))
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return cx25840_s_io_pin_config(sd, n, pincfg);
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return 0;
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}
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@ -389,6 +605,91 @@ static void cx25840_work_handler(struct work_struct *work)
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wake_up(&state->fw_wait);
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}
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#define CX25840_VCONFIG_SET_BIT(state, opt_msk, voc, idx, bit, oneval) \
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do { \
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if ((state)->vid_config & (opt_msk)) { \
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if (((state)->vid_config & (opt_msk)) == \
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(oneval)) \
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(voc)[idx] |= BIT(bit); \
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else \
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(voc)[idx] &= ~BIT(bit); \
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} \
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} while (0)
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/* apply current vconfig to hardware regs */
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static void cx25840_vconfig_apply(struct i2c_client *client)
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{
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struct cx25840_state *state = to_state(i2c_get_clientdata(client));
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u8 voutctrl[3];
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unsigned int i;
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for (i = 0; i < 3; i++)
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voutctrl[i] = cx25840_read(client, 0x404 + i);
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if (state->vid_config & CX25840_VCONFIG_FMT_MASK)
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voutctrl[0] &= ~3;
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switch (state->vid_config & CX25840_VCONFIG_FMT_MASK) {
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case CX25840_VCONFIG_FMT_BT656:
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voutctrl[0] |= 1;
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break;
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case CX25840_VCONFIG_FMT_VIP11:
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voutctrl[0] |= 2;
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break;
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case CX25840_VCONFIG_FMT_VIP2:
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voutctrl[0] |= 3;
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break;
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case CX25840_VCONFIG_FMT_BT601:
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/* zero */
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default:
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break;
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}
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_RES_MASK, voutctrl,
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0, 2, CX25840_VCONFIG_RES_10BIT);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_VBIRAW_MASK, voutctrl,
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0, 3, CX25840_VCONFIG_VBIRAW_ENABLED);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_ANCDATA_MASK, voutctrl,
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0, 4, CX25840_VCONFIG_ANCDATA_ENABLED);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_TASKBIT_MASK, voutctrl,
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0, 5, CX25840_VCONFIG_TASKBIT_ONE);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_ACTIVE_MASK, voutctrl,
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1, 2, CX25840_VCONFIG_ACTIVE_HORIZONTAL);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_VALID_MASK, voutctrl,
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1, 3, CX25840_VCONFIG_VALID_ANDACTIVE);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_HRESETW_MASK, voutctrl,
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1, 4, CX25840_VCONFIG_HRESETW_PIXCLK);
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if (state->vid_config & CX25840_VCONFIG_CLKGATE_MASK)
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voutctrl[1] &= ~(3 << 6);
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switch (state->vid_config & CX25840_VCONFIG_CLKGATE_MASK) {
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case CX25840_VCONFIG_CLKGATE_VALID:
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voutctrl[1] |= 2;
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break;
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case CX25840_VCONFIG_CLKGATE_VALIDACTIVE:
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voutctrl[1] |= 3;
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break;
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case CX25840_VCONFIG_CLKGATE_NONE:
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/* zero */
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default:
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break;
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}
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_DCMODE_MASK, voutctrl,
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2, 0, CX25840_VCONFIG_DCMODE_BYTES);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_IDID0S_MASK, voutctrl,
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2, 1, CX25840_VCONFIG_IDID0S_LINECNT);
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CX25840_VCONFIG_SET_BIT(state, CX25840_VCONFIG_VIPCLAMP_MASK, voutctrl,
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2, 4, CX25840_VCONFIG_VIPCLAMP_ENABLED);
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for (i = 0; i < 3; i++)
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cx25840_write(client, 0x404 + i, voutctrl[i]);
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}
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static void cx25840_initialize(struct i2c_client *client)
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{
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DEFINE_WAIT(wait);
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@ -455,6 +756,9 @@ static void cx25840_initialize(struct i2c_client *client)
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/* (re)set input */
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set_input(client, state->vid_input, state->aud_input);
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if (state->generic_mode)
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cx25840_vconfig_apply(client);
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/* start microcontroller */
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cx25840_and_or(client, 0x803, ~0x10, 0x10);
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}
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@ -809,13 +1113,20 @@ void cx25840_std_setup(struct i2c_client *client)
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else
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cx25840_write(client, 0x49f, 0x14);
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/* generic mode uses the values that the chip autoconfig would set */
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if (std & V4L2_STD_625_50) {
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hblank = 132;
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hactive = 720;
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burst = 93;
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vblank = 36;
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vactive = 580;
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vblank656 = 40;
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if (state->generic_mode) {
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vblank = 34;
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vactive = 576;
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vblank656 = 38;
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} else {
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vblank = 36;
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vactive = 580;
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vblank656 = 40;
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}
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src_decimation = 0x21f;
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luma_lpf = 2;
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@ -824,6 +1135,10 @@ void cx25840_std_setup(struct i2c_client *client)
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comb = 0;
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sc = 0x0a425f;
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} else if (std == V4L2_STD_PAL_Nc) {
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if (state->generic_mode) {
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burst = 95;
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luma_lpf = 1;
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}
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uv_lpf = 1;
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comb = 0x20;
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sc = 556453;
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@ -838,12 +1153,19 @@ void cx25840_std_setup(struct i2c_client *client)
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vactive = 487;
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luma_lpf = 1;
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uv_lpf = 1;
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if (state->generic_mode) {
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vblank = 20;
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vblank656 = 24;
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}
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src_decimation = 0x21f;
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if (std == V4L2_STD_PAL_60) {
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vblank = 26;
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vblank656 = 26;
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burst = 0x5b;
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if (!state->generic_mode) {
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vblank = 26;
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vblank656 = 26;
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burst = 0x5b;
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} else
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burst = 0x59;
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luma_lpf = 2;
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comb = 0x20;
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sc = 688739;
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@ -854,8 +1176,10 @@ void cx25840_std_setup(struct i2c_client *client)
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comb = 0x20;
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sc = 555452;
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} else {
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vblank = 26;
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vblank656 = 26;
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if (!state->generic_mode) {
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vblank = 26;
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vblank656 = 26;
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}
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burst = 0x5b;
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comb = 0x66;
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sc = 556063;
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@ -1403,7 +1727,9 @@ static int cx25840_set_fmt(struct v4l2_subdev *sd,
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Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
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}
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Vlines = fmt->height + (is_50Hz ? 4 : 7);
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Vlines = fmt->height;
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if (!state->generic_mode)
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Vlines += is_50Hz ? 4 : 7;
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/*
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* We keep 1 margin for the Vsrc < Vlines check since the
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@ -1647,8 +1973,71 @@ static void log_audio_status(struct i2c_client *client)
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}
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}
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#define CX25840_VCONFIG_OPTION(state, cfg_in, opt_msk) \
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do { \
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if ((cfg_in) & (opt_msk)) { \
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(state)->vid_config &= ~(opt_msk); \
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(state)->vid_config |= (cfg_in) & (opt_msk); \
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} \
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} while (0)
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/* apply incoming options to the current vconfig */
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static void cx25840_vconfig_add(struct cx25840_state *state, u32 cfg_in)
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{
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_FMT_MASK);
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_RES_MASK);
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_VBIRAW_MASK);
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_ANCDATA_MASK);
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_TASKBIT_MASK);
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_ACTIVE_MASK);
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_VALID_MASK);
|
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CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_HRESETW_MASK);
|
||||
CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_CLKGATE_MASK);
|
||||
CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_DCMODE_MASK);
|
||||
CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_IDID0S_MASK);
|
||||
CX25840_VCONFIG_OPTION(state, cfg_in, CX25840_VCONFIG_VIPCLAMP_MASK);
|
||||
}
|
||||
|
||||
/* ----------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* Initializes the device in the generic mode.
|
||||
* For cx2584x chips also adds additional video output settings provided
|
||||
* in @val parameter (CX25840_VCONFIG_*).
|
||||
*
|
||||
* The generic mode disables some of the ivtv-related hacks in this driver.
|
||||
* For cx2584x chips it also enables setting video output configuration while
|
||||
* setting it according to datasheet defaults by default.
|
||||
*/
|
||||
static int cx25840_init(struct v4l2_subdev *sd, u32 val)
|
||||
{
|
||||
struct cx25840_state *state = to_state(sd);
|
||||
|
||||
state->generic_mode = true;
|
||||
|
||||
if (is_cx2584x(state)) {
|
||||
/* set datasheet video output defaults */
|
||||
state->vid_config = CX25840_VCONFIG_FMT_BT656 |
|
||||
CX25840_VCONFIG_RES_8BIT |
|
||||
CX25840_VCONFIG_VBIRAW_DISABLED |
|
||||
CX25840_VCONFIG_ANCDATA_ENABLED |
|
||||
CX25840_VCONFIG_TASKBIT_ONE |
|
||||
CX25840_VCONFIG_ACTIVE_HORIZONTAL |
|
||||
CX25840_VCONFIG_VALID_NORMAL |
|
||||
CX25840_VCONFIG_HRESETW_NORMAL |
|
||||
CX25840_VCONFIG_CLKGATE_NONE |
|
||||
CX25840_VCONFIG_DCMODE_DWORDS |
|
||||
CX25840_VCONFIG_IDID0S_NORMAL |
|
||||
CX25840_VCONFIG_VIPCLAMP_DISABLED;
|
||||
|
||||
/* add additional settings */
|
||||
cx25840_vconfig_add(state, val);
|
||||
} else /* TODO: generic mode needs to be developed for other chips */
|
||||
WARN_ON(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
|
||||
{
|
||||
struct cx25840_state *state = to_state(sd);
|
||||
|
|
@ -1860,6 +2249,11 @@ static int cx25840_s_video_routing(struct v4l2_subdev *sd,
|
|||
if (is_cx23888(state))
|
||||
cx23888_std_setup(client);
|
||||
|
||||
if (is_cx2584x(state) && state->generic_mode && config) {
|
||||
cx25840_vconfig_add(state, config);
|
||||
cx25840_vconfig_apply(client);
|
||||
}
|
||||
|
||||
return set_input(client, input, state->aud_input);
|
||||
}
|
||||
|
||||
|
|
@ -5067,6 +5461,8 @@ static const struct v4l2_ctrl_ops cx25840_ctrl_ops = {
|
|||
static const struct v4l2_subdev_core_ops cx25840_core_ops = {
|
||||
.log_status = cx25840_log_status,
|
||||
.reset = cx25840_reset,
|
||||
/* calling the (optional) init op will turn on the generic mode */
|
||||
.init = cx25840_init,
|
||||
.load_fw = cx25840_load_fw,
|
||||
.s_io_pin_config = common_s_io_pin_config,
|
||||
#ifdef CONFIG_VIDEO_ADV_DEBUG
|
||||
|
|
|
|||
|
|
@ -53,10 +53,15 @@ enum cx25840_media_pads {
|
|||
* @mute: audio mute V4L2 control (non-cx2583x devices only)
|
||||
* @pvr150_workaround: whether we enable workaround for Hauppauge PVR150
|
||||
* hardware bug (audio dropping out)
|
||||
* @generic_mode: whether we disable ivtv-specific hacks
|
||||
* this mode gets turned on when the bridge driver calls
|
||||
* cx25840 subdevice init core op
|
||||
* @radio: set if we are currently in the radio mode, otherwise
|
||||
* the current mode is non-radio (that is, video)
|
||||
* @std: currently set video standard
|
||||
* @vid_input: currently set video input
|
||||
* @vid_config: currently set video output configuration
|
||||
* only used in the generic mode
|
||||
* @aud_input: currently set audio input
|
||||
* @audclk_freq: currently set audio sample rate
|
||||
* @audmode: currently set audio mode (when in non-radio mode)
|
||||
|
|
@ -83,9 +88,11 @@ struct cx25840_state {
|
|||
struct v4l2_ctrl *mute;
|
||||
};
|
||||
int pvr150_workaround;
|
||||
bool generic_mode;
|
||||
int radio;
|
||||
v4l2_std_id std;
|
||||
enum cx25840_video_input vid_input;
|
||||
u32 vid_config;
|
||||
enum cx25840_audio_input aud_input;
|
||||
u32 audclk_freq;
|
||||
int audmode;
|
||||
|
|
@ -118,6 +125,14 @@ static inline bool is_cx2583x(struct cx25840_state *state)
|
|||
state->id == CX25837;
|
||||
}
|
||||
|
||||
static inline bool is_cx2584x(struct cx25840_state *state)
|
||||
{
|
||||
return state->id == CX25840 ||
|
||||
state->id == CX25841 ||
|
||||
state->id == CX25842 ||
|
||||
state->id == CX25843;
|
||||
}
|
||||
|
||||
static inline bool is_cx231xx(struct cx25840_state *state)
|
||||
{
|
||||
return state->id == CX2310X_AV;
|
||||
|
|
|
|||
|
|
@ -95,6 +95,7 @@ int cx25840_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *
|
|||
memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
|
||||
svbi->service_set = 0;
|
||||
/* we're done if raw VBI is active */
|
||||
/* TODO: this will have to be changed for generic_mode VBI */
|
||||
if ((cx25840_read(client, 0x404) & 0x10) == 0)
|
||||
return 0;
|
||||
|
||||
|
|
@ -137,6 +138,7 @@ int cx25840_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
|
|||
cx25840_write(client, 0x54f, vbi_offset);
|
||||
else
|
||||
cx25840_write(client, 0x47f, vbi_offset);
|
||||
/* TODO: this will have to be changed for generic_mode VBI */
|
||||
cx25840_write(client, 0x404, 0x2e);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -157,6 +159,7 @@ int cx25840_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *
|
|||
cx25840_std_setup(client);
|
||||
|
||||
/* Sliced VBI */
|
||||
/* TODO: this will have to be changed for generic_mode VBI */
|
||||
cx25840_write(client, 0x404, 0x32); /* Ancillary data */
|
||||
cx25840_write(client, 0x406, 0x13);
|
||||
if (is_cx23888(state))
|
||||
|
|
@ -211,6 +214,7 @@ int cx25840_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *
|
|||
}
|
||||
|
||||
cx25840_write(client, state->vbi_regs_offset + 0x43c, 0x16);
|
||||
/* TODO: this will have to be changed for generic_mode VBI */
|
||||
if (is_cx23888(state))
|
||||
cx25840_write(client, 0x428, is_pal ? 0x2a : 0x22);
|
||||
else
|
||||
|
|
|
|||
|
|
@ -82,6 +82,81 @@ enum cx25840_video_input {
|
|||
CX25840_DIF_ON = 0x80000400,
|
||||
};
|
||||
|
||||
/*
|
||||
* The defines below are used to set the chip video output settings
|
||||
* in the generic mode that can be enabled by calling the subdevice
|
||||
* init core op.
|
||||
*
|
||||
* The requested settings can be passed to the init core op as
|
||||
* @val parameter and to the s_routing video op as @config parameter.
|
||||
*
|
||||
* For details please refer to the section 3.7 Video Output Formatting and
|
||||
* to Video Out Control 1 to 4 registers in the section 5.6 Video Decoder Core
|
||||
* of the chip datasheet.
|
||||
*/
|
||||
#define CX25840_VCONFIG_FMT_SHIFT 0
|
||||
#define CX25840_VCONFIG_FMT_MASK GENMASK(2, 0)
|
||||
#define CX25840_VCONFIG_FMT_BT601 BIT(0)
|
||||
#define CX25840_VCONFIG_FMT_BT656 BIT(1)
|
||||
#define CX25840_VCONFIG_FMT_VIP11 GENMASK(1, 0)
|
||||
#define CX25840_VCONFIG_FMT_VIP2 BIT(2)
|
||||
|
||||
#define CX25840_VCONFIG_RES_SHIFT 3
|
||||
#define CX25840_VCONFIG_RES_MASK GENMASK(4, 3)
|
||||
#define CX25840_VCONFIG_RES_8BIT BIT(3)
|
||||
#define CX25840_VCONFIG_RES_10BIT BIT(4)
|
||||
|
||||
#define CX25840_VCONFIG_VBIRAW_SHIFT 5
|
||||
#define CX25840_VCONFIG_VBIRAW_MASK GENMASK(6, 5)
|
||||
#define CX25840_VCONFIG_VBIRAW_DISABLED BIT(5)
|
||||
#define CX25840_VCONFIG_VBIRAW_ENABLED BIT(6)
|
||||
|
||||
#define CX25840_VCONFIG_ANCDATA_SHIFT 7
|
||||
#define CX25840_VCONFIG_ANCDATA_MASK GENMASK(8, 7)
|
||||
#define CX25840_VCONFIG_ANCDATA_DISABLED BIT(7)
|
||||
#define CX25840_VCONFIG_ANCDATA_ENABLED BIT(8)
|
||||
|
||||
#define CX25840_VCONFIG_TASKBIT_SHIFT 9
|
||||
#define CX25840_VCONFIG_TASKBIT_MASK GENMASK(10, 9)
|
||||
#define CX25840_VCONFIG_TASKBIT_ZERO BIT(9)
|
||||
#define CX25840_VCONFIG_TASKBIT_ONE BIT(10)
|
||||
|
||||
#define CX25840_VCONFIG_ACTIVE_SHIFT 11
|
||||
#define CX25840_VCONFIG_ACTIVE_MASK GENMASK(12, 11)
|
||||
#define CX25840_VCONFIG_ACTIVE_COMPOSITE BIT(11)
|
||||
#define CX25840_VCONFIG_ACTIVE_HORIZONTAL BIT(12)
|
||||
|
||||
#define CX25840_VCONFIG_VALID_SHIFT 13
|
||||
#define CX25840_VCONFIG_VALID_MASK GENMASK(14, 13)
|
||||
#define CX25840_VCONFIG_VALID_NORMAL BIT(13)
|
||||
#define CX25840_VCONFIG_VALID_ANDACTIVE BIT(14)
|
||||
|
||||
#define CX25840_VCONFIG_HRESETW_SHIFT 15
|
||||
#define CX25840_VCONFIG_HRESETW_MASK GENMASK(16, 15)
|
||||
#define CX25840_VCONFIG_HRESETW_NORMAL BIT(15)
|
||||
#define CX25840_VCONFIG_HRESETW_PIXCLK BIT(16)
|
||||
|
||||
#define CX25840_VCONFIG_CLKGATE_SHIFT 17
|
||||
#define CX25840_VCONFIG_CLKGATE_MASK GENMASK(18, 17)
|
||||
#define CX25840_VCONFIG_CLKGATE_NONE BIT(17)
|
||||
#define CX25840_VCONFIG_CLKGATE_VALID BIT(18)
|
||||
#define CX25840_VCONFIG_CLKGATE_VALIDACTIVE GENMASK(18, 17)
|
||||
|
||||
#define CX25840_VCONFIG_DCMODE_SHIFT 19
|
||||
#define CX25840_VCONFIG_DCMODE_MASK GENMASK(20, 19)
|
||||
#define CX25840_VCONFIG_DCMODE_DWORDS BIT(19)
|
||||
#define CX25840_VCONFIG_DCMODE_BYTES BIT(20)
|
||||
|
||||
#define CX25840_VCONFIG_IDID0S_SHIFT 21
|
||||
#define CX25840_VCONFIG_IDID0S_MASK GENMASK(22, 21)
|
||||
#define CX25840_VCONFIG_IDID0S_NORMAL BIT(21)
|
||||
#define CX25840_VCONFIG_IDID0S_LINECNT BIT(22)
|
||||
|
||||
#define CX25840_VCONFIG_VIPCLAMP_SHIFT 23
|
||||
#define CX25840_VCONFIG_VIPCLAMP_MASK GENMASK(24, 23)
|
||||
#define CX25840_VCONFIG_VIPCLAMP_ENABLED BIT(23)
|
||||
#define CX25840_VCONFIG_VIPCLAMP_DISABLED BIT(24)
|
||||
|
||||
enum cx25840_audio_input {
|
||||
/* Audio inputs: serial or In4-In8 */
|
||||
CX25840_AUDIO_SERIAL,
|
||||
|
|
@ -109,7 +184,7 @@ enum cx25840_io_pin {
|
|||
};
|
||||
|
||||
enum cx25840_io_pad {
|
||||
/* Output pads */
|
||||
/* Output pads, these must match the actual chip register values */
|
||||
CX25840_PAD_DEFAULT = 0,
|
||||
CX25840_PAD_ACTIVE,
|
||||
CX25840_PAD_VACTIVE,
|
||||
|
|
|
|||
Loading…
Reference in New Issue