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EDAC, altera: Add Arria10 DMA support 

Add Altera Arria10 DMA FIFO memory support.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1468512408-5156-7-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
hifive-unleashed-5.1
Thor Thayer 2016-07-28 10:03:57 +02:00 committed by Borislav Petkov
parent c6882fb2e8
commit e8263793b7
2 changed files with 39 additions and 1 deletions
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7
drivers/edac/Kconfig
View File

@ -405,6 +405,13 @@ config EDAC_ALTERA_NAND
Support for error detection and correction on the
Altera NAND FIFO Memory for Altera SoCs.
config EDAC_ALTERA_DMA
bool "Altera DMA FIFO ECC"
depends on EDAC_ALTERA=y && PL330_DMA=y
help
Support for error detection and correction on the
Altera DMA FIFO Memory for Altera SoCs.
config EDAC_SYNOPSYS
tristate "Synopsys DDR Memory Controller"
depends on EDAC_MM_EDAC && ARCH_ZYNQ

33
drivers/edac/altera_edac.c
View File

@ -1312,6 +1312,33 @@ early_initcall(socfpga_init_nand_ecc);
#endif /* CONFIG_EDAC_ALTERA_NAND */
/********************** DMA Device Functions **********************/
#ifdef CONFIG_EDAC_ALTERA_DMA
static const struct edac_device_prv_data a10_dmaecc_data = {
.setup = altr_check_ecc_deps,
.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
.dbgfs_name = "altr_trigger",
.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
.ce_set_mask = ALTR_A10_ECC_TSERRA,
.ue_set_mask = ALTR_A10_ECC_TDERRA,
.set_err_ofst = ALTR_A10_ECC_INTTEST_OFST,
.ecc_irq_handler = altr_edac_a10_ecc_irq,
.inject_fops = &altr_edac_a10_device_inject_fops,
};
static int __init socfpga_init_dma_ecc(void)
{
return altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc");
}
early_initcall(socfpga_init_dma_ecc);
#endif /* CONFIG_EDAC_ALTERA_DMA */
/********************* Arria10 EDAC Device Functions *************************/
static const struct of_device_id altr_edac_a10_device_of_match[] = {
#ifdef CONFIG_EDAC_ALTERA_L2C
@ -1327,6 +1354,9 @@ static const struct of_device_id altr_edac_a10_device_of_match[] = {
#endif
#ifdef CONFIG_EDAC_ALTERA_NAND
{ .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data },
#endif
#ifdef CONFIG_EDAC_ALTERA_DMA
{ .compatible = "altr,socfpga-dma-ecc", .data = &a10_dmaecc_data },
#endif
{},
};
@ -1618,7 +1648,8 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") ||
of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") ||
of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") ||
of_device_is_compatible(child, "altr,socfpga-nand-ecc"))
of_device_is_compatible(child, "altr,socfpga-nand-ecc") ||
of_device_is_compatible(child, "altr,socfpga-dma-ecc"))
altr_edac_a10_device_add(edac, child);