drm/nv50-: prepare for attaching a SOR to multiple heads
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -74,7 +74,7 @@ struct nouveau_crtc {
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static inline struct nouveau_crtc *nouveau_crtc(struct drm_crtc *crtc)
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{
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return container_of(crtc, struct nouveau_crtc, base);
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return crtc ? container_of(crtc, struct nouveau_crtc, base) : NULL;
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}
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static inline struct drm_crtc *to_drm_crtc(struct nouveau_crtc *crtc)
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@ -46,6 +46,7 @@ struct nouveau_encoder {
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/* different to drm_encoder.crtc, this reflects what's
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* actually programmed on the hw, not the proposed crtc */
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struct drm_crtc *crtc;
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u32 ctrl;
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struct drm_display_mode mode;
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int last_dpms;
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@ -1701,10 +1701,9 @@ nv50_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
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}
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static void
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nv50_hdmi_disconnect(struct drm_encoder *encoder)
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nv50_hdmi_disconnect(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
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struct nv50_disp *disp = nv50_disp(encoder->dev);
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const u32 moff = (nv_crtc->index << 3) | nv_encoder->or;
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@ -1774,34 +1773,37 @@ nv50_sor_mode_fixup(struct drm_encoder *encoder,
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return true;
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}
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static void
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nv50_sor_ctrl(struct nouveau_encoder *nv_encoder, u32 mask, u32 data)
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{
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struct nv50_mast *mast = nv50_mast(nv_encoder->base.base.dev);
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u32 temp = (nv_encoder->ctrl & ~mask) | (data & mask), *push;
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if (temp != nv_encoder->ctrl && (push = evo_wait(mast, 2))) {
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if (nv50_vers(mast) < NVD0_DISP_MAST_CLASS) {
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evo_mthd(push, 0x0600 + (nv_encoder->or * 0x40), 1);
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evo_data(push, (nv_encoder->ctrl = temp));
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} else {
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evo_mthd(push, 0x0200 + (nv_encoder->or * 0x20), 1);
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evo_data(push, (nv_encoder->ctrl = temp));
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}
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evo_kick(push, mast);
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}
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}
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static void
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nv50_sor_disconnect(struct drm_encoder *encoder)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nv50_mast *mast = nv50_mast(encoder->dev);
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const int or = nv_encoder->or;
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u32 *push;
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if (nv_encoder->crtc) {
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nv50_crtc_prepare(nv_encoder->crtc);
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push = evo_wait(mast, 4);
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if (push) {
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if (nv50_vers(mast) < NVD0_DISP_MAST_CLASS) {
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evo_mthd(push, 0x0600 + (or * 0x40), 1);
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evo_data(push, 0x00000000);
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} else {
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evo_mthd(push, 0x0200 + (or * 0x20), 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, mast);
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}
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nv50_hdmi_disconnect(encoder);
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}
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struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
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nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
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nv_encoder->crtc = NULL;
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if (nv_crtc) {
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nv50_crtc_prepare(&nv_crtc->base);
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nv50_sor_ctrl(nv_encoder, 1 << nv_crtc->index, 0);
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nv50_hdmi_disconnect(&nv_encoder->base.base, nv_crtc);
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}
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}
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static void
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@ -1821,12 +1823,14 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
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struct nouveau_connector *nv_connector;
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struct nvbios *bios = &drm->vbios;
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u32 *push, lvds = 0;
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u32 lvds = 0, mask, ctrl;
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u8 owner = 1 << nv_crtc->index;
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u8 proto = 0xf;
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u8 depth = 0x0;
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nv_connector = nouveau_encoder_connector_get(nv_encoder);
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nv_encoder->crtc = encoder->crtc;
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switch (nv_encoder->dcb->type) {
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case DCB_OUTPUT_TMDS:
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if (nv_encoder->dcb->sorconf.link & 1) {
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@ -1838,7 +1842,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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proto = 0x2;
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}
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nv50_hdmi_mode_set(encoder, mode);
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nv50_hdmi_mode_set(&nv_encoder->base.base, mode);
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break;
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case DCB_OUTPUT_LVDS:
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proto = 0x0;
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@ -1894,19 +1898,11 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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break;
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}
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nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
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nv50_sor_dpms(&nv_encoder->base.base, DRM_MODE_DPMS_ON);
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push = evo_wait(nv50_mast(dev), 8);
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if (push) {
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if (nv50_vers(mast) < NVD0_DISP_CLASS) {
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u32 ctrl = (depth << 16) | (proto << 8) | owner;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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ctrl |= 0x00001000;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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ctrl |= 0x00002000;
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evo_mthd(push, 0x0600 + (nv_encoder->or * 0x040), 1);
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evo_data(push, ctrl);
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} else {
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if (nv50_vers(mast) >= NVD0_DISP_CLASS) {
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u32 *push = evo_wait(mast, 3);
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if (push) {
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u32 magic = 0x31ec6000 | (nv_crtc->index << 25);
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u32 syncs = 0x00000001;
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@ -1921,14 +1917,21 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2);
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evo_data(push, syncs | (depth << 6));
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evo_data(push, magic);
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evo_mthd(push, 0x0200 + (nv_encoder->or * 0x020), 1);
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evo_data(push, owner | (proto << 8));
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evo_kick(push, mast);
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}
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evo_kick(push, mast);
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ctrl = proto << 8;
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mask = 0x00000f00;
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} else {
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ctrl = (depth << 16) | (proto << 8);
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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ctrl |= 0x00001000;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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ctrl |= 0x00002000;
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mask = 0x000f3f00;
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}
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nv_encoder->crtc = encoder->crtc;
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nv50_sor_ctrl(nv_encoder, mask | owner, ctrl | owner);
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}
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static void
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