ASoC: tlv312aic23: unbreak resume
* commit f9dfbf9
"ASoC: tlv320aic23: convert to soc-cache" leads to
a bug preventing resumeof the codec as regmap expects a 9 bits data
register but 0xFFFF is passed in tlv320aic23_set_bias_level and this
values gets cached preventing any write to the TLV320AIC23_PWR
register as the final value produced by regmap is (register << 9) | value
* this patch solves the problem by only working on the 9 bits the
register contains.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
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parent
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@ -472,7 +472,7 @@ static int tlv320aic23_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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static int tlv320aic23_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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u16 reg = snd_soc_read(codec, TLV320AIC23_PWR) & 0xff7f;
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u16 reg = snd_soc_read(codec, TLV320AIC23_PWR) & 0x17f;
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switch (level) {
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case SND_SOC_BIAS_ON:
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@ -491,7 +491,7 @@ static int tlv320aic23_set_bias_level(struct snd_soc_codec *codec,
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case SND_SOC_BIAS_OFF:
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/* everything off, dac mute, inactive */
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snd_soc_write(codec, TLV320AIC23_ACTIVE, 0x0);
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snd_soc_write(codec, TLV320AIC23_PWR, 0xffff);
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snd_soc_write(codec, TLV320AIC23_PWR, 0x1ff);
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break;
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}
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codec->dapm.bias_level = level;
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