ARM: bcmring: convert to use sp804 clockevents
bcmring has a set of four sp804 timers incorporated, yet it has its own copy of the sp804 code. Convert its clockevent implementation to the standard sp804 support code. Cc: Jiandong Zheng <jdzheng@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>hifive-unleashed-5.1
Russell King
parent
82d63734ea
commit
e8765afe54
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@ -28,8 +28,6 @@
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/amba/bus.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/clkdev.h>
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#include <mach/csp/mm_addr.h>
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@ -113,8 +111,8 @@ static struct clk dummy_apb_pclk = {
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#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000)
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#endif
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static struct clk sp804_timer1_clk = {
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.name = "sp804-timer-1",
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static struct clk sp804_timer012_clk = {
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.name = "sp804-timer-0,1,2",
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.type = CLK_TYPE_PRIMARY,
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.mode = CLK_MODE_XTAL,
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.rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
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@ -137,10 +135,14 @@ static struct clk_lookup lookups[] = {
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}, { /* UART1 */
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.dev_id = "uartb",
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.clk = &uart_clk,
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}, { /* SP804 timer 0 */
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.dev_id = "sp804",
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.con_id = "timer0",
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.clk = &sp804_timer012_clk,
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}, { /* SP804 timer 1 */
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.dev_id = "sp804",
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.con_id = "timer1",
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.clk = &sp804_timer1_clk,
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.clk = &sp804_timer012_clk,
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}, { /* SP804 timer 3 */
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.dev_id = "sp804",
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.con_id = "timer3",
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@ -203,100 +205,6 @@ void __init bcmring_amba_init(void)
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#define TIMER2_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x40))
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#define TIMER3_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x60))
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#define TICKS_PER_uSEC TIMER0_FREQUENCY_MHZ
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/*
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* These are useconds NOT ticks.
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*
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*/
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#define mSEC_1 1000
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#define mSEC_10 (mSEC_1 * 10)
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/*
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* How long is the timer interval?
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*/
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#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
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#if TIMER_INTERVAL >= 0x100000
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#define TIMER_RELOAD (TIMER_INTERVAL >> 8)
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#define TIMER_DIVISOR (TIMER_CTRL_DIV256)
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#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
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#elif TIMER_INTERVAL >= 0x10000
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#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */
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#define TIMER_DIVISOR (TIMER_CTRL_DIV16)
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#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
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#else
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#define TIMER_RELOAD (TIMER_INTERVAL)
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#define TIMER_DIVISOR (TIMER_CTRL_DIV1)
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#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
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#endif
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static void timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *clk)
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{
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unsigned long ctrl;
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
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ctrl = TIMER_CTRL_PERIODIC;
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ctrl |=
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TIMER_DIVISOR | TIMER_CTRL_32BIT | TIMER_CTRL_IE |
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TIMER_CTRL_ENABLE;
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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/* period set, and timer enabled in 'next_event' hook */
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ctrl = TIMER_CTRL_ONESHOT;
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ctrl |= TIMER_DIVISOR | TIMER_CTRL_32BIT | TIMER_CTRL_IE;
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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default:
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ctrl = 0;
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}
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writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL);
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}
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static int timer_set_next_event(unsigned long evt,
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struct clock_event_device *unused)
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{
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unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL);
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writel(evt, TIMER0_VA_BASE + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL);
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return 0;
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}
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static struct clock_event_device timer0_clockevent = {
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.name = "timer0",
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.shift = 32,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = timer_set_mode,
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.set_next_event = timer_set_next_event,
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};
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t bcmring_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &timer0_clockevent;
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writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction bcmring_timer_irq = {
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.name = "bcmring Timer Tick",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = bcmring_timer_interrupt,
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};
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static int __init bcmring_clocksource_init(void)
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{
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/* setup timer1 as free-running clocksource */
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@ -325,19 +233,9 @@ void __init bcmring_init_timer(void)
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/*
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* Make irqs happen for the system timer
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*/
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setup_irq(IRQ_TIMER0, &bcmring_timer_irq);
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bcmring_clocksource_init();
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timer0_clockevent.mult =
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div_sc(1000000, NSEC_PER_SEC, timer0_clockevent.shift);
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timer0_clockevent.max_delta_ns =
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clockevent_delta2ns(0xffffffff, &timer0_clockevent);
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timer0_clockevent.min_delta_ns =
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clockevent_delta2ns(0xf, &timer0_clockevent);
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timer0_clockevent.cpumask = cpumask_of(0);
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clockevents_register_device(&timer0_clockevent);
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sp804_clockevents_register(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
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}
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struct sys_timer bcmring_timer = {
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