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ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset 

The DBGVCR, used for configuring vector catch debug events, is UNKNOWN
out of reset on ARMv7. When enabling monitor mode, this must be zeroed
to avoid UNPREDICTABLE behaviour.

This patch adds the zeroing code to the debug reset path.

Cc: stable <stable@kernel.org>
Reported-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
hifive-unleashed-5.1
Will Deacon 2011-04-05 13:57:53 +01:00 committed by Russell King
parent 6a7861825f
commit e89c0d7090
1 changed files with 7 additions and 0 deletions
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7
arch/arm/kernel/hw_breakpoint.c
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@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info)
*/
asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0));
isb();
/*
* Clear any configured vector-catch events before
* enabling monitor mode.
*/
asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0));
isb();
}
if (enable_monitor_mode())