mfd: Add support for twl6030 irq framework
This patch adds support for phoenix interrupt framework. New iInterrupt status register A, B, C are introduced in Phoenix and are cleared on write. Due to the differences in interrupt handling with respect to TWL4030, twl6030-irq.c is created for TWL6030 PMIC Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>hifive-unleashed-5.1
Balaji T K
Samuel Ortiz
parent
c4aa6f3143
commit
e8deb28ca8
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@ -472,8 +472,22 @@
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#endif
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#define TWL4030_GPIO_IRQ_END (TWL4030_GPIO_IRQ_BASE + TWL4030_GPIO_NR_IRQS)
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#define TWL6030_IRQ_BASE (OMAP_FPGA_IRQ_END)
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#ifdef CONFIG_TWL4030_CORE
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#define TWL6030_BASE_NR_IRQS 20
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#else
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#define TWL6030_BASE_NR_IRQS 0
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#endif
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#define TWL6030_IRQ_END (TWL6030_IRQ_BASE + TWL6030_BASE_NR_IRQS)
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/* Total number of interrupts depends on the enabled blocks above */
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#define NR_IRQS TWL4030_GPIO_IRQ_END
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#if (TWL4030_GPIO_IRQ_END > TWL6030_IRQ_END)
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#define TWL_IRQ_END TWL4030_GPIO_IRQ_END
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#else
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#define TWL_IRQ_END TWL6030_IRQ_END
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#endif
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#define NR_IRQS TWL_IRQ_END
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#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
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@ -103,10 +103,10 @@ config MENELAUS
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cell phones and PDAs.
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config TWL4030_CORE
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bool "Texas Instruments TWL4030/TPS659x0 Support"
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bool "Texas Instruments TWL4030/TWL5030/TWL6030/TPS659x0 Support"
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depends on I2C=y && GENERIC_HARDIRQS
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help
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Say yes here if you have TWL4030 family chip on your board.
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Say yes here if you have TWL4030 / TWL6030 family chip on your board.
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This core driver provides register access and IRQ handling
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facilities, and registers devices for the various functions
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so that function-specific drivers can bind to them.
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@ -26,7 +26,7 @@ obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o
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obj-$(CONFIG_TPS65010) += tps65010.o
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obj-$(CONFIG_MENELAUS) += menelaus.o
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obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o
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obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o
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obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o
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obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o
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@ -181,6 +181,30 @@
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/* Triton Core internal information (END) */
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/* subchip/slave 0 0x48 - POWER */
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#define TWL6030_BASEADD_RTC 0x0000
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#define TWL6030_BASEADD_MEM 0x0017
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#define TWL6030_BASEADD_PM_MASTER 0x001F
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#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
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#define TWL6030_BASEADD_PM_MISC 0x00E2
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#define TWL6030_BASEADD_PM_PUPD 0x00F0
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/* subchip/slave 1 0x49 - FEATURE */
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#define TWL6030_BASEADD_USB 0x0000
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#define TWL6030_BASEADD_GPADC_CTRL 0x002E
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#define TWL6030_BASEADD_AUX 0x0090
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#define TWL6030_BASEADD_PWM 0x00BA
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#define TWL6030_BASEADD_GASGAUGE 0x00C0
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#define TWL6030_BASEADD_PIH 0x00D0
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#define TWL6030_BASEADD_CHARGER 0x00E0
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/* subchip/slave 2 0x4A - DFT */
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#define TWL6030_BASEADD_DIEID 0x00C0
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/* subchip/slave 3 0x4B - AUDIO */
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#define TWL6030_BASEADD_AUDIO 0x0000
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#define TWL6030_BASEADD_RSV 0x0000
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/* Few power values */
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#define R_CFG_BOOT 0x05
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#define R_PROTECT_KEY 0x0E
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@ -202,13 +226,21 @@
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#define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */
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#define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */
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#define TWL5031 BIT(2) /* twl5031 has different registers */
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#define TWL6030_CLASS BIT(3) /* TWL6030 class */
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/*----------------------------------------------------------------------*/
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/* is driver active, bound to a chip? */
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static bool inuse;
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/* Structure for each TWL4030 Slave */
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static unsigned int twl_id;
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unsigned int twl_rev(void)
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{
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return twl_id;
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}
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EXPORT_SYMBOL(twl_rev);
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/* Structure for each TWL4030/TWL6030 Slave */
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struct twl_client {
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struct i2c_client *client;
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u8 address;
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@ -228,11 +260,12 @@ struct twl_mapping {
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unsigned char sid; /* Slave ID */
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unsigned char base; /* base address */
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};
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struct twl_mapping *twl_map;
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static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
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/*
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* NOTE: don't change this table without updating the
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* <linux/i2c/twl4030.h> defines for TWL4030_MODULE_*
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* <linux/i2c/twl.h> defines for TWL4030_MODULE_*
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* so they continue to match the order in this table.
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*/
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@ -265,6 +298,40 @@ static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
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{ 3, TWL4030_BASEADD_SECURED_REG },
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};
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static struct twl_mapping twl6030_map[] = {
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/*
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* NOTE: don't change this table without updating the
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* <linux/i2c/twl.h> defines for TWL4030_MODULE_*
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* so they continue to match the order in this table.
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*/
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{ SUB_CHIP_ID1, TWL6030_BASEADD_USB },
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{ SUB_CHIP_ID3, TWL6030_BASEADD_AUDIO },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_DIEID },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID1, TWL6030_BASEADD_PIH },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID1, TWL6030_BASEADD_GPADC_CTRL },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
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{ SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
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{ SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
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{ SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER },
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{ SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC },
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{ SUB_CHIP_ID0, TWL6030_BASEADD_RTC },
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{ SUB_CHIP_ID0, TWL6030_BASEADD_MEM },
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};
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/*----------------------------------------------------------------------*/
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/* Exported Functions */
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@ -292,7 +359,7 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
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pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
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return -EPERM;
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}
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sid = twl4030_map[mod_no].sid;
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sid = twl_map[mod_no].sid;
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twl = &twl_modules[sid];
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if (unlikely(!inuse)) {
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@ -310,7 +377,7 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
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msg->flags = 0;
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msg->buf = value;
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/* over write the first byte of buffer with the register address */
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*value = twl4030_map[mod_no].base + reg;
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*value = twl_map[mod_no].base + reg;
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ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
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mutex_unlock(&twl->xfer_lock);
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@ -349,7 +416,7 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
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pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
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return -EPERM;
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}
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sid = twl4030_map[mod_no].sid;
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sid = twl_map[mod_no].sid;
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twl = &twl_modules[sid];
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if (unlikely(!inuse)) {
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@ -362,7 +429,7 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
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msg->addr = twl->address;
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msg->len = 1;
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msg->flags = 0; /* Read the register value */
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val = twl4030_map[mod_no].base + reg;
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val = twl_map[mod_no].base + reg;
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msg->buf = &val;
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/* [MSG2] fill the data rx buffer */
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msg = &twl->xfer_msg[1];
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@ -486,6 +553,7 @@ add_regulator_linked(int num, struct regulator_init_data *pdata,
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struct regulator_consumer_supply *consumers,
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unsigned num_consumers)
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{
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unsigned sub_chip_id;
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/* regulator framework demands init_data ... */
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if (!pdata)
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return NULL;
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@ -496,7 +564,8 @@ add_regulator_linked(int num, struct regulator_init_data *pdata,
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}
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/* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
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return add_numbered_child(3, "twl_reg", num,
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sub_chip_id = twl_map[TWL_MODULE_PM_MASTER].sid;
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return add_numbered_child(sub_chip_id, "twl_reg", num,
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pdata, sizeof(*pdata), false, 0, 0);
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}
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@ -516,6 +585,7 @@ static int
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add_children(struct twl4030_platform_data *pdata, unsigned long features)
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{
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struct device *child;
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unsigned sub_chip_id;
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if (twl_has_bci() && pdata->bci &&
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!(features & (TPS_SUBSET | TWL5031))) {
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@ -561,7 +631,8 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features)
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* Eventually, Linux might become more aware of such
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* HW security concerns, and "least privilege".
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*/
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child = add_child(3, "twl_rtc",
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sub_chip_id = twl_map[TWL_MODULE_RTC].sid;
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child = add_child(sub_chip_id, "twl_rtc",
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NULL, 0,
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true, pdata->irq_base + RTC_INTR_OFFSET, 0);
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if (IS_ERR(child))
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@ -812,16 +883,22 @@ static void clocks_init(struct device *dev,
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/*----------------------------------------------------------------------*/
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int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
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int twl_exit_irq(void);
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int twl_init_chip_irq(const char *chip);
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int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
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int twl4030_exit_irq(void);
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int twl4030_init_chip_irq(const char *chip);
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int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
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int twl6030_exit_irq(void);
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static int twl_remove(struct i2c_client *client)
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{
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unsigned i;
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int status;
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status = twl_exit_irq();
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if (twl_class_is_4030())
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status = twl4030_exit_irq();
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else
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status = twl6030_exit_irq();
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if (status < 0)
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return status;
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@ -878,6 +955,13 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
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mutex_init(&twl->xfer_lock);
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}
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inuse = true;
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if ((id->driver_data) & TWL6030_CLASS) {
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twl_id = TWL6030_CLASS_ID;
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twl_map = &twl6030_map[0];
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} else {
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twl_id = TWL4030_CLASS_ID;
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twl_map = &twl4030_map[0];
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}
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/* setup clock framework */
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clocks_init(&client->dev, pdata->clock);
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@ -890,8 +974,15 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
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if (client->irq
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&& pdata->irq_base
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&& pdata->irq_end > pdata->irq_base) {
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twl_init_chip_irq(id->name);
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status = twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end);
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if (twl_class_is_4030()) {
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twl4030_init_chip_irq(id->name);
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status = twl4030_init_irq(client->irq, pdata->irq_base,
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pdata->irq_end);
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} else {
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status = twl6030_init_irq(client->irq, pdata->irq_base,
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pdata->irq_end);
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}
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if (status < 0)
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goto fail;
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}
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@ -910,6 +1001,7 @@ static const struct i2c_device_id twl_ids[] = {
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{ "tps65950", 0 }, /* catalog version of twl5030 */
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{ "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
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{ "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
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{ "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
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{ /* end of list */ },
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};
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MODULE_DEVICE_TABLE(i2c, twl_ids);
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@ -778,7 +778,7 @@ int twl4030_sih_setup(int module)
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/* FIXME pass in which interrupt line we'll use ... */
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#define twl_irq_line 0
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int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
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int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
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{
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static struct irq_chip twl4030_irq_chip;
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@ -858,7 +858,7 @@ fail:
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return status;
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}
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int twl_exit_irq(void)
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int twl4030_exit_irq(void)
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{
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/* FIXME undo twl_init_irq() */
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if (twl4030_irq_base) {
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@ -868,7 +868,7 @@ int twl_exit_irq(void)
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return 0;
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}
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int twl_init_chip_irq(const char *chip)
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int twl4030_init_chip_irq(const char *chip)
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{
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if (!strcmp(chip, "twl5031")) {
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sih_modules = sih_modules_twl5031;
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@ -0,0 +1,299 @@
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/*
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* twl6030-irq.c - TWL6030 irq support
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*
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* Copyright (C) 2005-2009 Texas Instruments, Inc.
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*
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* Modifications to defer interrupt handling to a kernel thread:
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* Copyright (C) 2006 MontaVista Software, Inc.
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*
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* Based on tlv320aic23.c:
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* Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
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*
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* Code cleanup and modifications to IRQ handler.
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* by syed khasim <x0khasim@ti.com>
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*
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* TWL6030 specific code and IRQ handling changes by
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* Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
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* Balaji T K <balajitk@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kthread.h>
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#include <linux/i2c/twl.h>
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/*
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* TWL6030 (unlike its predecessors, which had two level interrupt handling)
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* three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
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* It exposes status bits saying who has raised an interrupt. There are
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* three mask registers that corresponds to these status registers, that
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* enables/disables these interrupts.
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*
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* We set up IRQs starting at a platform-specified base. An interrupt map table,
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* specifies mapping between interrupt number and the associated module.
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*
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*/
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static int twl6030_interrupt_mapping[24] = {
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PWR_INTR_OFFSET, /* Bit 0 PWRON */
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PWR_INTR_OFFSET, /* Bit 1 RPWRON */
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PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
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RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
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RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
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HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
|
||||
SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
|
||||
SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
|
||||
|
||||
SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
|
||||
BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
|
||||
SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
|
||||
MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
|
||||
RSV_INTR_OFFSET, /* Bit 12 Reserved */
|
||||
MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
|
||||
MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
|
||||
GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
|
||||
|
||||
USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
|
||||
USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
|
||||
USBOTG_INTR_OFFSET, /* Bit 18 ID */
|
||||
USBOTG_INTR_OFFSET, /* Bit 19 VBUS */
|
||||
CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
|
||||
CHARGER_INTR_OFFSET, /* Bit 21 EXT_CHRG */
|
||||
CHARGER_INTR_OFFSET, /* Bit 22 INT_CHRG */
|
||||
RSV_INTR_OFFSET, /* Bit 23 Reserved */
|
||||
};
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
static unsigned twl6030_irq_base;
|
||||
|
||||
static struct completion irq_event;
|
||||
|
||||
/*
|
||||
* This thread processes interrupts reported by the Primary Interrupt Handler.
|
||||
*/
|
||||
static int twl6030_irq_thread(void *data)
|
||||
{
|
||||
long irq = (long)data;
|
||||
static unsigned i2c_errors;
|
||||
static const unsigned max_i2c_errors = 100;
|
||||
int ret;
|
||||
|
||||
current->flags |= PF_NOFREEZE;
|
||||
|
||||
while (!kthread_should_stop()) {
|
||||
int i;
|
||||
union {
|
||||
u8 bytes[4];
|
||||
u32 int_sts;
|
||||
} sts;
|
||||
|
||||
/* Wait for IRQ, then read PIH irq status (also blocking) */
|
||||
wait_for_completion_interruptible(&irq_event);
|
||||
|
||||
/* read INT_STS_A, B and C in one shot using a burst read */
|
||||
ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
|
||||
REG_INT_STS_A, 3);
|
||||
if (ret) {
|
||||
pr_warning("twl6030: I2C error %d reading PIH ISR\n",
|
||||
ret);
|
||||
if (++i2c_errors >= max_i2c_errors) {
|
||||
printk(KERN_ERR "Maximum I2C error count"
|
||||
" exceeded. Terminating %s.\n",
|
||||
__func__);
|
||||
break;
|
||||
}
|
||||
complete(&irq_event);
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
|
||||
sts.bytes[3] = 0; /* Only 24 bits are valid*/
|
||||
|
||||
for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
|
||||
local_irq_disable();
|
||||
if (sts.int_sts & 0x1) {
|
||||
int module_irq = twl6030_irq_base +
|
||||
twl6030_interrupt_mapping[i];
|
||||
struct irq_desc *d = irq_to_desc(module_irq);
|
||||
|
||||
if (!d) {
|
||||
pr_err("twl6030: Invalid SIH IRQ: %d\n",
|
||||
module_irq);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* These can't be masked ... always warn
|
||||
* if we get any surprises.
|
||||
*/
|
||||
if (d->status & IRQ_DISABLED)
|
||||
note_interrupt(module_irq, d,
|
||||
IRQ_NONE);
|
||||
else
|
||||
d->handle_irq(module_irq, d);
|
||||
|
||||
}
|
||||
local_irq_enable();
|
||||
}
|
||||
ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
|
||||
REG_INT_STS_A, 3); /* clear INT_STS_A */
|
||||
if (ret)
|
||||
pr_warning("twl6030: I2C error in clearing PIH ISR\n");
|
||||
|
||||
enable_irq(irq);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
|
||||
* This is a chained interrupt, so there is no desc->action method for it.
|
||||
* Now we need to query the interrupt controller in the twl6030 to determine
|
||||
* which module is generating the interrupt request. However, we can't do i2c
|
||||
* transactions in interrupt context, so we must defer that work to a kernel
|
||||
* thread. All we do here is acknowledge and mask the interrupt and wakeup
|
||||
* the kernel thread.
|
||||
*/
|
||||
static irqreturn_t handle_twl6030_pih(int irq, void *devid)
|
||||
{
|
||||
disable_irq_nosync(irq);
|
||||
complete(devid);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
static inline void activate_irq(int irq)
|
||||
{
|
||||
#ifdef CONFIG_ARM
|
||||
/* ARM requires an extra step to clear IRQ_NOREQUEST, which it
|
||||
* sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
|
||||
*/
|
||||
set_irq_flags(irq, IRQF_VALID);
|
||||
#else
|
||||
/* same effect on other architectures */
|
||||
set_irq_noprobe(irq);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
static unsigned twl6030_irq_next;
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
|
||||
{
|
||||
int ret;
|
||||
u8 unmask_value;
|
||||
ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
|
||||
REG_INT_STS_A + offset);
|
||||
unmask_value &= (~(bit_mask));
|
||||
ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
|
||||
REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(twl6030_interrupt_unmask);
|
||||
|
||||
int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
|
||||
{
|
||||
int ret;
|
||||
u8 mask_value;
|
||||
ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
|
||||
REG_INT_STS_A + offset);
|
||||
mask_value |= (bit_mask);
|
||||
ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
|
||||
REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(twl6030_interrupt_mask);
|
||||
|
||||
int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
|
||||
{
|
||||
|
||||
int status = 0;
|
||||
int i;
|
||||
struct task_struct *task;
|
||||
int ret;
|
||||
u8 mask[4];
|
||||
|
||||
static struct irq_chip twl6030_irq_chip;
|
||||
mask[1] = 0xFF;
|
||||
mask[2] = 0xFF;
|
||||
mask[3] = 0xFF;
|
||||
ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
|
||||
REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
|
||||
ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
|
||||
REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
|
||||
ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
|
||||
REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
|
||||
|
||||
twl6030_irq_base = irq_base;
|
||||
|
||||
/* install an irq handler for each of the modules;
|
||||
* clone dummy irq_chip since PIH can't *do* anything
|
||||
*/
|
||||
twl6030_irq_chip = dummy_irq_chip;
|
||||
twl6030_irq_chip.name = "twl6030";
|
||||
twl6030_irq_chip.set_type = NULL;
|
||||
|
||||
for (i = irq_base; i < irq_end; i++) {
|
||||
set_irq_chip_and_handler(i, &twl6030_irq_chip,
|
||||
handle_simple_irq);
|
||||
activate_irq(i);
|
||||
}
|
||||
|
||||
twl6030_irq_next = i;
|
||||
pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
|
||||
irq_num, irq_base, twl6030_irq_next - 1);
|
||||
|
||||
/* install an irq handler to demultiplex the TWL6030 interrupt */
|
||||
init_completion(&irq_event);
|
||||
task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
|
||||
if (IS_ERR(task)) {
|
||||
pr_err("twl6030: could not create irq %d thread!\n", irq_num);
|
||||
status = PTR_ERR(task);
|
||||
goto fail_kthread;
|
||||
}
|
||||
|
||||
status = request_irq(irq_num, handle_twl6030_pih, IRQF_DISABLED,
|
||||
"TWL6030-PIH", &irq_event);
|
||||
if (status < 0) {
|
||||
pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
|
||||
goto fail_irq;
|
||||
}
|
||||
return status;
|
||||
fail_irq:
|
||||
free_irq(irq_num, &irq_event);
|
||||
|
||||
fail_kthread:
|
||||
for (i = irq_base; i < irq_end; i++)
|
||||
set_irq_chip_and_handler(i, NULL, NULL);
|
||||
return status;
|
||||
}
|
||||
|
||||
int twl6030_exit_irq(void)
|
||||
{
|
||||
|
||||
if (twl6030_irq_base) {
|
||||
pr_err("twl6030: can't yet clean up IRQs?\n");
|
||||
return -ENOSYS;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -89,6 +89,67 @@
|
|||
#define BCI_PRES_INTR_OFFSET 9
|
||||
#define USB_PRES_INTR_OFFSET 10
|
||||
#define RTC_INTR_OFFSET 11
|
||||
|
||||
/*
|
||||
* Offset from TWL6030_IRQ_BASE / pdata->irq_base
|
||||
*/
|
||||
#define PWR_INTR_OFFSET 0
|
||||
#define HOTDIE_INTR_OFFSET 12
|
||||
#define SMPSLDO_INTR_OFFSET 13
|
||||
#define BATDETECT_INTR_OFFSET 14
|
||||
#define SIMDETECT_INTR_OFFSET 15
|
||||
#define MMCDETECT_INTR_OFFSET 16
|
||||
#define GASGAUGE_INTR_OFFSET 17
|
||||
#define USBOTG_INTR_OFFSET 4
|
||||
#define CHARGER_INTR_OFFSET 2
|
||||
#define RSV_INTR_OFFSET 0
|
||||
|
||||
/* INT register offsets */
|
||||
#define REG_INT_STS_A 0x00
|
||||
#define REG_INT_STS_B 0x01
|
||||
#define REG_INT_STS_C 0x02
|
||||
|
||||
#define REG_INT_MSK_LINE_A 0x03
|
||||
#define REG_INT_MSK_LINE_B 0x04
|
||||
#define REG_INT_MSK_LINE_C 0x05
|
||||
|
||||
#define REG_INT_MSK_STS_A 0x06
|
||||
#define REG_INT_MSK_STS_B 0x07
|
||||
#define REG_INT_MSK_STS_C 0x08
|
||||
|
||||
/* MASK INT REG GROUP A */
|
||||
#define TWL6030_PWR_INT_MASK 0x07
|
||||
#define TWL6030_RTC_INT_MASK 0x18
|
||||
#define TWL6030_HOTDIE_INT_MASK 0x20
|
||||
#define TWL6030_SMPSLDOA_INT_MASK 0xC0
|
||||
|
||||
/* MASK INT REG GROUP B */
|
||||
#define TWL6030_SMPSLDOB_INT_MASK 0x01
|
||||
#define TWL6030_BATDETECT_INT_MASK 0x02
|
||||
#define TWL6030_SIMDETECT_INT_MASK 0x04
|
||||
#define TWL6030_MMCDETECT_INT_MASK 0x08
|
||||
#define TWL6030_GPADC_INT_MASK 0x60
|
||||
#define TWL6030_GASGAUGE_INT_MASK 0x80
|
||||
|
||||
/* MASK INT REG GROUP C */
|
||||
#define TWL6030_USBOTG_INT_MASK 0x0F
|
||||
#define TWL6030_CHARGER_CTRL_INT_MASK 0x10
|
||||
#define TWL6030_CHARGER_FAULT_INT_MASK 0x60
|
||||
|
||||
|
||||
#define TWL4030_CLASS_ID 0x4030
|
||||
#define TWL6030_CLASS_ID 0x6030
|
||||
unsigned int twl_rev(void);
|
||||
#define GET_TWL_REV (twl_rev())
|
||||
#define TWL_CLASS_IS(class, id) \
|
||||
static inline int twl_class_is_ ##class(void) \
|
||||
{ \
|
||||
return ((id) == (GET_TWL_REV)) ? 1 : 0; \
|
||||
}
|
||||
|
||||
TWL_CLASS_IS(4030, TWL4030_CLASS_ID)
|
||||
TWL_CLASS_IS(6030, TWL6030_CLASS_ID)
|
||||
|
||||
/*
|
||||
* Read and write single 8-bit registers
|
||||
*/
|
||||
|
|
@ -104,6 +165,9 @@ int twl_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
|
|||
int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
|
||||
int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
|
||||
|
||||
int twl6030_interrupt_unmask(u8 bit_mask, u8 offset);
|
||||
int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in New Issue