diff --git a/arch/arm/plat-omap/include/plat/dma-44xx.h b/arch/arm/plat-omap/include/plat/dma-44xx.h new file mode 100644 index 000000000000..1f767cb2f38a --- /dev/null +++ b/arch/arm/plat-omap/include/plat/dma-44xx.h @@ -0,0 +1,147 @@ +/* + * OMAP4 SDMA channel definitions + * + * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2010 Nokia Corporation + * + * Santosh Shilimkar (santosh.shilimkar@ti.com) + * Benoit Cousson (b-cousson@ti.com) + * Paul Walmsley (paul@pwsan.com) + * + * This file is automatically generated from the OMAP hardware databases. + * We respectfully ask that any modifications to this file be coordinated + * with the public linux-omap@vger.kernel.org mailing list and the + * authors above to ensure that the autogeneration scripts are kept + * up-to-date with the file contents. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H +#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H + +#define OMAP44XX_DMA_SYS_REQ0 2 +#define OMAP44XX_DMA_SYS_REQ1 3 +#define OMAP44XX_DMA_GPMC 4 +#define OMAP44XX_DMA_DSS_DISPC_REQ 6 +#define OMAP44XX_DMA_SYS_REQ2 7 +#define OMAP44XX_DMA_MCASP1_AXEVT 8 +#define OMAP44XX_DMA_ISS_REQ1 9 +#define OMAP44XX_DMA_ISS_REQ2 10 +#define OMAP44XX_DMA_MCASP1_AREVT 11 +#define OMAP44XX_DMA_ISS_REQ3 12 +#define OMAP44XX_DMA_ISS_REQ4 13 +#define OMAP44XX_DMA_DSS_RFBI_REQ 14 +#define OMAP44XX_DMA_SPI3_TX0 15 +#define OMAP44XX_DMA_SPI3_RX0 16 +#define OMAP44XX_DMA_MCBSP2_TX 17 +#define OMAP44XX_DMA_MCBSP2_RX 18 +#define OMAP44XX_DMA_MCBSP3_TX 19 +#define OMAP44XX_DMA_MCBSP3_RX 20 +#define OMAP44XX_DMA_C2C_SSCM_GPO0 21 +#define OMAP44XX_DMA_C2C_SSCM_GPO1 22 +#define OMAP44XX_DMA_SPI3_TX1 23 +#define OMAP44XX_DMA_SPI3_RX1 24 +#define OMAP44XX_DMA_I2C3_TX 25 +#define OMAP44XX_DMA_I2C3_RX 26 +#define OMAP44XX_DMA_I2C1_TX 27 +#define OMAP44XX_DMA_I2C1_RX 28 +#define OMAP44XX_DMA_I2C2_TX 29 +#define OMAP44XX_DMA_I2C2_RX 30 +#define OMAP44XX_DMA_MCBSP4_TX 31 +#define OMAP44XX_DMA_MCBSP4_RX 32 +#define OMAP44XX_DMA_MCBSP1_TX 33 +#define OMAP44XX_DMA_MCBSP1_RX 34 +#define OMAP44XX_DMA_SPI1_TX0 35 +#define OMAP44XX_DMA_SPI1_RX0 36 +#define OMAP44XX_DMA_SPI1_TX1 37 +#define OMAP44XX_DMA_SPI1_RX1 38 +#define OMAP44XX_DMA_SPI1_TX2 39 +#define OMAP44XX_DMA_SPI1_RX2 40 +#define OMAP44XX_DMA_SPI1_TX3 41 +#define OMAP44XX_DMA_SPI1_RX3 42 +#define OMAP44XX_DMA_SPI2_TX0 43 +#define OMAP44XX_DMA_SPI2_RX0 44 +#define OMAP44XX_DMA_SPI2_TX1 45 +#define OMAP44XX_DMA_SPI2_RX1 46 +#define OMAP44XX_DMA_MMC2_TX 47 +#define OMAP44XX_DMA_MMC2_RX 48 +#define OMAP44XX_DMA_UART1_TX 49 +#define OMAP44XX_DMA_UART1_RX 50 +#define OMAP44XX_DMA_UART2_TX 51 +#define OMAP44XX_DMA_UART2_RX 52 +#define OMAP44XX_DMA_UART3_TX 53 +#define OMAP44XX_DMA_UART3_RX 54 +#define OMAP44XX_DMA_UART4_TX 55 +#define OMAP44XX_DMA_UART4_RX 56 +#define OMAP44XX_DMA_MMC4_TX 57 +#define OMAP44XX_DMA_MMC4_RX 58 +#define OMAP44XX_DMA_MMC5_TX 59 +#define OMAP44XX_DMA_MMC5_RX 60 +#define OMAP44XX_DMA_MMC1_TX 61 +#define OMAP44XX_DMA_MMC1_RX 62 +#define OMAP44XX_DMA_SYS_REQ3 64 +#define OMAP44XX_DMA_MCPDM_UP 65 +#define OMAP44XX_DMA_MCPDM_DL 66 +#define OMAP44XX_DMA_DMIC_REQ 67 +#define OMAP44XX_DMA_C2C_SSCM_GPO2 68 +#define OMAP44XX_DMA_C2C_SSCM_GPO3 69 +#define OMAP44XX_DMA_SPI4_TX0 70 +#define OMAP44XX_DMA_SPI4_RX0 71 +#define OMAP44XX_DMA_DSS_DSI1_REQ0 72 +#define OMAP44XX_DMA_DSS_DSI1_REQ1 73 +#define OMAP44XX_DMA_DSS_DSI1_REQ2 74 +#define OMAP44XX_DMA_DSS_DSI1_REQ3 75 +#define OMAP44XX_DMA_DSS_HDMI_REQ 76 +#define OMAP44XX_DMA_MMC3_TX 77 +#define OMAP44XX_DMA_MMC3_RX 78 +#define OMAP44XX_DMA_USIM_TX 79 +#define OMAP44XX_DMA_USIM_RX 80 +#define OMAP44XX_DMA_DSS_DSI2_REQ0 81 +#define OMAP44XX_DMA_DSS_DSI2_REQ1 82 +#define OMAP44XX_DMA_DSS_DSI2_REQ2 83 +#define OMAP44XX_DMA_DSS_DSI2_REQ3 84 +#define OMAP44XX_DMA_SLIMBUS1_TX0 85 +#define OMAP44XX_DMA_SLIMBUS1_TX1 86 +#define OMAP44XX_DMA_SLIMBUS1_TX2 87 +#define OMAP44XX_DMA_SLIMBUS1_TX3 88 +#define OMAP44XX_DMA_SLIMBUS1_RX0 89 +#define OMAP44XX_DMA_SLIMBUS1_RX1 90 +#define OMAP44XX_DMA_SLIMBUS1_RX2 91 +#define OMAP44XX_DMA_SLIMBUS1_RX3 92 +#define OMAP44XX_DMA_SLIMBUS2_TX0 93 +#define OMAP44XX_DMA_SLIMBUS2_TX1 94 +#define OMAP44XX_DMA_SLIMBUS2_TX2 95 +#define OMAP44XX_DMA_SLIMBUS2_TX3 96 +#define OMAP44XX_DMA_SLIMBUS2_RX0 97 +#define OMAP44XX_DMA_SLIMBUS2_RX1 98 +#define OMAP44XX_DMA_SLIMBUS2_RX2 99 +#define OMAP44XX_DMA_SLIMBUS2_RX3 100 +#define OMAP44XX_DMA_ABE_REQ_0 101 +#define OMAP44XX_DMA_ABE_REQ_1 102 +#define OMAP44XX_DMA_ABE_REQ_2 103 +#define OMAP44XX_DMA_ABE_REQ_3 104 +#define OMAP44XX_DMA_ABE_REQ_4 105 +#define OMAP44XX_DMA_ABE_REQ_5 106 +#define OMAP44XX_DMA_ABE_REQ_6 107 +#define OMAP44XX_DMA_ABE_REQ_7 108 +#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ 109 +#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ 110 +#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ 111 +#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ 112 +#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ 113 +#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ 114 +#define OMAP44XX_DMA_DES_P_CTX_IN_REQ 115 +#define OMAP44XX_DMA_DES_P_DATA_IN_REQ 116 +#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ 117 +#define OMAP44XX_DMA_SHA2_CTXIN_P 118 +#define OMAP44XX_DMA_SHA2_DIN_P 119 +#define OMAP44XX_DMA_SHA2_CTXOUT_P 120 +#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ 121 +#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ 122 +#define OMAP44XX_DMA_I2C4_TX 124 +#define OMAP44XX_DMA_I2C4_RX 125 + +#endif diff --git a/arch/arm/plat-omap/include/plat/irqs-44xx.h b/arch/arm/plat-omap/include/plat/irqs-44xx.h new file mode 100644 index 000000000000..518322c80116 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/irqs-44xx.h @@ -0,0 +1,144 @@ +/* + * OMAP4 Interrupt lines definitions + * + * Copyright (C) 2009-2010 Texas Instruments, Inc. + * + * Santosh Shilimkar (santosh.shilimkar@ti.com) + * Benoit Cousson (b-cousson@ti.com) + * + * This file is automatically generated from the OMAP hardware databases. + * We respectfully ask that any modifications to this file be coordinated + * with the public linux-omap@vger.kernel.org mailing list and the + * authors above to ensure that the autogeneration scripts are kept + * up-to-date with the file contents. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_IRQS_H +#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_IRQS_H + +/* OMAP44XX IRQs numbers definitions */ +#define OMAP44XX_IRQ_LOCALTIMER 29 +#define OMAP44XX_IRQ_LOCALWDT 30 + +#define OMAP44XX_IRQ_GIC_START 32 + +#define OMAP44XX_IRQ_PL310 (0 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_CTI0 (1 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_CTI1 (2 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_ELM (4 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SYS_1N (7 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SECURITY_EVENTS (8 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_L3_DBG (9 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_L3_APP (10 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_PRCM (11 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SDMA_0 (12 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SDMA_1 (13 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SDMA_2 (14 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SDMA_3 (15 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCBSP4 (16 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCBSP1 (17 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SR_MCU (18 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SR_CORE (19 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPMC (20 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GFX (21 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCBSP2 (22 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCBSP3 (23 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_ISS_5 (24 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DSS_DISPC (25 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MAIL_U0 (26 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_C2C_SSCM_0 (27 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_TESLA_MMU (28 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPIO1 (29 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPIO2 (30 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPIO3 (31 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPIO4 (32 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPIO5 (33 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPIO6 (34 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_USIM (35 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_WDT3 (36 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT1 (37 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT2 (38 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT3 (39 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT4 (40 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT5 (41 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT6 (42 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT7 (43 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT8 (44 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT9 (45 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT10 (46 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT11 (47 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SPI4 (48 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SHA1_S (49 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_FPKA_SINTREQUEST_S (50 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SHA1_P (51 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_RNG (52 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DSS_DSI1 (53 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_I2C1 (56 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_I2C2 (57 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_HDQ (58 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MMC5 (59 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_I2C3 (61 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_I2C4 (62 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_AES2_S (63 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_AES2_P (64 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SPI1 (65 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SPI2 (66 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_HSI_P1 (67 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_HSI_P2 (68 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_FDIF_3 (69 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_UART4 (70 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_HSI_DMA (71 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_UART1 (72 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_UART2 (73 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_UART3 (74 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_PBIAS (75 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_OHCI (76 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_EHCI (77 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_TLL (78 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_AES1_S (79 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_WDT2 (80 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DES_S (81 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DES_P (82 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MMC1 (83 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DSS_DSI2 (84 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_AES1_P (85 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MMC2 (86 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MPU_ICR (87 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_C2C_SSCM_1 (88 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_FSUSB (89 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_FSUSB_SMI (90 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SPI3 (91 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_HS_USB_MC_N (92 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_HS_USB_DMA_N (93 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MMC3 (94 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_GPT12 (95 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MMC4 (96 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SLIMBUS1 (97 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SLIMBUS2 (98 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_ABE (99 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DUCATI_MMU (100 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DSS_HDMI (101 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SR_IVA (102 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_IVA_HD_POSYNCITRPEND_1 (103 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_IVA_HD_POSYNCITRPEND_0 (104 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_IVA_HD_POMBINTRPEND_0 (107 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCASP1_AR (108 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCASP1_AX (109 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_EMIF4_1 (110 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_EMIF4_2 (111 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_MCPDM (112 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DMM (113 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_DMIC (114 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_CDMA_0 (115 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_CDMA_1 (116 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_CDMA_2 (117 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_CDMA_3 (118 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_SYS_2N (119 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_KBD_CTL (120 + OMAP44XX_IRQ_GIC_START) +#define OMAP44XX_IRQ_UNIPRO1 (124 + OMAP44XX_IRQ_GIC_START) + +#endif