Device tree changes for omap variants for v4.17
This series of changes updates the device tree files for omaps:
- Nokia N9 support for magnetometer
- Update at24 to use atmel as manufacturer for am335x-boneblue
- Add support for am33xx based PDU001 board
- Update Droid 4 touchscreen for reset-gpios and add audio
codec and soundcard
- Remove unused dra7 cooling level nodes
- A series of changes to configure am335x and am437x for PM
- Add pinmuxing for i2c2 and 3 for LogicPD boards
- Add EMIF interrupt infor for am437x and am335x
- Add missing omap3 sound-dai-cells
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Merge tag 'omap-for-v4.17/dt-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Device tree changes for omap variants for v4.17" from Tony Lindgren:
This series of changes updates the device tree files for omaps:
- Nokia N9 support for magnetometer
- Update at24 to use atmel as manufacturer for am335x-boneblue
- Add support for am33xx based PDU001 board
- Update Droid 4 touchscreen for reset-gpios and add audio
codec and soundcard
- Remove unused dra7 cooling level nodes
- A series of changes to configure am335x and am437x for PM
- Add pinmuxing for i2c2 and 3 for LogicPD boards
- Add EMIF interrupt infor for am437x and am335x
- Add missing omap3 sound-dai-cells
* tag 'omap-for-v4.17/dt-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: dts: omap4-droid4: add soundcard
ARM: dts: motorola-cpcap-mapphone: add audio-codec
ARM: dts: omap3: Add missing #sound-dai-cells
ARM: dts: am43xx: add emif interrupt info
ARM: dts: am33xx: add emif interrupt info
ARM: dts: Add pinmuxing for i2c2 and i2c3 for LogicPD SOM-LV
ARM: dts: Add pinmuxing for i2c2 and i2c3 for LogicPD torpedo
ARM: dts: am4372: Mark omap_l3_noc with ti,no-idle
ARM: dts: am4372: Mark emif with ti,no-idle
ARM: dts: am33xx: Mark emif with ti,no-idle
ARM: dts: am4372: Add soc node
ARM: dts: am33xx: Add pm-sram phandle to soc node
ARM: dts: am4372: Update emif node
ARM: dts: am33xx: Update emif node
ARM: dts: am4372: Reserve pm code and data regions in ocmcram sram node
ARM: dts: am33xx: Reserve pm code and data regions in ocmcram sram node
ARM: dts: omap: Remove "cooling-{min|max}-level" for CPU nodes
ARM: dts: omap4-droid4: update touchscreen
ARM: dts: am33xx: add PDU001 board
ARM: dts: use 'atmel' as at24 manufacturer in am335x-boneblue
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
hifive-unleashed-5.1
Arnd Bergmann
commit
e94e5cb859
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@ -675,6 +675,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
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am335x-lxm.dtb \
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am335x-moxa-uc-8100-me-t.dtb \
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am335x-nano.dtb \
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am335x-pdu001.dtb \
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am335x-pepper.dtb \
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am335x-phycore-rdk.dtb \
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am335x-shc.dtb \
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@ -342,7 +342,7 @@
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};
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baseboard_eeprom: baseboard_eeprom@50 {
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compatible = "at,24c256";
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compatible = "atmel,24c256";
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reg = <0x50>;
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#address-cells = <1>;
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@ -0,0 +1,595 @@
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/*
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* pdu001.dts
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*
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* EETS GmbH PDU001 board device tree file
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*
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* Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/leds-pca9532.h>
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/ {
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model = "EETS,PDU001";
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compatible = "ti,am33xx";
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chosen {
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stdout-path = &uart3;
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};
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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vbat: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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regulator-boot-on;
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};
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lis3_reg: fixedregulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "lis3_reg";
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regulator-boot-on;
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};
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panel {
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compatible = "ti,tilcdc,panel";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_pins_s0>;
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panel-info {
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <16>;
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fdd = <0x80>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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};
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display-timings {
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240x320p16 {
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clock-frequency = <6500000>;
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hactive = <240>;
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vactive = <320>;
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hfront-porch = <6>;
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hback-porch = <6>;
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hsync-len = <1>;
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vback-porch = <6>;
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vfront-porch = <6>;
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vsync-len = <1>;
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hsync-active = <0>;
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vsync-active = <0>;
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pixelclk-active = <1>;
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de-active = <0>;
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};
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};
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&clkout2_pin>;
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
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AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
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>;
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};
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_clk.i2c2_sda */
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AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d0.i2c2_scl */
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>;
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};
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spi1_pins: pinmux_spi1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
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AM33XX_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
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AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
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AM33XX_IOPAD(0x99C, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x96C, PIN_OUTPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */
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AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
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>;
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};
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_cs1.uart3_rxd */
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AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
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>;
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};
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Port 1 (emac0) */
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AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE0) /* mii1_col.mii1_col */
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AM33XX_IOPAD(0x90C, PIN_INPUT | MUX_MODE0) /* mii1_crs.mii1_crs */
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AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE0) /* mii1_rxer.mii1_rxer */
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AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE0) /* mii1_txen.mii1_txen */
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AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
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AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
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AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
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AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
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AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
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AM33XX_IOPAD(0x92c, PIN_INPUT | MUX_MODE0) /* mii1_txclk.mii1_txclk */
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AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
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AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
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AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
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AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
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AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
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/* Port 2 (emac1) */
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AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* mii2_txen.gpmc_a0 */
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AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE1) /* mii2_rxdv.gpmc_a1 */
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AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* mii2_txd3.gpmc_a2 */
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AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* mii2_txd2.gpmc_a3 */
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AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* mii2_txd1.gpmc_a4 */
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AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* mii2_txd0.gpmc_a5 */
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AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE1) /* mii2_txclk.gpmc_a6 */
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AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE1) /* mii2_rxclk.gpmc_a7 */
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AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE1) /* mii2_rxd3.gpmc_a8 */
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AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE1) /* mii2_rxd2.gpmc_a9 */
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AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE1) /* mii2_rxd1.gpmc_a10 */
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AM33XX_IOPAD(0x86C, PIN_INPUT | MUX_MODE1) /* mii2_rxd0.gpmc_a11 */
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AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE1) /* mii2_crs.gpmc_wait0 */
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AM33XX_IOPAD(0x874, PIN_INPUT | MUX_MODE1) /* mii2_rxer.gpmc_wpn */
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AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE1) /* mii2_col.gpmc_ben1 */
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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/* eMMC */
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
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AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
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AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
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AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
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AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
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AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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/* SD cardcage */
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
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AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
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AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
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AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
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AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
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AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
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/* card change signal for frontpanel SD cardcage */
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AM33XX_IOPAD(0x890, PIN_INPUT | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
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>;
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};
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lcd_pins_s0: lcd_pins_s0 {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
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AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
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AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
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AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
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AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
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AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
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AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
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AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
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AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
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AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
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AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
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AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
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AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
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AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
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AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
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AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
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AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
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AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
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AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan0_pins: pinmux_dcan0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
|
||||
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
|
||||
rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rts-delay = <0 0>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@2d {
|
||||
reg = <0x2d>;
|
||||
};
|
||||
|
||||
m2_eeprom: m2_eeprom@50 {
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x50>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
board_24aa025e48: board_24aa025e48@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
backplane_24aa025e48: backplane_24aa025e48@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
};
|
||||
|
||||
pca9532: pca9532@60 {
|
||||
compatible = "nxp,pca9532";
|
||||
reg = <0x60>;
|
||||
psc0 = <0x97>;
|
||||
pwm0 = <0x80>;
|
||||
psc1 = <0x97>;
|
||||
pwm1 = <0x10>;
|
||||
|
||||
run.red@0 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
run.green@1 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
default-state = "on";
|
||||
};
|
||||
s2.red@2 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
s2.green@3 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
s1.yellow@4 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
s1.green@5 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
};
|
||||
};
|
||||
|
||||
pca9530: pca9530@61 {
|
||||
compatible = "nxp,pca9530";
|
||||
reg = <0x61>;
|
||||
|
||||
tft-panel@0 {
|
||||
type = <PCA9532_TYPE_LED>;
|
||||
linux,default-trigger = "backlight";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
mcp79400: mcp79400@6f {
|
||||
compatible = "microchip,mcp7940x";
|
||||
reg = <0x6f>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
ti,pindir-d0-out-d1-in;
|
||||
status = "okay";
|
||||
|
||||
cfaf240320a032t {
|
||||
compatible = "orisetech,otm3225a";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
// SPI mode 3
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* Disable soc's rtc as we have no VBAT for it. This makes the board
|
||||
* rtc (Microchip MCP79400) the default rtc device 'rtc0'.
|
||||
*/
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&lcdc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
regulators {
|
||||
vrtc_reg: regulator@0 {
|
||||
regulator-name = "ldo_vrtc";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-name = "buck_vdd_ddr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_MPU voltage limits */
|
||||
regulator-name = "buck_vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
/* VDD_CORE voltage limits */
|
||||
regulator-name = "buck_vdd_core";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd3_reg: regulator@4 {
|
||||
regulator-name = "boost_res";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig1_reg: regulator@5 {
|
||||
regulator-name = "ldo_vdig1";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig2_reg: regulator@6 {
|
||||
regulator-name = "ldo_vdig2";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vpll_reg: regulator@7 {
|
||||
regulator-name = "ldo_vpll";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
regulator-name = "ldo_vdac";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
regulator-name = "ldo_vaux1";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
regulator-name = "ldo_vaux2";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux33_reg: regulator@11 {
|
||||
regulator-name = "ldo_vaux33";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
regulator-name = "ldo_vmmc";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vbb_reg: regulator@13 {
|
||||
regulator-name = "bat_vbb";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
dual_emac; /* no switch, two distinct MACs */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "mii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "mii";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
tsc {
|
||||
ti,wires = <4>;
|
||||
ti,x-plate-resistance = <200>;
|
||||
ti,coordinate-readouts = <5>;
|
||||
ti,wire-config = <0x01 0x10 0x22 0x33>;
|
||||
ti,charge-delay = <0x400>;
|
||||
};
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmc_reg>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmc_reg>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dcan0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan0_pins>;
|
||||
};
|
||||
|
|
@ -147,6 +147,8 @@
|
|||
mpu {
|
||||
compatible = "ti,omap3-mpu";
|
||||
ti,hwmods = "mpu";
|
||||
pm-sram = <&pm_sram_code
|
||||
&pm_sram_data>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -905,6 +907,21 @@
|
|||
ocmcram: ocmcram@40300000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x40300000 0x10000>; /* 64k */
|
||||
ranges = <0x0 0x40300000 0x10000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
pm_sram_code: pm-sram-code@0 {
|
||||
compatible = "ti,sram";
|
||||
reg = <0x0 0x1000>;
|
||||
protect-exec;
|
||||
};
|
||||
|
||||
pm_sram_data: pm-sram-data@1000 {
|
||||
compatible = "ti,sram";
|
||||
reg = <0x1000 0x1000>;
|
||||
pool;
|
||||
};
|
||||
};
|
||||
|
||||
elm: elm@48080000 {
|
||||
|
|
@ -945,6 +962,10 @@
|
|||
compatible = "ti,emif-am3352";
|
||||
reg = <0x4c000000 0x1000000>;
|
||||
ti,hwmods = "emif";
|
||||
interrupts = <101>;
|
||||
sram = <&pm_sram_code
|
||||
&pm_sram_data>;
|
||||
ti,no-idle;
|
||||
};
|
||||
|
||||
gpmc: gpmc@50000000 {
|
||||
|
|
|
|||
|
|
@ -92,6 +92,16 @@
|
|||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "ti,omap-infra";
|
||||
mpu {
|
||||
compatible = "ti,omap4-mpu";
|
||||
ti,hwmods = "mpu";
|
||||
pm-sram = <&pm_sram_code
|
||||
&pm_sram_data>;
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller@48241000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
interrupt-controller;
|
||||
|
|
@ -143,6 +153,7 @@
|
|||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "l3_main";
|
||||
ti,no-idle;
|
||||
reg = <0x44000000 0x400000
|
||||
0x44800000 0x400000>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -237,6 +248,10 @@
|
|||
compatible = "ti,emif-am4372";
|
||||
reg = <0x4c000000 0x1000000>;
|
||||
ti,hwmods = "emif";
|
||||
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,no-idle;
|
||||
sram = <&pm_sram_code
|
||||
&pm_sram_data>;
|
||||
};
|
||||
|
||||
edma: edma@49000000 {
|
||||
|
|
@ -1141,6 +1156,21 @@
|
|||
ocmcram: ocmcram@40300000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x40300000 0x40000>; /* 256k */
|
||||
ranges = <0x0 0x40300000 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
pm_sram_code: pm-sram-code@0 {
|
||||
compatible = "ti,sram";
|
||||
reg = <0x0 0x1000>;
|
||||
protect-exec;
|
||||
};
|
||||
|
||||
pm_sram_data: pm-sram-data@1000 {
|
||||
compatible = "ti,sram";
|
||||
reg = <0x1000 0x1000>;
|
||||
pool;
|
||||
};
|
||||
};
|
||||
|
||||
dcan0: can@481cc000 {
|
||||
|
|
|
|||
|
|
@ -92,8 +92,6 @@
|
|||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
|
||||
/* cooling options */
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <2>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
|
||||
vbb-supply = <&abb_mpu>;
|
||||
|
|
|
|||
|
|
@ -88,10 +88,14 @@
|
|||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
|
|
@ -213,6 +217,18 @@
|
|||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
|
||||
>;
|
||||
};
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
|
|
|
|||
|
|
@ -83,10 +83,14 @@
|
|||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
clock-frequency = <400000>;
|
||||
at24@50 {
|
||||
compatible = "atmel,24c64";
|
||||
|
|
@ -144,6 +148,18 @@
|
|||
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
|
|
|
|||
|
|
@ -68,6 +68,19 @@
|
|||
};
|
||||
};
|
||||
|
||||
cpcap_audio: audio-codec {
|
||||
#sound-dai-cells = <1>;
|
||||
|
||||
port@0 {
|
||||
cpcap_audio_codec0: endpoint {
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
cpcap_audio_codec1: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpcap_rtc: rtc {
|
||||
compatible = "motorola,cpcap-rtc";
|
||||
|
||||
|
|
|
|||
|
|
@ -39,6 +39,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
ak8975@0f {
|
||||
compatible = "asahi-kasei,ak8975";
|
||||
reg = <0x0f>;
|
||||
};
|
||||
};
|
||||
|
||||
&isp {
|
||||
vdd-csiphy1-supply = <&vaux2>;
|
||||
vdd-csiphy2-supply = <&vaux2>;
|
||||
|
|
|
|||
|
|
@ -557,6 +557,7 @@
|
|||
dma-names = "tx", "rx";
|
||||
clocks = <&mcbsp4_fck>;
|
||||
clock-names = "fck";
|
||||
#sound-dai-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -117,6 +117,26 @@
|
|||
|
||||
};
|
||||
};
|
||||
|
||||
soundcard {
|
||||
compatible = "audio-graph-card";
|
||||
label = "Droid 4 Audio";
|
||||
|
||||
simple-graph-card,widgets =
|
||||
"Speaker", "Earpiece",
|
||||
"Speaker", "Loudspeaker",
|
||||
"Headphone", "Headphone Jack",
|
||||
"Microphone", "Internal Mic";
|
||||
|
||||
simple-graph-card,routing =
|
||||
"Earpiece", "EP",
|
||||
"Loudspeaker", "SPKR",
|
||||
"Headphone Jack", "HSL",
|
||||
"Headphone Jack", "HSR",
|
||||
"MICR", "Internal Mic";
|
||||
|
||||
dais = <&mcbsp2_port>, <&mcbsp3_port>;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
|
|
@ -124,13 +144,6 @@
|
|||
};
|
||||
|
||||
&gpio6 {
|
||||
touchscreen_reset {
|
||||
gpio-hog;
|
||||
gpios = <13 0>;
|
||||
output-high;
|
||||
line-name = "touchscreen-reset";
|
||||
};
|
||||
|
||||
pwm8: dmtimer-pwm-8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vibrator_direction_pin>;
|
||||
|
|
@ -362,22 +375,18 @@
|
|||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* REVISIT: Add gpio173 reset pin handling to the driver, see gpio-hog above.
|
||||
* If the GPIO reset is used, we probably need to have /lib/firmware/maxtouch.fw
|
||||
* available. See "mxt-app" and "droid4-touchscreen-firmware" tools for more
|
||||
* information.
|
||||
*/
|
||||
&i2c2 {
|
||||
tsp@4a {
|
||||
touchscreen@4a {
|
||||
compatible = "atmel,maxtouch";
|
||||
reg = <0x4a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&touchscreen_pins>;
|
||||
|
||||
reset-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; /* gpio173 */
|
||||
|
||||
/* gpio_183 with sys_nirq2 pad as wakeup */
|
||||
interrupts-extended = <&gpio6 23 IRQ_TYPE_EDGE_FALLING
|
||||
&omap4_pmx_core 0x160>;
|
||||
interrupts-extended = <&gpio6 23 IRQ_TYPE_EDGE_FALLING>,
|
||||
<&omap4_pmx_core 0x160>;
|
||||
interrupt-names = "irq", "wakeup";
|
||||
wakeup-source;
|
||||
};
|
||||
|
|
@ -435,6 +444,7 @@
|
|||
|
||||
touchscreen_pins: pinmux_touchscreen_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
|
@ -512,6 +522,24 @@
|
|||
OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
|
||||
OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
|
||||
OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0) /* abe_mcbsp2_dx */
|
||||
OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp3_pins: pinmux_mcbsp3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
|
||||
OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
|
||||
OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */
|
||||
OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_wkup {
|
||||
|
|
@ -597,3 +625,43 @@
|
|||
"0", "0", "1";
|
||||
};
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
status = "okay";
|
||||
|
||||
mcbsp2_port: port {
|
||||
cpu_dai2: endpoint {
|
||||
dai-format = "i2s";
|
||||
remote-endpoint = <&cpcap_audio_codec0>;
|
||||
frame-master = <&cpcap_audio_codec0>;
|
||||
bitclock-master = <&cpcap_audio_codec0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcbsp3 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp3_pins>;
|
||||
status = "okay";
|
||||
|
||||
mcbsp3_port: port {
|
||||
cpu_dai3: endpoint {
|
||||
dai-format = "dsp_a";
|
||||
frame-master = <&cpcap_audio_codec1>;
|
||||
bitclock-master = <&cpcap_audio_codec1>;
|
||||
remote-endpoint = <&cpcap_audio_codec1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cpcap_audio_codec0 {
|
||||
remote-endpoint = <&cpu_dai2>;
|
||||
};
|
||||
|
||||
&cpcap_audio_codec1 {
|
||||
remote-endpoint = <&cpu_dai3>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,8 +24,6 @@
|
|||
clock-latency = <300000>; /* From legacy driver */
|
||||
|
||||
/* cooling options */
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <3>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -22,8 +22,6 @@
|
|||
clock-latency = <300000>; /* From legacy driver */
|
||||
|
||||
/* cooling options */
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <2>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,8 +55,6 @@
|
|||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
|
||||
/* cooling options */
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <2>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpu@1 {
|
||||
|
|
|
|||
Loading…
Reference in New Issue