dmaengine: imx-sdma: add sdma resume back after megafast off
On i.mx6sx or i.mx7d chip, megafast could be off in suspend which means sdma controller will be power-ed off, thus sdma driver should resume back including firmware loaded again. Signed-off-by: Robin Gong <yibin.gong@nxp.com> [ Aisheng: fix rebase conflict ] Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>5.4-rM2-2.2.x-imx-squashed
Robin Gong
Dong Aisheng
parent
a3e3585408
commit
e977370b6d
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@ -381,6 +381,7 @@ struct sdma_channel {
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enum dma_status status;
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struct imx_dma_data data;
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struct work_struct terminate_worker;
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bool is_ram_script;
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};
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#define IMX_DMA_SG_LOOP BIT(0)
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@ -390,6 +391,15 @@ struct sdma_channel {
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#define MXC_SDMA_MIN_PRIORITY 1
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#define MXC_SDMA_MAX_PRIORITY 7
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/*
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* 0x78(SDMA_XTRIG_CONF2+4)~0x100(SDMA_CHNPRI_O) registers are reserved and
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* can't be accessed. Skip these register touch in suspend/resume. Also below
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* two macros are only used on i.mx6sx.
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*/
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#define MXC_SDMA_RESERVED_REG (SDMA_CHNPRI_0 - SDMA_XTRIG_CONF2 - 4)
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#define MXC_SDMA_SAVED_REG_NUM (((SDMA_CHNENBL0_IMX35 + 4 * 48) - \
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MXC_SDMA_RESERVED_REG) / 4)
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#define SDMA_FIRMWARE_MAGIC 0x414d4453
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/**
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@ -435,6 +445,8 @@ struct sdma_engine {
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struct device_dma_parameters dma_parms;
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struct sdma_channel channel[MAX_DMA_CHANNELS];
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struct sdma_channel_control *channel_control;
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u32 save_regs[MXC_SDMA_SAVED_REG_NUM];
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const char *fw_name;
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void __iomem *regs;
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struct sdma_context_data *context;
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dma_addr_t context_phys;
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@ -453,6 +465,8 @@ struct sdma_engine {
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/* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
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bool clk_ratio;
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struct gen_pool *iram_pool;
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bool fw_loaded;
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unsigned short ram_code_start;
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};
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static int sdma_config_write(struct dma_chan *chan,
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@ -1034,6 +1048,13 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
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sdmac->pc_to_device = emi_2_per;
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sdmac->device_to_device = per_2_per;
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sdmac->pc_to_pc = emi_2_emi;
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if (sdma->ram_code_start &&
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((sdmac->pc_from_device >= sdma->ram_code_start) ||
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(sdmac->pc_to_device >= sdma->ram_code_start) ||
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(sdmac->device_to_device >= sdma->ram_code_start ||
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(sdmac->pc_to_pc >= sdma->ram_code_start))))
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sdmac->is_ram_script = true;
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}
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static int sdma_load_context(struct sdma_channel *sdmac)
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@ -1096,6 +1117,31 @@ static int sdma_load_context(struct sdma_channel *sdmac)
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return ret;
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}
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static int sdma_save_restore_context(struct sdma_engine *sdma, bool save)
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{
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struct sdma_context_data *context = sdma->context;
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struct sdma_buffer_descriptor *bd0 = sdma->bd0;
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&sdma->channel_0_lock, flags);
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if (save)
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bd0->mode.command = C0_GETDM;
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else
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bd0->mode.command = C0_SETDM;
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bd0->mode.status = BD_DONE | BD_WRAP | BD_EXTD;
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bd0->mode.count = MAX_DMA_CHANNELS * sizeof(*context) / 4;
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bd0->buffer_addr = sdma->context_phys;
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bd0->ext_buffer_addr = 2048;
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ret = sdma_run_channel0(sdma);
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spin_unlock_irqrestore(&sdma->channel_0_lock, flags);
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return ret;
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}
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static struct sdma_channel *to_sdma_chan(struct dma_chan *chan)
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{
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return container_of(chan, struct sdma_channel, vc.chan);
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@ -1424,6 +1470,11 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
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{
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struct sdma_desc *desc;
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if (!sdmac->sdma->fw_loaded && sdmac->is_ram_script) {
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dev_err(sdmac->sdma->dev, "sdma firmware not ready!\n");
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goto err_out;
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}
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desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
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if (!desc)
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goto err_out;
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@ -1818,7 +1869,7 @@ static void sdma_load_firmware(const struct firmware *fw, void *context)
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return;
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}
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if (fw->size < sizeof(*header))
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if (fw->size < sizeof(*header) || sdma->fw_loaded)
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goto err_firmware;
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header = (struct sdma_firmware_header *)fw->data;
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@ -1847,6 +1898,7 @@ static void sdma_load_firmware(const struct firmware *fw, void *context)
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addr = (void *)header + header->script_addrs_start;
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ram_code = (void *)header + header->ram_code_start;
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sdma->ram_code_start = header->ram_code_start;
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clk_enable(sdma->clk_ipg);
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clk_enable(sdma->clk_ahb);
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@ -1859,6 +1911,8 @@ static void sdma_load_firmware(const struct firmware *fw, void *context)
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sdma_add_scripts(sdma, addr);
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sdma->fw_loaded = true;
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dev_info(sdma->dev, "loaded firmware %d.%d\n",
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header->version_major,
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header->version_minor);
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@ -2259,6 +2313,8 @@ static int sdma_probe(struct platform_device *pdev)
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}
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}
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sdma->fw_name = fw_name;
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return 0;
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err_register:
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@ -2294,6 +2350,121 @@ static int sdma_remove(struct platform_device *pdev)
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int sdma_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sdma_engine *sdma = platform_get_drvdata(pdev);
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int i, ret = 0;
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/* Do nothing if not i.MX6SX or i.MX7D*/
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if (sdma->drvdata != &sdma_imx6sx && sdma->drvdata != &sdma_imx7d
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&& sdma->drvdata != &sdma_imx6ul)
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return 0;
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clk_enable(sdma->clk_ipg);
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clk_enable(sdma->clk_ahb);
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ret = sdma_save_restore_context(sdma, true);
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if (ret) {
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dev_err(sdma->dev, "save context error!\n");
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return ret;
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}
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/* save regs */
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for (i = 0; i < MXC_SDMA_SAVED_REG_NUM; i++) {
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/*
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* 0x78(SDMA_XTRIG_CONF2+4)~0x100(SDMA_CHNPRI_O) registers are
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* reserved and can't be touched. Skip these regs.
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*/
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if (i > SDMA_XTRIG_CONF2 / 4)
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sdma->save_regs[i] = readl_relaxed(sdma->regs +
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MXC_SDMA_RESERVED_REG
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+ 4 * i);
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else
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sdma->save_regs[i] = readl_relaxed(sdma->regs + 4 * i);
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}
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clk_disable(sdma->clk_ipg);
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clk_disable(sdma->clk_ahb);
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return 0;
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}
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static int sdma_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sdma_engine *sdma = platform_get_drvdata(pdev);
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unsigned long timeout = jiffies + msecs_to_jiffies(2);
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int i, ret;
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/* Do nothing if not i.MX6SX or i.MX7D*/
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if (sdma->drvdata != &sdma_imx6sx && sdma->drvdata != &sdma_imx7d
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&& sdma->drvdata != &sdma_imx6ul)
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return 0;
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clk_enable(sdma->clk_ipg);
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clk_enable(sdma->clk_ahb);
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/* Do nothing if mega/fast mix not turned off */
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if (readl_relaxed(sdma->regs + SDMA_H_C0PTR)) {
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clk_disable(sdma->clk_ipg);
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clk_disable(sdma->clk_ahb);
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return 0;
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}
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/* Firmware was lost, mark as "not ready" */
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sdma->fw_loaded = false;
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/* restore regs and load firmware */
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for (i = 0; i < MXC_SDMA_SAVED_REG_NUM; i++) {
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/*
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* 0x78(SDMA_XTRIG_CONF2+4)~0x100(SDMA_CHNPRI_O) registers are
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* reserved and can't be touched. Skip these regs.
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*/
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if (i > SDMA_XTRIG_CONF2 / 4)
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writel_relaxed(sdma->save_regs[i], sdma->regs +
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MXC_SDMA_RESERVED_REG + 4 * i);
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/* set static context switch mode before channel0 running */
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else if (i == SDMA_H_CONFIG / 4)
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writel_relaxed(sdma->save_regs[i] & ~SDMA_H_CONFIG_CSM,
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sdma->regs + SDMA_H_CONFIG);
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else
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writel_relaxed(sdma->save_regs[i], sdma->regs + 4 * i);
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}
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/* prepare priority for channel0 to start */
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sdma_set_channel_priority(&sdma->channel[0], MXC_SDMA_DEFAULT_PRIORITY);
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ret = sdma_get_firmware(sdma, sdma->fw_name);
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if (ret) {
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dev_warn(&pdev->dev, "failed to get firmware\n");
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goto out;
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}
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/* wait firmware loaded */
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do {
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if (time_after(jiffies, timeout)) {
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dev_warn(&pdev->dev, "failed to load firmware\n");
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break;
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}
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usleep_range(50, 500);
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} while (!sdma->fw_loaded);
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ret = sdma_save_restore_context(sdma, false);
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if (ret) {
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dev_err(sdma->dev, "restore context error!\n");
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goto out;
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}
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out:
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clk_disable(sdma->clk_ipg);
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clk_disable(sdma->clk_ahb);
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return ret;
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}
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#endif
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static const struct dev_pm_ops sdma_pm_ops = {
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SET_LATE_SYSTEM_SLEEP_PM_OPS(sdma_suspend, sdma_resume)
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};
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static struct platform_driver sdma_driver = {
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.driver = {
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.name = "imx-sdma",
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