[MMC] mmci: add data cache coherency
Since MMCI currently uses PIO to read data, we have to take steps to ensure data cache coherency on aliasing CPU caches. Add the necessary flush_dcache_page() calls. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -20,6 +20,7 @@
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#include <linux/mmc/host.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/protocol.h>
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#include <linux/mmc/protocol.h>
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#include <asm/cacheflush.h>
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#include <asm/div64.h>
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#include <asm/div64.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/scatterlist.h>
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#include <asm/scatterlist.h>
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@ -157,6 +158,13 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
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else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
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else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
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data->error = MMC_ERR_FIFO;
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data->error = MMC_ERR_FIFO;
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status |= MCI_DATAEND;
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status |= MCI_DATAEND;
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/*
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* We hit an error condition. Ensure that any data
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* partially written to a page is properly coherent.
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*/
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if (host->sg_len && data->flags & MMC_DATA_READ)
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flush_dcache_page(host->sg_ptr->page);
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}
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}
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if (status & MCI_DATAEND) {
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if (status & MCI_DATAEND) {
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mmci_stop_data(host);
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mmci_stop_data(host);
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@ -301,6 +309,13 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
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if (remain)
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if (remain)
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break;
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break;
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/*
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* If we were reading, and we have completed this
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* page, ensure that the data cache is coherent.
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*/
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if (status & MCI_RXACTIVE)
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flush_dcache_page(host->sg_ptr->page);
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if (!mmci_next_sg(host))
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if (!mmci_next_sg(host))
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break;
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break;
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