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AT91 SoC for 5.5

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- Document new SoC: sam9x60
  - rework sam9x60 Kconfig option
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Merge tag 'at91-5.6-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc

AT91 SoC for 5.5

 - Document new SoC: sam9x60
 - rework sam9x60 Kconfig option

* tag 'at91-5.6-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: Documentation: add sam9x60 product and datasheet
  ARM: at91: pm: use of_device_id array to find the proper shdwc node
  ARM: at91: pm: use SAM9X60 PMC's compatible
  ARM: debug-ll: select DEBUG_AT91_RM9200_DBGU for sam9x60
  drivers: soc: atmel: select POWER_RESET_AT91_SAMA5D2_SHDWC for sam9x60
  power: reset: Kconfig: select POWER_RESET_AT91_RESET for sam9x60
  drivers: soc: atmel: move sam9x60 under its own config flag
  ARM: at91: pm: move SAM9X60's PM under its own SoC config flag
  ARM: at91: Kconfig: add config flag for SAM9X60 SoC
  ARM: at91: Kconfig: add sam9x60 pll config flag

Link: https://lore.kernel.org/r/20200113161612.GA1358903@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-01-16 14:09:30 -08:00
parent 1237186597 d9b8e21eae
commit e9d440157e
9 changed files with 80 additions and 29 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
Documentation/arm/microchip.rst
View file

@ -92,6 +92,12 @@ the Microchip website: http://www.microchip.com.
http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001517A.pdf
- sam9x60
* Datasheet
http://ww1.microchip.com/downloads/en/DeviceDoc/SAM9X60-Data-Sheet-DS60001579A.pdf
* ARM Cortex-A5 based SoCs
- sama5d3 family

6
arch/arm/Kconfig.debug
View file

@ -147,14 +147,14 @@ choice
0x80024000 | 0xf0024000 | UART9
config DEBUG_AT91_RM9200_DBGU
bool "Kernel low-level debugging on AT91RM9200, AT91SAM9 DBGU"
bool "Kernel low-level debugging on AT91RM9200, AT91SAM9, SAM9X60 DBGU"
select DEBUG_AT91_UART
depends on SOC_AT91RM9200 || SOC_AT91SAM9
depends on SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60
help
Say Y here if you want kernel low-level debugging support
on the DBGU port of:
at91rm9200, at91sam9260, at91sam9g20, at91sam9261,
at91sam9g10, at91sam9n12, at91sam9rl64, at91sam9x5
at91sam9g10, at91sam9n12, at91sam9rl64, at91sam9x5, sam9x60
config DEBUG_AT91_SAM9263_DBGU
bool "Kernel low-level debugging on AT91SAM{9263,9G45,A5D3} DBGU"

24
arch/arm/mach-at91/Kconfig
View file

@ -105,11 +105,28 @@ config SOC_AT91SAM9
AT91SAM9X35
AT91SAM9XE
config SOC_SAM9X60
bool "SAM9X60"
depends on ARCH_MULTI_V5
select ATMEL_AIC5_IRQ
select ATMEL_PM if PM
select ATMEL_SDRAMC
select CPU_ARM926T
select HAVE_AT91_USB_CLK
select HAVE_AT91_GENERATED_CLK
select HAVE_AT91_SAM9X60_PLL
select MEMORY
select PINCTRL_AT91
select SOC_SAM_V4_V5
select SRAM if PM
help
Select this if you are using Microchip's SAM9X60 SoC
comment "Clocksource driver selection"
config ATMEL_CLOCKSOURCE_PIT
bool "Periodic Interval Timer (PIT) support"
depends on SOC_AT91SAM9 || SOC_SAMA5
depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
default SOC_AT91SAM9 || SOC_SAMA5
select ATMEL_PIT
help
@ -119,7 +136,7 @@ config ATMEL_CLOCKSOURCE_PIT
config ATMEL_CLOCKSOURCE_TCB
bool "Timer Counter Blocks (TCB) support"
default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5
default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
select ATMEL_TCB_CLKSRC
help
Select this to get a high precision clocksource based on a
@ -154,6 +171,9 @@ config HAVE_AT91_AUDIO_PLL
config HAVE_AT91_I2S_MUX_CLK
bool
config HAVE_AT91_SAM9X60_PLL
bool
config SOC_SAM_V4_V5
bool

1
arch/arm/mach-at91/Makefile
View file

@ -6,6 +6,7 @@
# CPU-specific support
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o
obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o
obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o
obj-$(CONFIG_SOC_SAMA5) += sama5.o
obj-$(CONFIG_SOC_SAMV7) += samv7.o

18
arch/arm/mach-at91/at91sam9.c
View file

@ -31,21 +31,3 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
.init_machine = at91sam9_init,
.dt_compat = at91_dt_board_compat,
MACHINE_END
static void __init sam9x60_init(void)
{
of_platform_default_populate(NULL, NULL, NULL);
sam9x60_pm_init();
}
static const char *const sam9x60_dt_board_compat[] __initconst = {
"microchip,sam9x60",
NULL
};
DT_MACHINE_START(sam9x60_dt, "Microchip SAM9X60")
/* Maintainer: Microchip */
.init_machine = sam9x60_init,
.dt_compat = sam9x60_dt_board_compat,
MACHINE_END

11
arch/arm/mach-at91/pm.c
View file

@ -691,6 +691,12 @@ static void __init at91_pm_use_default_mode(int pm_mode)
soc_pm.data.suspend_mode = AT91_PM_ULP0;
}
static const struct of_device_id atmel_shdwc_ids[] = {
{ .compatible = "atmel,sama5d2-shdwc" },
{ .compatible = "microchip,sam9x60-shdwc" },
{ /* sentinel. */ }
};
static void __init at91_pm_modes_init(void)
{
struct device_node *np;
@ -700,7 +706,7 @@ static void __init at91_pm_modes_init(void)
!at91_is_pm_mode_active(AT91_PM_ULP1))
return;
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc");
np = of_find_matching_node(NULL, atmel_shdwc_ids);
if (!np) {
pr_warn("%s: failed to find shdwc!\n", __func__);
goto ulp1_default;
@ -751,6 +757,7 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = {
{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
{ .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[1] },
{ /* sentinel */ },
};
@ -805,7 +812,7 @@ void __init at91rm9200_pm_init(void)
void __init sam9x60_pm_init(void)
{
if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
if (!IS_ENABLED(CONFIG_SOC_SAM9X60))
return;
at91_pm_modes_init();

34
arch/arm/mach-at91/sam9x60.c Normal file
View file

@ -0,0 +1,34 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Setup code for SAM9X60.
*
* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
*
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*/
#include <linux/of.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/system_misc.h>
#include "generic.h"
static void __init sam9x60_init(void)
{
of_platform_default_populate(NULL, NULL, NULL);
sam9x60_pm_init();
}
static const char *const sam9x60_dt_board_compat[] __initconst = {
"microchip,sam9x60",
NULL
};
DT_MACHINE_START(sam9x60_dt, "Microchip SAM9X60")
/* Maintainer: Microchip */
.init_machine = sam9x60_init,
.dt_compat = sam9x60_dt_board_compat,
MACHINE_END

4
drivers/power/reset/Kconfig
View file

@ -26,7 +26,7 @@ config POWER_RESET_AT91_POWEROFF
config POWER_RESET_AT91_RESET
tristate "Atmel AT91 reset driver"
depends on ARCH_AT91
default SOC_AT91SAM9 || SOC_SAMA5
default SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
help
This driver supports restart for Atmel AT91SAM9 and SAMA5
SoCs
@ -34,7 +34,7 @@ config POWER_RESET_AT91_RESET
config POWER_RESET_AT91_SAMA5D2_SHDWC
tristate "Atmel AT91 SAMA5D2-Compatible shutdown controller driver"
depends on ARCH_AT91
default SOC_SAMA5
default SOC_SAM9X60 || SOC_SAMA5
help
This driver supports the alternate shutdown controller for some Atmel
SAMA5 SoCs. It is present for example on SAMA5D2 SoC.

5
drivers/soc/atmel/soc.c
View file

@ -66,8 +66,9 @@ static const struct at91_soc __initconst socs[] = {
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_EXID_MATCH,
"sam9x60", "sam9x60"),
#endif
#ifdef CONFIG_SOC_SAM9X60
AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_EXID_MATCH, "sam9x60", "sam9x60"),
#endif
#ifdef CONFIG_SOC_SAMA5
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,