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Merge branch 'rmobile/smp' into rmobile-latest

Conflicts:
	arch/arm/Kconfig
	arch/arm/mach-shmobile/include/mach/entry-macro-intc.S

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
hifive-unleashed-5.1
Paul Mundt 2011-01-07 10:51:35 +09:00
commit e9d728f528
9 changed files with 305 additions and 1 deletions

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@ -1258,7 +1258,7 @@ config SMP
depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
ARCH_MSM_SCORPIONMP
ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
select USE_GENERIC_SMP_HELPERS
select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
help

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@ -11,6 +11,12 @@ obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7377.o intc-sh7377.o
obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
# SMP objects
smp-y := platsmp.o headsmp.o
smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o
smp-$(CONFIG_LOCAL_TIMERS) += localtimer.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o
# Pinmux setup
pfc-y :=
pfc-$(CONFIG_ARCH_SH7367) += pfc-sh7367.o
@ -32,4 +38,5 @@ obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
# Framework support
obj-$(CONFIG_SMP) += $(smp-y)
obj-$(CONFIG_GENERIC_GPIO) += $(pfc-y)

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@ -0,0 +1,27 @@
/*
* SMP support for R-Mobile / SH-Mobile
*
* Copyright (C) 2010 Magnus Damm
* Copyright (C) 2010 Takashi Yoshii
*
* Based on vexpress, Copyright (c) 2003 ARM Limited, All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/memory.h>
__INIT
/*
* Reset vector for secondary CPUs.
* This will be mapped at address 0 by SBAR register.
* We need _long_ jump to the physical address.
*/
.align 12
ENTRY(shmobile_secondary_vector)
ldr pc, 1f
1: .long secondary_startup - PAGE_OFFSET + PHYS_OFFSET

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@ -0,0 +1,41 @@
/*
* SMP support for R-Mobile / SH-Mobile
*
* Copyright (C) 2010 Magnus Damm
*
* Based on realview, Copyright (C) 2002 ARM Ltd, All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/smp.h>
int platform_cpu_kill(unsigned int cpu)
{
return 1;
}
void platform_cpu_die(unsigned int cpu)
{
while (1) {
/*
* here's the WFI
*/
asm(".word 0xe320f003\n"
:
:
: "memory", "cc");
}
}
int platform_cpu_disable(unsigned int cpu)
{
/*
* we don't allow CPU 0 to be shutdown (it is still too special
* e.g. clock tick interrupts)
*/
return cpu == 0 ? -EPERM : 0;
}

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@ -3,6 +3,7 @@
extern struct sys_timer shmobile_timer;
extern void shmobile_setup_console(void);
extern void shmobile_secondary_vector(void);
struct clk;
extern int clk_init(void);
extern void shmobile_handle_irq_intc(struct pt_regs *);
@ -40,4 +41,9 @@ extern void sh73a0_pinmux_init(void);
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
extern unsigned int sh73a0_get_core_count(void);
extern void sh73a0_secondary_init(unsigned int cpu);
extern int sh73a0_boot_secondary(unsigned int cpu);
extern void sh73a0_smp_prepare_cpus(void);
#endif /* __ARCH_MACH_COMMON_H */

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@ -0,0 +1,16 @@
#ifndef __MACH_SMP_H
#define __MACH_SMP_H
#include <asm/hardware/gic.h>
#include <asm/smp_mpidr.h>
/*
* We use IRQ1 as the IPI
*/
static inline void smp_cross_call(const struct cpumask *mask)
{
#if defined(CONFIG_ARM_GIC)
gic_raise_softirq(mask, 1);
#endif
}
#endif

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@ -0,0 +1,25 @@
/*
* SMP support for R-Mobile / SH-Mobile - local timer portion
*
* Copyright (C) 2010 Magnus Damm
*
* Based on vexpress, Copyright (C) 2002 ARM Ltd, All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/clockchips.h>
#include <asm/smp_twd.h>
#include <asm/localtimer.h>
/*
* Setup the local clock events for a CPU.
*/
void __cpuinit local_timer_setup(struct clock_event_device *evt)
{
evt->irq = 29;
twd_timer_setup(evt);
}

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@ -0,0 +1,85 @@
/*
* SMP support for R-Mobile / SH-Mobile
*
* Copyright (C) 2010 Magnus Damm
*
* Based on vexpress, Copyright (C) 2002 ARM Ltd, All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/smp.h>
#include <linux/io.h>
#include <asm/localtimer.h>
#include <asm/mach-types.h>
#include <mach/common.h>
static unsigned int __init shmobile_smp_get_core_count(void)
{
if (machine_is_ag5evm())
return sh73a0_get_core_count();
return 1;
}
static void __init shmobile_smp_prepare_cpus(void)
{
if (machine_is_ag5evm())
sh73a0_smp_prepare_cpus();
}
void __cpuinit platform_secondary_init(unsigned int cpu)
{
trace_hardirqs_off();
if (machine_is_ag5evm())
sh73a0_secondary_init(cpu);
}
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
if (machine_is_ag5evm())
return sh73a0_boot_secondary(cpu);
return -ENOSYS;
}
void __init smp_init_cpus(void)
{
unsigned int ncores = shmobile_smp_get_core_count();
unsigned int i;
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
}
void __init smp_prepare_cpus(unsigned int max_cpus)
{
unsigned int ncores = shmobile_smp_get_core_count();
unsigned int cpu = smp_processor_id();
int i;
smp_store_cpu_info(cpu);
if (max_cpus > ncores)
max_cpus = ncores;
for (i = 0; i < max_cpus; i++)
set_cpu_present(i, true);
if (max_cpus > 1) {
shmobile_smp_prepare_cpus();
/*
* Enable the local timer or broadcast device for the
* boot CPU, but only if we have more than one CPU.
*/
percpu_timer_setup();
}
}

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@ -0,0 +1,97 @@
/*
* SMP support for R-Mobile / SH-Mobile - sh73a0 portion
*
* Copyright (C) 2010 Magnus Damm
* Copyright (C) 2010 Takashi Yoshii
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <mach/common.h>
#include <asm/smp_scu.h>
#include <asm/smp_twd.h>
#include <asm/hardware/gic.h>
#define WUPCR 0xe6151010
#define SRESCR 0xe6151018
#define PSTR 0xe6151040
#define SBAR 0xe6180020
#define APARMBAREA 0xe6f10020
static void __iomem *scu_base_addr(void)
{
return (void __iomem *)0xf0000000;
}
static DEFINE_SPINLOCK(scu_lock);
static unsigned long tmp;
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
{
void __iomem *scu_base = scu_base_addr();
spin_lock(&scu_lock);
tmp = __raw_readl(scu_base + 8);
tmp &= ~clr;
tmp |= set;
spin_unlock(&scu_lock);
/* disable cache coherency after releasing the lock */
__raw_writel(tmp, scu_base + 8);
}
unsigned int __init sh73a0_get_core_count(void)
{
void __iomem *scu_base = scu_base_addr();
return scu_get_core_count(scu_base);
}
void __cpuinit sh73a0_secondary_init(unsigned int cpu)
{
gic_cpu_init(0, __io(0xf0000100));
}
int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
{
/* enable cache coherency */
modify_scu_cpu_psr(0, 3 << (cpu * 8));
if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
__raw_writel(1 << cpu, __io(WUPCR)); /* wake up */
else
__raw_writel(1 << cpu, __io(SRESCR)); /* reset */
return 0;
}
void __init sh73a0_smp_prepare_cpus(void)
{
#ifdef CONFIG_HAVE_ARM_TWD
twd_base = (void __iomem *)0xf0000600;
#endif
scu_enable(scu_base_addr());
/* Map the reset vector (in headsmp.S) */
__raw_writel(0, __io(APARMBAREA)); /* 4k */
__raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));
/* enable cache coherency on CPU0 */
modify_scu_cpu_psr(0, 3 << (0 * 8));
}