MIPS: Fix MSA ld_*/st_* asm macros to use PTR_ADDU

The MSA ld_*/st_* assembler macros for when the toolchain doesn't
support MSA use addu to offset the base address. However it is a virtual
memory pointer so fix it to use PTR_ADDU which expands to daddu for
64-bit kernels.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.3.y-
Patchwork: https://patchwork.linux-mips.org/patch/13062/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan 2016-04-15 10:07:24 +01:00 committed by Ralf Baechle
parent 8a3c8b48ac
commit ea16885734

View file

@ -393,7 +393,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word LDB_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -402,7 +402,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word LDH_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -411,7 +411,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word LDW_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -420,7 +420,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word LDD_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -429,7 +429,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word STB_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -438,7 +438,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word STH_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -447,7 +447,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word STW_MSA_INSN | (\wd << 6)
.set pop
.endm
@ -456,7 +456,7 @@
.set push
.set noat
SET_HARDFLOAT
addu $1, \base, \off
PTR_ADDU $1, \base, \off
.word STD_MSA_INSN | (\wd << 6)
.set pop
.endm