drm/i915: Rename ring flush functions
Historically we considered the render ring to have special flush semantics and everything else to fall under a more general umbrella. Probably by coincidence more than anything we decided to make the bsd ring have the default *other* flush. As the new vebox ring exposes, the bsd ring is actually the weird one. Doing this allows us to call gen6_ring_flush for the vebox because calling blt_ring_flush would be weird... This patch should have no functional change. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1565,8 +1565,8 @@ static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring,
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_MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
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}
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static int gen6_ring_flush(struct intel_ring_buffer *ring,
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u32 invalidate, u32 flush)
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static int gen6_bsd_ring_flush(struct intel_ring_buffer *ring,
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u32 invalidate, u32 flush)
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{
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uint32_t cmd;
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int ret;
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@ -1637,8 +1637,8 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
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/* Blitter support (SandyBridge+) */
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static int blt_ring_flush(struct intel_ring_buffer *ring,
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u32 invalidate, u32 flush)
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static int gen6_ring_flush(struct intel_ring_buffer *ring,
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u32 invalidate, u32 flush)
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{
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uint32_t cmd;
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int ret;
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@ -1838,7 +1838,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
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/* gen6 bsd needs a special wa for tail updates */
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if (IS_GEN6(dev))
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ring->write_tail = gen6_bsd_ring_write_tail;
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ring->flush = gen6_ring_flush;
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ring->flush = gen6_bsd_ring_flush;
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ring->add_request = gen6_add_request;
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ring->get_seqno = gen6_ring_get_seqno;
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ring->set_seqno = ring_set_seqno;
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@ -1887,7 +1887,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
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ring->mmio_base = BLT_RING_BASE;
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ring->write_tail = ring_write_tail;
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ring->flush = blt_ring_flush;
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ring->flush = gen6_ring_flush;
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ring->add_request = gen6_add_request;
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ring->get_seqno = gen6_ring_get_seqno;
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ring->set_seqno = ring_set_seqno;
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