clk: mmp2: Stop pretending PLL outputs are constant
The hardcoded values for PLL1 and PLL2 are wrong. PLL1 is slightly off -- it defaults to 797.33 MHz, not 800 MHz. PLL2 is disabled by default, but also configurable. Tested on a MMP2-based OLPC XO-1.75 laptop, with PLL1=797.33 and various values of PLL2 set via set-pll2-520mhz, set-pll2-910mhz and set-pll2-988mhz Open Firmware words. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200309194254.29009-6-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -3,6 +3,7 @@
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*
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* Copyright (C) 2012 Marvell
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* Chao Xie <xiechao.mail@gmail.com>
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* Copyright (C) 2020 Lubomir Rintel <lkundrak@v3.sk>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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@ -55,7 +56,11 @@
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#define APMU_CCIC1 0xf4
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#define APMU_USBHSIC0 0xf8
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#define APMU_USBHSIC1 0xfc
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#define MPMU_FCCR 0x8
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#define MPMU_POSR 0x10
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#define MPMU_UART_PLL 0x14
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#define MPMU_PLL2_CR 0x34
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struct mmp2_clk_unit {
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struct mmp_clk_unit unit;
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@ -67,11 +72,14 @@ struct mmp2_clk_unit {
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static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
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{MMP2_CLK_CLK32, "clk32", NULL, 0, 32768},
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{MMP2_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
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{MMP2_CLK_PLL1, "pll1", NULL, 0, 800000000},
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{MMP2_CLK_PLL2, "pll2", NULL, 0, 960000000},
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{MMP2_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
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};
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static struct mmp_param_pll_clk pll_clks[] = {
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{MMP2_CLK_PLL1, "pll1", 797330000, MPMU_FCCR, 0x4000, MPMU_POSR, 0},
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{MMP2_CLK_PLL2, "pll2", 0, MPMU_PLL2_CR, 0x0300, MPMU_PLL2_CR, 10},
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};
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static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
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{MMP2_CLK_PLL1_2, "pll1_2", "pll1", 1, 2, 0},
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{MMP2_CLK_PLL1_4, "pll1_4", "pll1_2", 1, 2, 0},
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@ -113,6 +121,10 @@ static void mmp2_pll_init(struct mmp2_clk_unit *pxa_unit)
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mmp_register_fixed_rate_clks(unit, fixed_rate_clks,
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ARRAY_SIZE(fixed_rate_clks));
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mmp_register_pll_clks(unit, pll_clks,
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pxa_unit->mpmu_base,
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ARRAY_SIZE(pll_clks));
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mmp_register_fixed_factor_clks(unit, fixed_factor_clks,
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ARRAY_SIZE(fixed_factor_clks));
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