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Last minute fixes for ARC 

- Build error in Mellanox nps platform
 
  - addressing lack of saving FPU regs in releavnt configs
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Merge tag 'arc-4.11-final' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC fix from Vineet Gupta:
 "Last minute fixes for ARC:

   - build error in Mellanox nps platform

   - addressing lack of saving FPU regs in releavnt configs"

* tag 'arc-4.11-final' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARCv2: entry: save Accumulator register pair (r58:59) if present
  ARC: [plat-eznps] Fix build error
hifive-unleashed-5.1
Linus Torvalds 2017-04-25 14:07:24 -07:00
parent 8f9cedc76f 3d5e80125a
commit ea839b4174
5 changed files with 45 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arc/Kconfig
View File

@ -406,6 +406,14 @@ config ARC_HAS_DIV_REM
bool "Insn: div, divu, rem, remu"
default y
config ARC_HAS_ACCL_REGS
bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
default n
help
Depending on the configuration, CPU can contain accumulator reg-pair
(also referred to as r58:r59). These can also be used by gcc as GPR so
kernel needs to save/restore per process
endif # ISA_ARCV2
endmenu # "ARC CPU Configuration"

3
arch/arc/include/asm/atomic.h
View File

@ -17,10 +17,11 @@
#include <asm/barrier.h>
#include <asm/smp.h>
#define ATOMIC_INIT(i) { (i) }
#ifndef CONFIG_ARC_PLAT_EZNPS
#define atomic_read(v) READ_ONCE((v)->counter)
#define ATOMIC_INIT(i) { (i) }
#ifdef CONFIG_ARC_HAS_LLSC

10
arch/arc/include/asm/entry-arcv2.h
View File

@ -16,6 +16,11 @@
;
; Now manually save: r12, sp, fp, gp, r25
#ifdef CONFIG_ARC_HAS_ACCL_REGS
PUSH r59
PUSH r58
#endif
PUSH r30
PUSH r12
@ -75,6 +80,11 @@
POP r12
POP r30
#ifdef CONFIG_ARC_HAS_ACCL_REGS
POP r58
POP r59
#endif
.endm
/*------------------------------------------------------------------------*/

4
arch/arc/include/asm/ptrace.h
View File

@ -86,6 +86,10 @@ struct pt_regs {
unsigned long r12, r30;
#ifdef CONFIG_ARC_HAS_ACCL_REGS
unsigned long r58, r59; /* ACCL/ACCH used by FPU / DSP MPY */
#endif
/*------- Below list auto saved by h/w -----------*/
unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;

30
arch/arc/kernel/setup.c
View File

@ -319,7 +319,8 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
static void arc_chk_core_config(void)
{
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
int fpu_enabled;
int saved = 0, present = 0;
char *opt_nm = NULL;;
if (!cpu->extn.timer0)
panic("Timer0 is not present!\n");
@ -346,17 +347,28 @@ static void arc_chk_core_config(void)
/*
* FP hardware/software config sanity
* -If hardware contains DPFP, kernel needs to save/restore FPU state
* -If hardware present, kernel needs to save/restore FPU state
* -If not, it will crash trying to save/restore the non-existant regs
*
* (only DPDP checked since SP has no arch visible regs)
*/
fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
if (cpu->extn.fpu_dp && !fpu_enabled)
pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
else if (!cpu->extn.fpu_dp && fpu_enabled)
panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
if (is_isa_arcompact()) {
opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
/* only DPDP checked since SP has no arch visible regs */
present = cpu->extn.fpu_dp;
} else {
opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
/* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
}
if (present && !saved)
pr_warn("Enable %s for working apps\n", opt_nm);
else if (!present && saved)
panic("Disable %s, hardware NOT present\n", opt_nm);
}
/*