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OMAP1/2/3 clock: remove paranoid checks in preparation for clock{,2xxx,3xxx}_data.c 

Some parts of the clock code took advantage of the fact that the statically
allocated clock tree was in clock{,24xx,34xx}.c's local namespace to do some
extra argument checks.  These are overzealous and are more difficult to
maintain when the clock tree is in a separate namespace, so, remove them.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
hifive-unleashed-5.1
Paul Walmsley 2009-12-08 16:18:44 -07:00 committed by paul
parent aa2cf42059
commit ebd893ded2
3 changed files with 0 additions and 30 deletions
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6
arch/arm/mach-omap1/clock.c
View File

@ -376,9 +376,6 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
/* Find the highest supported frequency <= rate and switch to it */
struct mpu_rate * ptr;
if (clk != &virtual_ck_mpu)
return -EINVAL;
for (ptr = rate_table; ptr->rate; ptr++) {
if (ptr->xtal != ck_ref.rate)
continue;
@ -465,9 +462,6 @@ static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate)
struct mpu_rate * ptr;
long highest_rate;
if (clk != &virtual_ck_mpu)
return -EINVAL;
highest_rate = -EINVAL;
for (ptr = rate_table; ptr->rate; ptr++) {

6
arch/arm/mach-omap2/clock24xx.c
View File

@ -512,9 +512,6 @@ static long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
struct prcm_config *ptr;
long highest_rate;
if (clk != &virt_prcm_set)
return -EINVAL;
highest_rate = -EINVAL;
for (ptr = rate_table; ptr->mpu_speed; ptr++) {
@ -540,9 +537,6 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
unsigned long found_speed = 0;
unsigned long flags;
if (clk != &virt_prcm_set)
return -EINVAL;
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;

18
arch/arm/mach-omap2/clock34xx.c
View File

@ -520,9 +520,6 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
u8 ai;
int r;
if (clk == &dpll3_ck)
return -EINVAL;
pr_debug("clock: locking DPLL %s\n", clk->name);
ai = omap3_dpll_autoidle_read(clk);
@ -557,9 +554,6 @@ static int _omap3_noncore_dpll_bypass(struct clk *clk)
int r;
u8 ai;
if (clk == &dpll3_ck)
return -EINVAL;
if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS)))
return -EINVAL;
@ -593,9 +587,6 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
{
u8 ai;
if (clk == &dpll3_ck)
return -EINVAL;
if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_STOP)))
return -EINVAL;
@ -632,9 +623,6 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
int r;
struct dpll_data *dd;
if (clk == &dpll3_ck)
return -EINVAL;
dd = clk->dpll_data;
if (!dd)
return -EINVAL;
@ -669,9 +657,6 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
*/
static void omap3_noncore_dpll_disable(struct clk *clk)
{
if (clk == &dpll3_ck)
return;
_omap3_noncore_dpll_stop(clk);
}
@ -844,9 +829,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
if (!clk || !rate)
return -EINVAL;
if (clk != &dpll3_m2_ck)
return -EINVAL;
validrate = omap2_clksel_round_rate_div(clk, rate, &new_div);
if (validrate != rate)
return -EINVAL;