Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits) [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms [ARM] 3855/1: Add generic time support [ARM] 3873/1: S3C24XX: Add irq_chip names [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23 [ARM] nommu: confirms the CR_V bit in nommu mode [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. [ARM] 3870/1: AT91: Start removing static memory mappings [ARM] 3869/1: AT91: NAND support for DK and KB9202 boards [ARM] 3868/1: AT91 hardware header update [ARM] 3867/1: AT91 GPIO update [ARM] 3866/1: AT91 clock update [ARM] 3865/1: AT91RM9200 header updates [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series [ARM] kthread: switch arch/arm/kernel/apm.c [ARM] Off-by-one in arch/arm/common/icst* [ARM] 3864/1: Refactore sharpsl_pm [ARM] 3863/1: Add Locomo SPI Device [ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h ...hifive-unleashed-5.1
Linus Torvalds
commit
ebdea46fec
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@ -17,6 +17,10 @@ config ARM
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Europe. There is an ARM Linux project with a web page at
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<http://www.arm.linux.org.uk/>.
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config GENERIC_TIME
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bool
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default n
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config MMU
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bool
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default y
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@ -51,6 +55,10 @@ config GENERIC_HARDIRQS
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bool
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default y
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config TRACE_IRQFLAGS_SUPPORT
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bool
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default y
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config HARDIRQS_SW_RESEND
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bool
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default y
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@ -91,7 +99,7 @@ config ARCH_MTD_XIP
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config VECTORS_BASE
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hex
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default 0xffff0000 if MMU
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default 0xffff0000 if MMU || CPU_HIGH_VECTOR
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default DRAM_BASE if REMAP_VECTORS_TO_RAM
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default 0x00000000
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help
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@ -198,16 +206,27 @@ config ARCH_IMX
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help
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Support for Motorola's i.MX family of processors (MX1, MXL).
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config ARCH_IOP3XX
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bool "IOP3xx-based"
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config ARCH_IOP32X
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bool "IOP32x-based"
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depends on MMU
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select PLAT_IOP
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select PCI
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help
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Support for Intel's IOP3XX (XScale) family of processors.
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Support for Intel's 80219 and IOP32X (XScale) family of
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processors.
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config ARCH_IOP33X
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bool "IOP33x-based"
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depends on MMU
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select PLAT_IOP
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select PCI
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help
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Support for Intel's IOP33X (XScale) family of processors.
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config ARCH_IXP4XX
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bool "IXP4xx-based"
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depends on MMU
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select GENERIC_TIME
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help
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Support for Intel's IXP4XX (XScale) family of processors.
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@ -308,7 +327,9 @@ source "arch/arm/mach-footbridge/Kconfig"
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source "arch/arm/mach-integrator/Kconfig"
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source "arch/arm/mach-iop3xx/Kconfig"
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source "arch/arm/mach-iop32x/Kconfig"
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source "arch/arm/mach-iop33x/Kconfig"
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source "arch/arm/mach-ixp4xx/Kconfig"
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@ -348,6 +369,9 @@ source "arch/arm/mach-netx/Kconfig"
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config ARCH_ACORN
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bool
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config PLAT_IOP
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bool
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source arch/arm/mm/Kconfig
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# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
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@ -602,6 +626,7 @@ config LEDS_CPU
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config ALIGNMENT_TRAP
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bool
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depends on CPU_CP15_MMU
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default y if !ARCH_EBSA110
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help
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ARM processors can not fetch/store information which is not
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@ -633,11 +658,12 @@ config ZBOOT_ROM_BSS
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hex "Compressed ROM boot loader BSS address"
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default "0"
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help
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The base address of 64KiB of read/write memory in the target
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for the ROM-able zImage, which must be available while the
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decompressor is running. Platforms which normally make use of
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ROM-able zImage formats normally set this to a suitable
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value in their defconfig file.
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The base address of an area of read/write memory in the target
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for the ROM-able zImage which must be available while the
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decompressor is running. It must be large enough to hold the
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entire decompressed kernel plus an additional 128 KiB.
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Platforms which normally make use of ROM-able zImage formats
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normally set this to a suitable value in their defconfig file.
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If ZBOOT_ROM is not enabled, this has no effect.
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@ -832,7 +858,7 @@ source "drivers/base/Kconfig"
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source "drivers/connector/Kconfig"
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if ALIGNMENT_TRAP
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if ALIGNMENT_TRAP || !CPU_CP15_MMU
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source "drivers/mtd/Kconfig"
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endif
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@ -844,7 +870,7 @@ source "drivers/block/Kconfig"
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source "drivers/acorn/block/Kconfig"
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if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \
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if PCMCIA || ARCH_CLPS7500 || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX \
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|| ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \
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|| ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \
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|| ARCH_IXP23XX
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@ -25,6 +25,14 @@ config FLASH_SIZE
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hex 'FLASH Size' if SET_MEM_PARAM
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default 0x00400000
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config PROCESSOR_ID
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hex
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default 0x00007700
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depends on !CPU_CP15
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help
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If processor has no CP15 register, this processor ID is
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used instead of the auto-probing which utilizes the register.
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config REMAP_VECTORS_TO_RAM
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bool 'Install vectors to the begining of RAM' if DRAM_BASE
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depends on DRAM_BASE
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@ -55,7 +55,12 @@ arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3
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# This selects how we optimise for the processor.
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tune-$(CONFIG_CPU_ARM610) :=-mtune=arm610
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tune-$(CONFIG_CPU_ARM710) :=-mtune=arm710
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tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
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tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
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tune-$(CONFIG_CPU_ARM740T) :=-mtune=arm7tdmi
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tune-$(CONFIG_CPU_ARM9TDMI) :=-mtune=arm9tdmi
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tune-$(CONFIG_CPU_ARM940T) :=-mtune=arm9tdmi
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tune-$(CONFIG_CPU_ARM946T) :=$(call cc-option,-mtune=arm9e,-mtune=arm9tdmi)
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tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
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tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
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tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi
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@ -101,7 +106,8 @@ endif
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machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
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textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
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machine-$(CONFIG_ARCH_CLPS711X) := clps711x
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machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
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machine-$(CONFIG_ARCH_IOP32X) := iop32x
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machine-$(CONFIG_ARCH_IOP33X) := iop33x
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machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx
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machine-$(CONFIG_ARCH_IXP2000) := ixp2000
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machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx
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@ -157,6 +163,7 @@ core-$(CONFIG_FPE_FASTFPE) += $(FASTFPE_OBJ)
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core-$(CONFIG_VFP) += arch/arm/vfp/
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# If we have a common platform directory, then include it in the build.
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core-$(CONFIG_PLAT_IOP) += arch/arm/plat-iop/
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core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/
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drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/
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@ -51,7 +51,11 @@ OBJS += head-at91rm9200.o
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endif
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ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)
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ifeq ($(CONFIG_CPU_CP15),y)
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OBJS += big-endian.o
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else
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# The endian should be set by h/w design.
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endif
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endif
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#
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@ -20,11 +20,21 @@
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#ifdef DEBUG
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#if defined(CONFIG_DEBUG_ICEDCC)
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#ifdef CONFIG_CPU_V6
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.macro loadsp, rb
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.endm
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.macro writeb, ch, rb
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mcr p14, 0, \ch, c0, c5, 0
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.endm
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#else
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.macro loadsp, rb
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.endm
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.macro writeb, ch, rb
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mcr p14, 0, \ch, c0, c1, 0
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.endm
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#endif
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#else
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#include <asm/arch/debug-macro.S>
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@ -42,12 +52,6 @@
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add \rb, \rb, #0x00010000 @ Ser1
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#endif
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.endm
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#elif defined(CONFIG_ARCH_IOP331)
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.macro loadsp, rb
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mov \rb, #0xff000000
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orr \rb, \rb, #0x00ff0000
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orr \rb, \rb, #0x0000f700 @ location of the UART
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.endm
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#elif defined(CONFIG_ARCH_S3C2410)
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.macro loadsp, rb
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mov \rb, #0x50000000
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@ -78,9 +82,11 @@
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kphex r6, 8 /* processor id */
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kputc #':'
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kphex r7, 8 /* architecture id */
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#ifdef CONFIG_CPU_CP15
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kputc #':'
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mrc p15, 0, r0, c1, c0
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kphex r0, 8 /* control reg */
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#endif
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kputc #'\n'
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kphex r5, 8 /* decompressed kernel start */
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kputc #'-'
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@ -503,7 +509,11 @@ call_kernel: bl cache_clean_flush
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*/
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call_cache_fn: adr r12, proc_types
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#ifdef CONFIG_CPU_CP15
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mrc p15, 0, r6, c0, c0 @ get processor ID
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#else
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ldr r6, =CONFIG_PROCESSOR_ID
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#endif
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1: ldr r1, [r12, #0] @ get value
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ldr r2, [r12, #4] @ get mask
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eor r1, r1, r6 @ (real ^ match)
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@ -30,6 +30,25 @@ static void putstr(const char *ptr);
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#include <asm/arch/uncompress.h>
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#ifdef CONFIG_DEBUG_ICEDCC
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#ifdef CONFIG_CPU_V6
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static void icedcc_putc(int ch)
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{
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int status, i = 0x4000000;
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do {
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if (--i < 0)
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return;
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asm volatile ("mrc p14, 0, %0, c0, c1, 0" : "=r" (status));
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} while (status & (1 << 29));
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asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
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}
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#else
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static void icedcc_putc(int ch)
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{
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int status, i = 0x4000000;
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@ -44,6 +63,8 @@ static void icedcc_putc(int ch)
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asm("mcr p14, 0, %0, c1, c0, 0" : : "r" (ch));
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}
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#endif
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#define putc(ch) icedcc_putc(ch)
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#define flush() do { } while (0)
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#endif
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@ -57,7 +57,7 @@ icst307_khz_to_vco(const struct icst307_params *p, unsigned long freq)
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break;
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} while (i < ARRAY_SIZE(idx2s));
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if (i > ARRAY_SIZE(idx2s))
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if (i >= ARRAY_SIZE(idx2s))
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return vco;
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vco.s = idx2s[i];
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@ -119,7 +119,7 @@ icst307_ps_to_vco(const struct icst307_params *p, unsigned long period)
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break;
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} while (i < ARRAY_SIZE(idx2s));
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if (i > ARRAY_SIZE(idx2s))
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if (i >= ARRAY_SIZE(idx2s))
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return vco;
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vco.s = idx2s[i];
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@ -55,7 +55,7 @@ icst525_khz_to_vco(const struct icst525_params *p, unsigned long freq)
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break;
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} while (i < ARRAY_SIZE(idx2s));
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if (i > ARRAY_SIZE(idx2s))
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if (i >= ARRAY_SIZE(idx2s))
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return vco;
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vco.s = idx2s[i];
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@ -118,7 +118,7 @@ icst525_ps_to_vco(const struct icst525_params *p, unsigned long period)
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break;
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} while (i < ARRAY_SIZE(idx2s));
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if (i > ARRAY_SIZE(idx2s))
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if (i >= ARRAY_SIZE(idx2s))
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return vco;
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vco.s = idx2s[i];
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@ -121,6 +121,13 @@ static struct locomo_dev_info locomo_devices[] = {
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.offset = 0,
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.length = 0,
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},
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{
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.devid = LOCOMO_DEVID_SPI,
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.irq = {},
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.name = "locomo-spi",
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.offset = LOCOMO_SPI,
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.length = 0x30,
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},
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};
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@ -374,7 +381,7 @@ static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc,
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struct irqdesc *d;
|
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void __iomem *mapbase = get_irq_chipdata(irq);
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|
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req = locomo_readl(mapbase + LOCOMO_SPIIR) & 0x000F;
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req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
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if (req) {
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irq = LOCOMO_IRQ_SPI_START;
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d = irq_desc + irq;
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|
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@ -391,35 +398,35 @@ static void locomo_spi_ack_irq(unsigned int irq)
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{
|
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void __iomem *mapbase = get_irq_chipdata(irq);
|
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unsigned int r;
|
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r = locomo_readl(mapbase + LOCOMO_SPIWE);
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r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
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r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
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locomo_writel(r, mapbase + LOCOMO_SPIWE);
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locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
|
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r = locomo_readl(mapbase + LOCOMO_SPIIS);
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r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
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r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
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locomo_writel(r, mapbase + LOCOMO_SPIIS);
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locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
|
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|
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r = locomo_readl(mapbase + LOCOMO_SPIWE);
|
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r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
|
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r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
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locomo_writel(r, mapbase + LOCOMO_SPIWE);
|
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locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
|
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}
|
||||
|
||||
static void locomo_spi_mask_irq(unsigned int irq)
|
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{
|
||||
void __iomem *mapbase = get_irq_chipdata(irq);
|
||||
unsigned int r;
|
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r = locomo_readl(mapbase + LOCOMO_SPIIE);
|
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r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
|
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r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
|
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locomo_writel(r, mapbase + LOCOMO_SPIIE);
|
||||
locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
|
||||
}
|
||||
|
||||
static void locomo_spi_unmask_irq(unsigned int irq)
|
||||
{
|
||||
void __iomem *mapbase = get_irq_chipdata(irq);
|
||||
unsigned int r;
|
||||
r = locomo_readl(mapbase + LOCOMO_SPIIE);
|
||||
r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
|
||||
r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
|
||||
locomo_writel(r, mapbase + LOCOMO_SPIIE);
|
||||
locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
|
||||
}
|
||||
|
||||
static struct irq_chip locomo_spi_chip = {
|
||||
|
|
@ -814,12 +821,15 @@ static inline struct locomo *locomo_chip_driver(struct locomo_dev *ldev)
|
|||
return (struct locomo *)dev_get_drvdata(ldev->dev.parent);
|
||||
}
|
||||
|
||||
void locomo_gpio_set_dir(struct locomo_dev *ldev, unsigned int bits, unsigned int dir)
|
||||
void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir)
|
||||
{
|
||||
struct locomo *lchip = locomo_chip_driver(ldev);
|
||||
struct locomo *lchip = dev_get_drvdata(dev);
|
||||
unsigned long flags;
|
||||
unsigned int r;
|
||||
|
||||
if (!lchip)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&lchip->lock, flags);
|
||||
|
||||
r = locomo_readl(lchip->base + LOCOMO_GPD);
|
||||
|
|
@ -836,12 +846,15 @@ void locomo_gpio_set_dir(struct locomo_dev *ldev, unsigned int bits, unsigned in
|
|||
spin_unlock_irqrestore(&lchip->lock, flags);
|
||||
}
|
||||
|
||||
unsigned int locomo_gpio_read_level(struct locomo_dev *ldev, unsigned int bits)
|
||||
int locomo_gpio_read_level(struct device *dev, unsigned int bits)
|
||||
{
|
||||
struct locomo *lchip = locomo_chip_driver(ldev);
|
||||
struct locomo *lchip = dev_get_drvdata(dev);
|
||||
unsigned long flags;
|
||||
unsigned int ret;
|
||||
|
||||
if (!lchip)
|
||||
return -ENODEV;
|
||||
|
||||
spin_lock_irqsave(&lchip->lock, flags);
|
||||
ret = locomo_readl(lchip->base + LOCOMO_GPL);
|
||||
spin_unlock_irqrestore(&lchip->lock, flags);
|
||||
|
|
@ -850,12 +863,15 @@ unsigned int locomo_gpio_read_level(struct locomo_dev *ldev, unsigned int bits)
|
|||
return ret;
|
||||
}
|
||||
|
||||
unsigned int locomo_gpio_read_output(struct locomo_dev *ldev, unsigned int bits)
|
||||
int locomo_gpio_read_output(struct device *dev, unsigned int bits)
|
||||
{
|
||||
struct locomo *lchip = locomo_chip_driver(ldev);
|
||||
struct locomo *lchip = dev_get_drvdata(dev);
|
||||
unsigned long flags;
|
||||
unsigned int ret;
|
||||
|
||||
if (!lchip)
|
||||
return -ENODEV;
|
||||
|
||||
spin_lock_irqsave(&lchip->lock, flags);
|
||||
ret = locomo_readl(lchip->base + LOCOMO_GPO);
|
||||
spin_unlock_irqrestore(&lchip->lock, flags);
|
||||
|
|
@ -864,12 +880,15 @@ unsigned int locomo_gpio_read_output(struct locomo_dev *ldev, unsigned int bits)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void locomo_gpio_write(struct locomo_dev *ldev, unsigned int bits, unsigned int set)
|
||||
void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set)
|
||||
{
|
||||
struct locomo *lchip = locomo_chip_driver(ldev);
|
||||
struct locomo *lchip = dev_get_drvdata(dev);
|
||||
unsigned long flags;
|
||||
unsigned int r;
|
||||
|
||||
if (!lchip)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&lchip->lock, flags);
|
||||
|
||||
r = locomo_readl(lchip->base + LOCOMO_GPO);
|
||||
|
|
@ -1058,9 +1077,9 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
|
|||
struct locomo *lchip = locomo_chip_driver(dev);
|
||||
|
||||
if (vr)
|
||||
locomo_gpio_write(dev, LOCOMO_GPIO_FL_VR, 1);
|
||||
locomo_gpio_write(dev->dev.parent, LOCOMO_GPIO_FL_VR, 1);
|
||||
else
|
||||
locomo_gpio_write(dev, LOCOMO_GPIO_FL_VR, 0);
|
||||
locomo_gpio_write(dev->dev.parent, LOCOMO_GPIO_FL_VR, 0);
|
||||
|
||||
spin_lock_irqsave(&lchip->lock, flags);
|
||||
locomo_writel(bpwf, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS);
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@
|
|||
#define SHARPSL_CHARGE_FINISH_TIME (msecs_to_jiffies(10*60*1000)) /* 10 min */
|
||||
#define SHARPSL_BATCHK_TIME (msecs_to_jiffies(15*1000)) /* 15 sec */
|
||||
#define SHARPSL_BATCHK_TIME_SUSPEND (60*10) /* 10 min */
|
||||
|
||||
#define SHARPSL_WAIT_CO_TIME 15 /* 15 sec */
|
||||
#define SHARPSL_WAIT_DISCHARGE_ON 100 /* 100 msec */
|
||||
#define SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP 10 /* 10 msec */
|
||||
|
|
@ -575,6 +576,9 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
|
|||
while (corgi_enter_suspend(alarm_time,alarm_status,state))
|
||||
{}
|
||||
|
||||
if (sharpsl_pm.machinfo->earlyresume)
|
||||
sharpsl_pm.machinfo->earlyresume();
|
||||
|
||||
dev_dbg(sharpsl_pm.dev, "SharpSL resuming...\n");
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -126,6 +126,7 @@ CONFIG_CRUNCH=y
|
|||
# EP93xx Platforms
|
||||
#
|
||||
CONFIG_MACH_EDB9302=y
|
||||
CONFIG_MACH_EDB9312=y
|
||||
CONFIG_MACH_EDB9315=y
|
||||
CONFIG_MACH_EDB9315A=y
|
||||
CONFIG_MACH_GESBC9312=y
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,50 +1,63 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.12-rc1-bk2
|
||||
# Sun Mar 27 17:33:39 2005
|
||||
# Linux kernel version: 2.6.18-rc7
|
||||
# Tue Sep 19 00:30:42 2006
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CLEAN_COMPILE=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_KOBJECT_UEVENT=y
|
||||
# CONFIG_IKCONFIG is not set
|
||||
# CONFIG_RELAY is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_UID16=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_CC_ALIGN_FUNCTIONS=0
|
||||
CONFIG_CC_ALIGN_LABELS=0
|
||||
CONFIG_CC_ALIGN_LOOPS=0
|
||||
CONFIG_CC_ALIGN_JUMPS=0
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_SLOB is not set
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
|
|
@ -52,24 +65,52 @@ CONFIG_BASE_SMALL=0
|
|||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_OBSOLETE_MODPARM=y
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
|
||||
#
|
||||
# System Type
|
||||
#
|
||||
# CONFIG_ARCH_AAEC2000 is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_REALVIEW is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_AT91 is not set
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_EP93XX is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
# CONFIG_ARCH_NETX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_IOP32X is not set
|
||||
CONFIG_ARCH_IOP33X=y
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_IXP23XX is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_PNX4008 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
|
|
@ -77,28 +118,17 @@ CONFIG_ARCH_IOP3XX=y
|
|||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
||||
#
|
||||
# IOP3xx Implementation Options
|
||||
# IOP33x Implementation Options
|
||||
#
|
||||
|
||||
#
|
||||
# IOP3xx Platform Types
|
||||
# IOP33x Platform Types
|
||||
#
|
||||
# CONFIG_ARCH_IQ80321 is not set
|
||||
# CONFIG_ARCH_IQ31244 is not set
|
||||
# CONFIG_ARCH_IQ80331 is not set
|
||||
CONFIG_ARCH_IQ80331=y
|
||||
CONFIG_MACH_IQ80332=y
|
||||
# CONFIG_ARCH_EP80219 is not set
|
||||
CONFIG_ARCH_IOP331=y
|
||||
|
||||
#
|
||||
# IOP3xx Chipset Features
|
||||
#
|
||||
# CONFIG_IOP331_STEPD is not set
|
||||
CONFIG_PLAT_IOP=y
|
||||
|
||||
#
|
||||
# Processor Type
|
||||
|
|
@ -109,7 +139,6 @@ CONFIG_CPU_32v5=y
|
|||
CONFIG_CPU_ABRT_EV5T=y
|
||||
CONFIG_CPU_CACHE_VIVT=y
|
||||
CONFIG_CPU_TLB_V4WBI=y
|
||||
CONFIG_CPU_MINICACHE=y
|
||||
|
||||
#
|
||||
# Processor Features
|
||||
|
|
@ -121,8 +150,7 @@ CONFIG_XSCALE_PMU=y
|
|||
# Bus support
|
||||
#
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_PCI_LEGACY_PROC is not set
|
||||
CONFIG_PCI_NAMES=y
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
|
|
@ -133,6 +161,19 @@ CONFIG_PCI_NAMES=y
|
|||
# Kernel Features
|
||||
#
|
||||
# CONFIG_PREEMPT is not set
|
||||
# CONFIG_NO_IDLE_HZ is not set
|
||||
CONFIG_HZ=100
|
||||
# CONFIG_AEABI is not set
|
||||
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4096
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
|
|
@ -140,7 +181,7 @@ CONFIG_ALIGNMENT_TRAP=y
|
|||
#
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp"
|
||||
# CONFIG_XIP_KERNEL is not set
|
||||
|
||||
#
|
||||
|
|
@ -166,6 +207,93 @@ CONFIG_BINFMT_AOUT=y
|
|||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
# CONFIG_APM is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
# CONFIG_NETDEBUG is not set
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_BIC=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# DCCP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_DCCP is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
|
||||
#
|
||||
# TIPC Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
|
|
@ -177,6 +305,13 @@ CONFIG_BINFMT_AOUT=y
|
|||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
|
|
@ -200,6 +335,7 @@ CONFIG_MTD_BLOCK=y
|
|||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
|
|
@ -222,6 +358,7 @@ CONFIG_MTD_CFI_I1=y
|
|||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
# CONFIG_MTD_OTP is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
# CONFIG_MTD_CFI_AMDSTD is not set
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
|
|
@ -229,18 +366,18 @@ CONFIG_MTD_CFI_UTIL=y
|
|||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
# CONFIG_MTD_XIP is not set
|
||||
# CONFIG_MTD_OBSOLETE_CHIPS is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0xc0000000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x00800000
|
||||
CONFIG_MTD_PHYSMAP_START=0x0
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x0
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
||||
# CONFIG_MTD_ARM_INTEGRATOR is not set
|
||||
# CONFIG_MTD_EDB7312 is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
|
|
@ -249,7 +386,6 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
|||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLKMTD is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
|
|
@ -264,6 +400,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
|||
#
|
||||
# CONFIG_MTD_NAND is not set
|
||||
|
||||
#
|
||||
# OneNAND Flash Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
|
|
@ -276,7 +417,6 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
|||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_CPQ_DA is not set
|
||||
# CONFIG_BLK_CPQ_CISS_DA is not set
|
||||
# CONFIG_BLK_DEV_DAC960 is not set
|
||||
|
|
@ -288,17 +428,9 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
|||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
|
|
@ -309,6 +441,7 @@ CONFIG_IOSCHED_CFQ=y
|
|||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_PROC_FS=y
|
||||
|
||||
|
|
@ -320,6 +453,7 @@ CONFIG_BLK_DEV_SD=y
|
|||
# CONFIG_CHR_DEV_OSST is not set
|
||||
# CONFIG_BLK_DEV_SR is not set
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
# CONFIG_CHR_DEV_SCH is not set
|
||||
|
||||
#
|
||||
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
|
||||
|
|
@ -334,10 +468,12 @@ CONFIG_CHR_DEV_SG=y
|
|||
# CONFIG_SCSI_SPI_ATTRS is not set
|
||||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_ATTRS is not set
|
||||
|
||||
#
|
||||
# SCSI low-level drivers
|
||||
#
|
||||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
# CONFIG_SCSI_ACARD is not set
|
||||
|
|
@ -348,25 +484,19 @@ CONFIG_CHR_DEV_SG=y
|
|||
# CONFIG_SCSI_DPT_I2O is not set
|
||||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
# CONFIG_MEGARAID_SAS is not set
|
||||
# CONFIG_SCSI_SATA is not set
|
||||
# CONFIG_SCSI_BUSLOGIC is not set
|
||||
# CONFIG_SCSI_HPTIOP is not set
|
||||
# CONFIG_SCSI_DMX3191D is not set
|
||||
# CONFIG_SCSI_EATA is not set
|
||||
# CONFIG_SCSI_FUTURE_DOMAIN is not set
|
||||
# CONFIG_SCSI_GDTH is not set
|
||||
# CONFIG_SCSI_IPS is not set
|
||||
# CONFIG_SCSI_INITIO is not set
|
||||
# CONFIG_SCSI_INIA100 is not set
|
||||
# CONFIG_SCSI_SYM53C8XX_2 is not set
|
||||
# CONFIG_SCSI_IPR is not set
|
||||
# CONFIG_SCSI_QLOGIC_FC is not set
|
||||
# CONFIG_SCSI_QLOGIC_1280 is not set
|
||||
CONFIG_SCSI_QLA2XXX=y
|
||||
# CONFIG_SCSI_QLA21XX is not set
|
||||
# CONFIG_SCSI_QLA22XX is not set
|
||||
# CONFIG_SCSI_QLA2300 is not set
|
||||
# CONFIG_SCSI_QLA2322 is not set
|
||||
# CONFIG_SCSI_QLA6312 is not set
|
||||
# CONFIG_SCSI_QLA_FC is not set
|
||||
# CONFIG_SCSI_LPFC is not set
|
||||
# CONFIG_SCSI_DC395x is not set
|
||||
# CONFIG_SCSI_DC390T is not set
|
||||
# CONFIG_SCSI_NSP32 is not set
|
||||
|
|
@ -381,8 +511,7 @@ CONFIG_MD_LINEAR=y
|
|||
CONFIG_MD_RAID0=y
|
||||
CONFIG_MD_RAID1=y
|
||||
# CONFIG_MD_RAID10 is not set
|
||||
CONFIG_MD_RAID5=y
|
||||
# CONFIG_MD_RAID6 is not set
|
||||
# CONFIG_MD_RAID456 is not set
|
||||
# CONFIG_MD_MULTIPATH is not set
|
||||
# CONFIG_MD_FAULTY is not set
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
|
|
@ -396,6 +525,9 @@ CONFIG_BLK_DEV_DM=y
|
|||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
# CONFIG_FUSION_SPI is not set
|
||||
# CONFIG_FUSION_FC is not set
|
||||
# CONFIG_FUSION_SAS is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
|
|
@ -408,71 +540,8 @@ CONFIG_BLK_DEV_DM=y
|
|||
# CONFIG_I2O is not set
|
||||
|
||||
#
|
||||
# Networking support
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
# CONFIG_NETLINK_DEV is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_IP_TCPDIAG=y
|
||||
# CONFIG_IP_TCPDIAG_IPV6 is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_NET_CLS_ROUTE is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
|
|
@ -484,6 +553,10 @@ CONFIG_NETDEVICES=y
|
|||
#
|
||||
# CONFIG_ARCNET is not set
|
||||
|
||||
#
|
||||
# PHY device support
|
||||
#
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
|
|
@ -501,14 +574,20 @@ CONFIG_E1000_NAPI=y
|
|||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
# CONFIG_R8169 is not set
|
||||
# CONFIG_SIS190 is not set
|
||||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
# CONFIG_CHELSIO_T1 is not set
|
||||
# CONFIG_IXGB is not set
|
||||
# CONFIG_S2IO is not set
|
||||
# CONFIG_MYRI10GE is not set
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
|
|
@ -531,6 +610,8 @@ CONFIG_E1000_NAPI=y
|
|||
# CONFIG_NET_FC is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
|
|
@ -568,7 +649,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
|||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
|
||||
#
|
||||
# Character devices
|
||||
|
|
@ -576,6 +656,7 @@ CONFIG_SOUND_GAMEPORT=y
|
|||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
|
|
@ -583,7 +664,9 @@ CONFIG_HW_CONSOLE=y
|
|||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_PCI=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
||||
#
|
||||
|
|
@ -591,6 +674,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
|
|||
#
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
|
@ -604,8 +688,8 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
|
|
@ -620,6 +704,7 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_TELCLOCK is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
|
|
@ -644,14 +729,13 @@ CONFIG_I2C_CHARDEV=y
|
|||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_I810 is not set
|
||||
CONFIG_I2C_IOP3XX=y
|
||||
# CONFIG_I2C_ISA is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
CONFIG_I2C_IOP3XX=y
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_OCORES is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_PROSAVAGE is not set
|
||||
# CONFIG_I2C_SAVAGE4 is not set
|
||||
# CONFIG_SCx200_ACB is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
|
|
@ -662,15 +746,45 @@ CONFIG_I2C_IOP3XX=y
|
|||
# CONFIG_I2C_PCA_ISA is not set
|
||||
|
||||
#
|
||||
# Hardware Sensors Chip support
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_I2C_SENSOR is not set
|
||||
# CONFIG_SENSORS_DS1337 is not set
|
||||
# CONFIG_SENSORS_DS1374 is not set
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
|
||||
#
|
||||
# Hardware Monitoring support
|
||||
#
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ADM9240 is not set
|
||||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_ATXP1 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
|
|
@ -685,36 +799,45 @@ CONFIG_I2C_IOP3XX=y
|
|||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47M192 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83791D is not set
|
||||
# CONFIG_SENSORS_W83792D is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
|
||||
#
|
||||
# Other I2C Chip support
|
||||
#
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_RTC8564 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
CONFIG_VIDEO_V4L2=y
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
|
|
@ -724,6 +847,7 @@ CONFIG_I2C_IOP3XX=y
|
|||
#
|
||||
# Graphics support
|
||||
#
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
|
|
@ -731,6 +855,7 @@ CONFIG_I2C_IOP3XX=y
|
|||
#
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
|
|
@ -742,8 +867,13 @@ CONFIG_DUMMY_CONSOLE=y
|
|||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
|
|
@ -754,11 +884,18 @@ CONFIG_USB_ARCH_HAS_OHCI=y
|
|||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
CONFIG_RTC_LIB=y
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_XATTR=y
|
||||
# CONFIG_EXT3_FS_POSIX_ACL is not set
|
||||
|
|
@ -768,22 +905,22 @@ CONFIG_JBD=y
|
|||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
|
||||
#
|
||||
# XFS support
|
||||
#
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_XFS_EXPORT=y
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_XFS_QUOTA is not set
|
||||
CONFIG_XFS_SECURITY=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
|
|
@ -803,12 +940,10 @@ CONFIG_DNOTIFY=y
|
|||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_DEVFS_FS is not set
|
||||
# CONFIG_DEVPTS_FS_XATTR is not set
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_XATTR is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
|
|
@ -834,16 +969,19 @@ CONFIG_RAMFS=y
|
|||
#
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
# CONFIG_NFS_V4 is not set
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
CONFIG_NFSD=y
|
||||
CONFIG_NFSD_V3=y
|
||||
# CONFIG_NFSD_V3_ACL is not set
|
||||
# CONFIG_NFSD_V4 is not set
|
||||
# CONFIG_NFSD_TCP is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
|
|
@ -852,6 +990,7 @@ CONFIG_SUNRPC=y
|
|||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
|
|
@ -871,6 +1010,7 @@ CONFIG_MSDOS_PARTITION=y
|
|||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_KARMA_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
|
||||
#
|
||||
|
|
@ -887,11 +1027,34 @@ CONFIG_MSDOS_PARTITION=y
|
|||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_RWSEMS is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
# CONFIG_DEBUG_INFO is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_UNWIND_INFO is not set
|
||||
# CONFIG_FORCED_INLINING is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
CONFIG_DEBUG_USER=y
|
||||
# CONFIG_DEBUG_WAITQ is not set
|
||||
# CONFIG_DEBUG_ERRORS is not set
|
||||
CONFIG_DEBUG_LL=y
|
||||
# CONFIG_DEBUG_ICEDCC is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
|
|
@ -912,5 +1075,7 @@ CONFIG_DEBUG_USER=y
|
|||
# Library routines
|
||||
#
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC32 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_PLIST=y
|
||||
|
|
@ -1,922 +0,0 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.12-rc1-bk2
|
||||
# Sun Mar 27 02:10:38 2005
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CLEAN_COMPILE=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_KOBJECT_UEVENT=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_CC_ALIGN_FUNCTIONS=0
|
||||
CONFIG_CC_ALIGN_LABELS=0
|
||||
CONFIG_CC_ALIGN_LOOPS=0
|
||||
CONFIG_CC_ALIGN_JUMPS=0
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_OBSOLETE_MODPARM=y
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# System Type
|
||||
#
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
||||
#
|
||||
# IOP3xx Implementation Options
|
||||
#
|
||||
|
||||
#
|
||||
# IOP3xx Platform Types
|
||||
#
|
||||
# CONFIG_ARCH_IQ80321 is not set
|
||||
CONFIG_ARCH_IQ31244=y
|
||||
# CONFIG_ARCH_IQ80331 is not set
|
||||
# CONFIG_MACH_IQ80332 is not set
|
||||
# CONFIG_ARCH_EP80219 is not set
|
||||
CONFIG_ARCH_IOP321=y
|
||||
# CONFIG_ARCH_IOP331 is not set
|
||||
|
||||
#
|
||||
# IOP3xx Chipset Features
|
||||
#
|
||||
|
||||
#
|
||||
# Processor Type
|
||||
#
|
||||
CONFIG_CPU_32=y
|
||||
CONFIG_CPU_XSCALE=y
|
||||
CONFIG_CPU_32v5=y
|
||||
CONFIG_CPU_ABRT_EV5T=y
|
||||
CONFIG_CPU_CACHE_VIVT=y
|
||||
CONFIG_CPU_TLB_V4WBI=y
|
||||
CONFIG_CPU_MINICACHE=y
|
||||
|
||||
#
|
||||
# Processor Features
|
||||
#
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_XSCALE_PMU=y
|
||||
|
||||
#
|
||||
# Bus support
|
||||
#
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_PCI_LEGACY_PROC is not set
|
||||
CONFIG_PCI_NAMES=y
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# Kernel Features
|
||||
#
|
||||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
# Boot options
|
||||
#
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
|
||||
# CONFIG_XIP_KERNEL is not set
|
||||
|
||||
#
|
||||
# Floating point emulation
|
||||
#
|
||||
|
||||
#
|
||||
# At least one emulation must be selected
|
||||
#
|
||||
CONFIG_FPE_NWFPE=y
|
||||
# CONFIG_FPE_NWFPE_XP is not set
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
|
||||
#
|
||||
# Userspace binary formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
CONFIG_BINFMT_AOUT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_ARTHUR is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
|
||||
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
|
||||
CONFIG_MTD_REDBOOT_PARTS_READONLY=y
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
# CONFIG_MTD_AFS_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
# CONFIG_MTD_CFI_AMDSTD is not set
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
# CONFIG_MTD_XIP is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0xf0000000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x00800000
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
|
||||
# CONFIG_MTD_ARM_INTEGRATOR is not set
|
||||
# CONFIG_MTD_EDB7312 is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLKMTD is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
|
||||
#
|
||||
# NAND Flash Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_NAND is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_CPQ_DA is not set
|
||||
# CONFIG_BLK_CPQ_CISS_DA is not set
|
||||
# CONFIG_BLK_DEV_DAC960 is not set
|
||||
# CONFIG_BLK_DEV_UMEM is not set
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_PROC_FS=y
|
||||
|
||||
#
|
||||
# SCSI support type (disk, tape, CD-ROM)
|
||||
#
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
# CONFIG_CHR_DEV_ST is not set
|
||||
# CONFIG_CHR_DEV_OSST is not set
|
||||
# CONFIG_BLK_DEV_SR is not set
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
|
||||
#
|
||||
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
|
||||
#
|
||||
# CONFIG_SCSI_MULTI_LUN is not set
|
||||
# CONFIG_SCSI_CONSTANTS is not set
|
||||
# CONFIG_SCSI_LOGGING is not set
|
||||
|
||||
#
|
||||
# SCSI Transport Attributes
|
||||
#
|
||||
# CONFIG_SCSI_SPI_ATTRS is not set
|
||||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
|
||||
#
|
||||
# SCSI low-level drivers
|
||||
#
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
# CONFIG_SCSI_ACARD is not set
|
||||
# CONFIG_SCSI_AACRAID is not set
|
||||
# CONFIG_SCSI_AIC7XXX is not set
|
||||
# CONFIG_SCSI_AIC7XXX_OLD is not set
|
||||
# CONFIG_SCSI_AIC79XX is not set
|
||||
# CONFIG_SCSI_DPT_I2O is not set
|
||||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
# CONFIG_SCSI_SATA is not set
|
||||
# CONFIG_SCSI_BUSLOGIC is not set
|
||||
# CONFIG_SCSI_DMX3191D is not set
|
||||
# CONFIG_SCSI_EATA is not set
|
||||
# CONFIG_SCSI_FUTURE_DOMAIN is not set
|
||||
# CONFIG_SCSI_GDTH is not set
|
||||
# CONFIG_SCSI_IPS is not set
|
||||
# CONFIG_SCSI_INITIO is not set
|
||||
# CONFIG_SCSI_INIA100 is not set
|
||||
# CONFIG_SCSI_SYM53C8XX_2 is not set
|
||||
# CONFIG_SCSI_IPR is not set
|
||||
# CONFIG_SCSI_QLOGIC_FC is not set
|
||||
# CONFIG_SCSI_QLOGIC_1280 is not set
|
||||
CONFIG_SCSI_QLA2XXX=y
|
||||
# CONFIG_SCSI_QLA21XX is not set
|
||||
# CONFIG_SCSI_QLA22XX is not set
|
||||
# CONFIG_SCSI_QLA2300 is not set
|
||||
# CONFIG_SCSI_QLA2322 is not set
|
||||
# CONFIG_SCSI_QLA6312 is not set
|
||||
# CONFIG_SCSI_DC395x is not set
|
||||
# CONFIG_SCSI_DC390T is not set
|
||||
# CONFIG_SCSI_NSP32 is not set
|
||||
# CONFIG_SCSI_DEBUG is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=y
|
||||
# CONFIG_MD_LINEAR is not set
|
||||
CONFIG_MD_RAID0=y
|
||||
CONFIG_MD_RAID1=y
|
||||
# CONFIG_MD_RAID10 is not set
|
||||
CONFIG_MD_RAID5=y
|
||||
# CONFIG_MD_RAID6 is not set
|
||||
# CONFIG_MD_MULTIPATH is not set
|
||||
# CONFIG_MD_FAULTY is not set
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
# CONFIG_DM_CRYPT is not set
|
||||
# CONFIG_DM_SNAPSHOT is not set
|
||||
# CONFIG_DM_MIRROR is not set
|
||||
# CONFIG_DM_ZERO is not set
|
||||
# CONFIG_DM_MULTIPATH is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
# CONFIG_I2O is not set
|
||||
|
||||
#
|
||||
# Networking support
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
# CONFIG_NETLINK_DEV is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_IP_TCPDIAG=y
|
||||
# CONFIG_IP_TCPDIAG_IPV6 is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_NET_CLS_ROUTE is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
|
||||
#
|
||||
# ARCnet devices
|
||||
#
|
||||
# CONFIG_ARCNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
# CONFIG_NET_ETHERNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
#
|
||||
# CONFIG_ACENIC is not set
|
||||
# CONFIG_DL2K is not set
|
||||
CONFIG_E1000=y
|
||||
CONFIG_E1000_NAPI=y
|
||||
# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
# CONFIG_R8169 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
# CONFIG_IXGB is not set
|
||||
# CONFIG_S2IO is not set
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
# Wireless LAN (non-hamradio)
|
||||
#
|
||||
# CONFIG_NET_RADIO is not set
|
||||
|
||||
#
|
||||
# Wan interfaces
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_NET_FC is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
|
||||
#
|
||||
# Ftape, the floppy tape device driver
|
||||
#
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
|
||||
#
|
||||
# I2C Algorithms
|
||||
#
|
||||
# CONFIG_I2C_ALGOBIT is not set
|
||||
# CONFIG_I2C_ALGOPCF is not set
|
||||
# CONFIG_I2C_ALGOPCA is not set
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
# CONFIG_I2C_ALI1535 is not set
|
||||
# CONFIG_I2C_ALI1563 is not set
|
||||
# CONFIG_I2C_ALI15X3 is not set
|
||||
# CONFIG_I2C_AMD756 is not set
|
||||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_I810 is not set
|
||||
CONFIG_I2C_IOP3XX=y
|
||||
# CONFIG_I2C_ISA is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_PROSAVAGE is not set
|
||||
# CONFIG_I2C_SAVAGE4 is not set
|
||||
# CONFIG_SCx200_ACB is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
# CONFIG_I2C_STUB is not set
|
||||
# CONFIG_I2C_VIA is not set
|
||||
# CONFIG_I2C_VIAPRO is not set
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
# CONFIG_I2C_PCA_ISA is not set
|
||||
|
||||
#
|
||||
# Hardware Sensors Chip support
|
||||
#
|
||||
# CONFIG_I2C_SENSOR is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
|
||||
#
|
||||
# Other I2C Chip support
|
||||
#
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_RTC8564 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Console display driver support
|
||||
#
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_XATTR=y
|
||||
# CONFIG_EXT3_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT3_FS_SECURITY is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
|
||||
#
|
||||
# XFS support
|
||||
#
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_XFS_EXPORT=y
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_XFS_QUOTA is not set
|
||||
CONFIG_XFS_SECURITY=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_DEVFS_FS is not set
|
||||
# CONFIG_DEVPTS_FS_XATTR is not set
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_XATTR is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS_FS is not set
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_FS_DEBUG=0
|
||||
# CONFIG_JFFS2_FS_NAND is not set
|
||||
# CONFIG_JFFS2_FS_NOR_ECC is not set
|
||||
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
|
||||
CONFIG_JFFS2_ZLIB=y
|
||||
CONFIG_JFFS2_RTIME=y
|
||||
# CONFIG_JFFS2_RUBIN is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V4 is not set
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
CONFIG_NFSD=y
|
||||
CONFIG_NFSD_V3=y
|
||||
# CONFIG_NFSD_V4 is not set
|
||||
# CONFIG_NFSD_TCP is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_ACORN_PARTITION is not set
|
||||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_BSD_DISKLABEL is not set
|
||||
# CONFIG_MINIX_SUBPARTITION is not set
|
||||
# CONFIG_SOLARIS_X86_PARTITION is not set
|
||||
# CONFIG_UNIXWARE_DISKLABEL is not set
|
||||
# CONFIG_LDM_PARTITION is not set
|
||||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
|
|
@ -1,843 +0,0 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.12-rc1-bk2
|
||||
# Sun Mar 27 13:24:10 2005
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CLEAN_COMPILE=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_KOBJECT_UEVENT=y
|
||||
# CONFIG_IKCONFIG is not set
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_CC_ALIGN_FUNCTIONS=0
|
||||
CONFIG_CC_ALIGN_LABELS=0
|
||||
CONFIG_CC_ALIGN_LOOPS=0
|
||||
CONFIG_CC_ALIGN_JUMPS=0
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_OBSOLETE_MODPARM=y
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# System Type
|
||||
#
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
||||
#
|
||||
# IOP3xx Implementation Options
|
||||
#
|
||||
|
||||
#
|
||||
# IOP3xx Platform Types
|
||||
#
|
||||
CONFIG_ARCH_IQ80321=y
|
||||
# CONFIG_ARCH_IQ31244 is not set
|
||||
# CONFIG_ARCH_IQ80331 is not set
|
||||
# CONFIG_MACH_IQ80332 is not set
|
||||
# CONFIG_ARCH_EP80219 is not set
|
||||
CONFIG_ARCH_IOP321=y
|
||||
# CONFIG_ARCH_IOP331 is not set
|
||||
|
||||
#
|
||||
# IOP3xx Chipset Features
|
||||
#
|
||||
|
||||
#
|
||||
# Processor Type
|
||||
#
|
||||
CONFIG_CPU_32=y
|
||||
CONFIG_CPU_XSCALE=y
|
||||
CONFIG_CPU_32v5=y
|
||||
CONFIG_CPU_ABRT_EV5T=y
|
||||
CONFIG_CPU_CACHE_VIVT=y
|
||||
CONFIG_CPU_TLB_V4WBI=y
|
||||
CONFIG_CPU_MINICACHE=y
|
||||
|
||||
#
|
||||
# Processor Features
|
||||
#
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_XSCALE_PMU=y
|
||||
|
||||
#
|
||||
# Bus support
|
||||
#
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_PCI_LEGACY_PROC is not set
|
||||
CONFIG_PCI_NAMES=y
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# Kernel Features
|
||||
#
|
||||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
# Boot options
|
||||
#
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
|
||||
# CONFIG_XIP_KERNEL is not set
|
||||
|
||||
#
|
||||
# Floating point emulation
|
||||
#
|
||||
|
||||
#
|
||||
# At least one emulation must be selected
|
||||
#
|
||||
CONFIG_FPE_NWFPE=y
|
||||
# CONFIG_FPE_NWFPE_XP is not set
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
|
||||
#
|
||||
# Userspace binary formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
CONFIG_BINFMT_AOUT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_ARTHUR is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
|
||||
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
|
||||
CONFIG_MTD_REDBOOT_PARTS_READONLY=y
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
# CONFIG_MTD_AFS_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
# CONFIG_MTD_CFI_AMDSTD is not set
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
# CONFIG_MTD_XIP is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0xf0000000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x00800000
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
||||
# CONFIG_MTD_ARM_INTEGRATOR is not set
|
||||
# CONFIG_MTD_EDB7312 is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLKMTD is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
|
||||
#
|
||||
# NAND Flash Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_NAND is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_CPQ_DA is not set
|
||||
# CONFIG_BLK_CPQ_CISS_DA is not set
|
||||
# CONFIG_BLK_DEV_DAC960 is not set
|
||||
# CONFIG_BLK_DEV_UMEM is not set
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_SCSI is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
# CONFIG_I2O is not set
|
||||
|
||||
#
|
||||
# Networking support
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
# CONFIG_NETLINK_DEV is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_IP_TCPDIAG=y
|
||||
# CONFIG_IP_TCPDIAG_IPV6 is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_NET_CLS_ROUTE is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
|
||||
#
|
||||
# ARCnet devices
|
||||
#
|
||||
# CONFIG_ARCNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
# CONFIG_NET_ETHERNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
#
|
||||
# CONFIG_ACENIC is not set
|
||||
# CONFIG_DL2K is not set
|
||||
CONFIG_E1000=y
|
||||
CONFIG_E1000_NAPI=y
|
||||
# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
# CONFIG_R8169 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
# CONFIG_IXGB is not set
|
||||
# CONFIG_S2IO is not set
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
# Wireless LAN (non-hamradio)
|
||||
#
|
||||
# CONFIG_NET_RADIO is not set
|
||||
|
||||
#
|
||||
# Wan interfaces
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
|
||||
#
|
||||
# Ftape, the floppy tape device driver
|
||||
#
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
|
||||
#
|
||||
# I2C Algorithms
|
||||
#
|
||||
# CONFIG_I2C_ALGOBIT is not set
|
||||
# CONFIG_I2C_ALGOPCF is not set
|
||||
# CONFIG_I2C_ALGOPCA is not set
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
# CONFIG_I2C_ALI1535 is not set
|
||||
# CONFIG_I2C_ALI1563 is not set
|
||||
# CONFIG_I2C_ALI15X3 is not set
|
||||
# CONFIG_I2C_AMD756 is not set
|
||||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_I810 is not set
|
||||
CONFIG_I2C_IOP3XX=y
|
||||
# CONFIG_I2C_ISA is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_PROSAVAGE is not set
|
||||
# CONFIG_I2C_SAVAGE4 is not set
|
||||
# CONFIG_SCx200_ACB is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
# CONFIG_I2C_STUB is not set
|
||||
# CONFIG_I2C_VIA is not set
|
||||
# CONFIG_I2C_VIAPRO is not set
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
# CONFIG_I2C_PCA_ISA is not set
|
||||
|
||||
#
|
||||
# Hardware Sensors Chip support
|
||||
#
|
||||
# CONFIG_I2C_SENSOR is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
|
||||
#
|
||||
# Other I2C Chip support
|
||||
#
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_RTC8564 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Console display driver support
|
||||
#
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_XATTR=y
|
||||
# CONFIG_EXT3_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT3_FS_SECURITY is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
|
||||
#
|
||||
# XFS support
|
||||
#
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_XFS_EXPORT=y
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_XFS_QUOTA is not set
|
||||
CONFIG_XFS_SECURITY=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_DEVFS_FS is not set
|
||||
# CONFIG_DEVPTS_FS_XATTR is not set
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_XATTR is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS_FS is not set
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_FS_DEBUG=0
|
||||
# CONFIG_JFFS2_FS_NAND is not set
|
||||
# CONFIG_JFFS2_FS_NOR_ECC is not set
|
||||
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
|
||||
CONFIG_JFFS2_ZLIB=y
|
||||
CONFIG_JFFS2_RTIME=y
|
||||
# CONFIG_JFFS2_RUBIN is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V4 is not set
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
CONFIG_NFSD=y
|
||||
CONFIG_NFSD_V3=y
|
||||
# CONFIG_NFSD_V4 is not set
|
||||
# CONFIG_NFSD_TCP is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_ACORN_PARTITION is not set
|
||||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_BSD_DISKLABEL is not set
|
||||
# CONFIG_MINIX_SUBPARTITION is not set
|
||||
# CONFIG_SOLARIS_X86_PARTITION is not set
|
||||
# CONFIG_UNIXWARE_DISKLABEL is not set
|
||||
# CONFIG_LDM_PARTITION is not set
|
||||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
|
|
@ -1,916 +0,0 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.12-rc1-bk2
|
||||
# Sun Mar 27 15:13:37 2005
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CLEAN_COMPILE=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_KOBJECT_UEVENT=y
|
||||
# CONFIG_IKCONFIG is not set
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_CC_ALIGN_FUNCTIONS=0
|
||||
CONFIG_CC_ALIGN_LABELS=0
|
||||
CONFIG_CC_ALIGN_LOOPS=0
|
||||
CONFIG_CC_ALIGN_JUMPS=0
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_OBSOLETE_MODPARM=y
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# System Type
|
||||
#
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
CONFIG_ARCH_IOP3XX=y
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
||||
#
|
||||
# IOP3xx Implementation Options
|
||||
#
|
||||
|
||||
#
|
||||
# IOP3xx Platform Types
|
||||
#
|
||||
# CONFIG_ARCH_IQ80321 is not set
|
||||
# CONFIG_ARCH_IQ31244 is not set
|
||||
CONFIG_ARCH_IQ80331=y
|
||||
# CONFIG_MACH_IQ80332 is not set
|
||||
# CONFIG_ARCH_EP80219 is not set
|
||||
CONFIG_ARCH_IOP331=y
|
||||
|
||||
#
|
||||
# IOP3xx Chipset Features
|
||||
#
|
||||
CONFIG_IOP331_STEPD=y
|
||||
|
||||
#
|
||||
# Processor Type
|
||||
#
|
||||
CONFIG_CPU_32=y
|
||||
CONFIG_CPU_XSCALE=y
|
||||
CONFIG_CPU_32v5=y
|
||||
CONFIG_CPU_ABRT_EV5T=y
|
||||
CONFIG_CPU_CACHE_VIVT=y
|
||||
CONFIG_CPU_TLB_V4WBI=y
|
||||
CONFIG_CPU_MINICACHE=y
|
||||
|
||||
#
|
||||
# Processor Features
|
||||
#
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_XSCALE_PMU=y
|
||||
|
||||
#
|
||||
# Bus support
|
||||
#
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_PCI_LEGACY_PROC is not set
|
||||
CONFIG_PCI_NAMES=y
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# Kernel Features
|
||||
#
|
||||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
# Boot options
|
||||
#
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
|
||||
# CONFIG_XIP_KERNEL is not set
|
||||
|
||||
#
|
||||
# Floating point emulation
|
||||
#
|
||||
|
||||
#
|
||||
# At least one emulation must be selected
|
||||
#
|
||||
CONFIG_FPE_NWFPE=y
|
||||
# CONFIG_FPE_NWFPE_XP is not set
|
||||
# CONFIG_FPE_FASTFPE is not set
|
||||
|
||||
#
|
||||
# Userspace binary formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
CONFIG_BINFMT_AOUT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_ARTHUR is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
|
||||
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
|
||||
CONFIG_MTD_REDBOOT_PARTS_READONLY=y
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
# CONFIG_MTD_AFS_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
||||
CONFIG_MTD_CFI_NOSWAP=y
|
||||
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
|
||||
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
|
||||
# CONFIG_MTD_CFI_GEOMETRY is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
# CONFIG_MTD_CFI_AMDSTD is not set
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
# CONFIG_MTD_XIP is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0xc0000000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x00800000
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
||||
# CONFIG_MTD_ARM_INTEGRATOR is not set
|
||||
# CONFIG_MTD_EDB7312 is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLKMTD is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
|
||||
#
|
||||
# NAND Flash Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_NAND is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_CPQ_DA is not set
|
||||
# CONFIG_BLK_CPQ_CISS_DA is not set
|
||||
# CONFIG_BLK_DEV_DAC960 is not set
|
||||
# CONFIG_BLK_DEV_UMEM is not set
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_PROC_FS=y
|
||||
|
||||
#
|
||||
# SCSI support type (disk, tape, CD-ROM)
|
||||
#
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
# CONFIG_CHR_DEV_ST is not set
|
||||
# CONFIG_CHR_DEV_OSST is not set
|
||||
# CONFIG_BLK_DEV_SR is not set
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
|
||||
#
|
||||
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
|
||||
#
|
||||
# CONFIG_SCSI_MULTI_LUN is not set
|
||||
# CONFIG_SCSI_CONSTANTS is not set
|
||||
# CONFIG_SCSI_LOGGING is not set
|
||||
|
||||
#
|
||||
# SCSI Transport Attributes
|
||||
#
|
||||
# CONFIG_SCSI_SPI_ATTRS is not set
|
||||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
|
||||
#
|
||||
# SCSI low-level drivers
|
||||
#
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
# CONFIG_SCSI_ACARD is not set
|
||||
# CONFIG_SCSI_AACRAID is not set
|
||||
# CONFIG_SCSI_AIC7XXX is not set
|
||||
# CONFIG_SCSI_AIC7XXX_OLD is not set
|
||||
# CONFIG_SCSI_AIC79XX is not set
|
||||
# CONFIG_SCSI_DPT_I2O is not set
|
||||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
# CONFIG_SCSI_SATA is not set
|
||||
# CONFIG_SCSI_BUSLOGIC is not set
|
||||
# CONFIG_SCSI_DMX3191D is not set
|
||||
# CONFIG_SCSI_EATA is not set
|
||||
# CONFIG_SCSI_FUTURE_DOMAIN is not set
|
||||
# CONFIG_SCSI_GDTH is not set
|
||||
# CONFIG_SCSI_IPS is not set
|
||||
# CONFIG_SCSI_INITIO is not set
|
||||
# CONFIG_SCSI_INIA100 is not set
|
||||
# CONFIG_SCSI_SYM53C8XX_2 is not set
|
||||
# CONFIG_SCSI_IPR is not set
|
||||
# CONFIG_SCSI_QLOGIC_FC is not set
|
||||
# CONFIG_SCSI_QLOGIC_1280 is not set
|
||||
CONFIG_SCSI_QLA2XXX=y
|
||||
# CONFIG_SCSI_QLA21XX is not set
|
||||
# CONFIG_SCSI_QLA22XX is not set
|
||||
# CONFIG_SCSI_QLA2300 is not set
|
||||
# CONFIG_SCSI_QLA2322 is not set
|
||||
# CONFIG_SCSI_QLA6312 is not set
|
||||
# CONFIG_SCSI_DC395x is not set
|
||||
# CONFIG_SCSI_DC390T is not set
|
||||
# CONFIG_SCSI_NSP32 is not set
|
||||
# CONFIG_SCSI_DEBUG is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=y
|
||||
CONFIG_MD_LINEAR=y
|
||||
CONFIG_MD_RAID0=y
|
||||
CONFIG_MD_RAID1=y
|
||||
# CONFIG_MD_RAID10 is not set
|
||||
CONFIG_MD_RAID5=y
|
||||
# CONFIG_MD_RAID6 is not set
|
||||
# CONFIG_MD_MULTIPATH is not set
|
||||
# CONFIG_MD_FAULTY is not set
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
# CONFIG_DM_CRYPT is not set
|
||||
# CONFIG_DM_SNAPSHOT is not set
|
||||
# CONFIG_DM_MIRROR is not set
|
||||
# CONFIG_DM_ZERO is not set
|
||||
# CONFIG_DM_MULTIPATH is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
# CONFIG_I2O is not set
|
||||
|
||||
#
|
||||
# Networking support
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
# CONFIG_NETLINK_DEV is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_IP_TCPDIAG=y
|
||||
# CONFIG_IP_TCPDIAG_IPV6 is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_NET_CLS_ROUTE is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
|
||||
#
|
||||
# ARCnet devices
|
||||
#
|
||||
# CONFIG_ARCNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
# CONFIG_NET_ETHERNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
#
|
||||
# CONFIG_ACENIC is not set
|
||||
# CONFIG_DL2K is not set
|
||||
CONFIG_E1000=y
|
||||
CONFIG_E1000_NAPI=y
|
||||
# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
# CONFIG_R8169 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
# CONFIG_IXGB is not set
|
||||
# CONFIG_S2IO is not set
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
# Wireless LAN (non-hamradio)
|
||||
#
|
||||
# CONFIG_NET_RADIO is not set
|
||||
|
||||
#
|
||||
# Wan interfaces
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_NET_FC is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
CONFIG_SOUND_GAMEPORT=y
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
|
||||
#
|
||||
# Ftape, the floppy tape device driver
|
||||
#
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
|
||||
#
|
||||
# I2C Algorithms
|
||||
#
|
||||
# CONFIG_I2C_ALGOBIT is not set
|
||||
# CONFIG_I2C_ALGOPCF is not set
|
||||
# CONFIG_I2C_ALGOPCA is not set
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
# CONFIG_I2C_ALI1535 is not set
|
||||
# CONFIG_I2C_ALI1563 is not set
|
||||
# CONFIG_I2C_ALI15X3 is not set
|
||||
# CONFIG_I2C_AMD756 is not set
|
||||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_I810 is not set
|
||||
CONFIG_I2C_IOP3XX=y
|
||||
# CONFIG_I2C_ISA is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_PROSAVAGE is not set
|
||||
# CONFIG_I2C_SAVAGE4 is not set
|
||||
# CONFIG_SCx200_ACB is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
# CONFIG_I2C_STUB is not set
|
||||
# CONFIG_I2C_VIA is not set
|
||||
# CONFIG_I2C_VIAPRO is not set
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
# CONFIG_I2C_PCA_ISA is not set
|
||||
|
||||
#
|
||||
# Hardware Sensors Chip support
|
||||
#
|
||||
# CONFIG_I2C_SENSOR is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
|
||||
#
|
||||
# Other I2C Chip support
|
||||
#
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_RTC8564 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Console display driver support
|
||||
#
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_XATTR=y
|
||||
# CONFIG_EXT3_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT3_FS_SECURITY is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
|
||||
#
|
||||
# XFS support
|
||||
#
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_XFS_EXPORT=y
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_XFS_QUOTA is not set
|
||||
CONFIG_XFS_SECURITY=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_DEVFS_FS is not set
|
||||
# CONFIG_DEVPTS_FS_XATTR is not set
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_XATTR is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V4 is not set
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
CONFIG_NFSD=y
|
||||
CONFIG_NFSD_V3=y
|
||||
# CONFIG_NFSD_V4 is not set
|
||||
# CONFIG_NFSD_TCP is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_EXPORTFS=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_ACORN_PARTITION is not set
|
||||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_BSD_DISKLABEL is not set
|
||||
# CONFIG_MINIX_SUBPARTITION is not set
|
||||
# CONFIG_SOLARIS_X86_PARTITION is not set
|
||||
# CONFIG_UNIXWARE_DISKLABEL is not set
|
||||
# CONFIG_LDM_PARTITION is not set
|
||||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC32 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
|
|
@ -1,14 +1,19 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.17-git9
|
||||
# Sun Jun 25 23:56:32 2006
|
||||
# Linux kernel version: 2.6.18
|
||||
# Wed Sep 20 20:27:31 2006
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
|
|
@ -26,14 +31,15 @@ CONFIG_SWAP=y
|
|||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
CONFIG_SYSCTL=y
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
# CONFIG_RELAY is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_UID16=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_UID16=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_ALL is not set
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
|
|
@ -46,6 +52,8 @@ CONFIG_FUTEX=y
|
|||
CONFIG_EPOLL=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_SLOB is not set
|
||||
|
|
@ -84,7 +92,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_INTEGRATOR is not set
|
||||
# CONFIG_ARCH_REALVIEW is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_AT91RM9200 is not set
|
||||
# CONFIG_ARCH_AT91 is not set
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_CO285 is not set
|
||||
|
|
@ -94,7 +102,8 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
# CONFIG_ARCH_NETX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_IOP3XX is not set
|
||||
# CONFIG_ARCH_IOP32X is not set
|
||||
# CONFIG_ARCH_IOP33X is not set
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_IXP23XX is not set
|
||||
|
|
@ -122,13 +131,18 @@ CONFIG_ARCH_SMDK2410=y
|
|||
CONFIG_ARCH_S3C2440=y
|
||||
CONFIG_SMDK2440_CPU2440=y
|
||||
CONFIG_SMDK2440_CPU2442=y
|
||||
CONFIG_MACH_S3C2413=y
|
||||
CONFIG_MACH_SMDK2413=y
|
||||
CONFIG_MACH_VR1000=y
|
||||
CONFIG_MACH_RX3715=y
|
||||
CONFIG_MACH_OTOM=y
|
||||
CONFIG_MACH_NEXCODER_2440=y
|
||||
CONFIG_MACH_VSTMS=y
|
||||
CONFIG_S3C2410_CLOCK=y
|
||||
CONFIG_S3C2410_PM=y
|
||||
CONFIG_CPU_S3C2410_DMA=y
|
||||
CONFIG_CPU_S3C2410=y
|
||||
CONFIG_S3C2412_PM=y
|
||||
CONFIG_CPU_S3C2412=y
|
||||
CONFIG_CPU_S3C244X=y
|
||||
CONFIG_CPU_S3C2440=y
|
||||
|
|
@ -156,7 +170,7 @@ CONFIG_S3C2410_LOWLEVEL_UART_PORT=0
|
|||
CONFIG_CPU_32=y
|
||||
CONFIG_CPU_ARM920T=y
|
||||
CONFIG_CPU_ARM926T=y
|
||||
CONFIG_CPU_32v4=y
|
||||
CONFIG_CPU_32v4T=y
|
||||
CONFIG_CPU_32v5=y
|
||||
CONFIG_CPU_ABRT_EV4T=y
|
||||
CONFIG_CPU_ABRT_EV5TJ=y
|
||||
|
|
@ -200,6 +214,7 @@ CONFIG_FLATMEM=y
|
|||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4096
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
|
|
@ -304,7 +319,6 @@ CONFIG_TCP_CONG_BIC=y
|
|||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_NET_DIVERT is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
|
|
@ -460,6 +474,7 @@ CONFIG_BLK_DEV_NBD=m
|
|||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
CONFIG_ATA_OVER_ETH=m
|
||||
|
|
@ -640,6 +655,7 @@ CONFIG_SERIO_LIBPS2=y
|
|||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||
CONFIG_SERIAL_NONSTANDARD=y
|
||||
# CONFIG_COMPUTONE is not set
|
||||
# CONFIG_ROCKETPORT is not set
|
||||
|
|
@ -716,6 +732,7 @@ CONFIG_S3C2410_WATCHDOG=y
|
|||
# USB-based Watchdog Cards
|
||||
#
|
||||
# CONFIG_USBPCWATCHDOG is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_NVRAM is not set
|
||||
CONFIG_S3C2410_RTC=y
|
||||
# CONFIG_DTLK is not set
|
||||
|
|
@ -857,12 +874,12 @@ CONFIG_VIDEO_V4L2=y
|
|||
#
|
||||
# Graphics support
|
||||
#
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
# CONFIG_FB_MACMODES is not set
|
||||
CONFIG_FB_FIRMWARE_EDID=y
|
||||
# CONFIG_FB_BACKLIGHT is not set
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
# CONFIG_FB_TILEBLITTING is not set
|
||||
|
|
@ -995,7 +1012,7 @@ CONFIG_USB_MON=y
|
|||
# CONFIG_USB_LEGOTOWER is not set
|
||||
# CONFIG_USB_LCD is not set
|
||||
# CONFIG_USB_LED is not set
|
||||
# CONFIG_USB_CY7C63 is not set
|
||||
# CONFIG_USB_CYPRESS_CY7C63 is not set
|
||||
# CONFIG_USB_CYTHERM is not set
|
||||
# CONFIG_USB_PHIDGETKIT is not set
|
||||
# CONFIG_USB_PHIDGETSERVO is not set
|
||||
|
|
@ -1095,6 +1112,7 @@ CONFIG_JFFS2_FS=y
|
|||
CONFIG_JFFS2_FS_DEBUG=0
|
||||
CONFIG_JFFS2_FS_WRITEBUFFER=y
|
||||
# CONFIG_JFFS2_SUMMARY is not set
|
||||
# CONFIG_JFFS2_FS_XATTR is not set
|
||||
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
|
||||
CONFIG_JFFS2_ZLIB=y
|
||||
CONFIG_JFFS2_RTIME=y
|
||||
|
|
@ -1202,14 +1220,19 @@ CONFIG_NLS_DEFAULT="iso8859-1"
|
|||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
CONFIG_DEBUG_MUTEXES=y
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
CONFIG_DEBUG_MUTEXES=y
|
||||
# CONFIG_DEBUG_RWSEMS is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
|
|
@ -1251,3 +1274,4 @@ CONFIG_CRC32=y
|
|||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/list.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/kthread.h>
|
||||
|
||||
#include <asm/apm.h> /* apm_power_info */
|
||||
#include <asm/system.h>
|
||||
|
|
@ -80,7 +81,7 @@ struct apm_user {
|
|||
*/
|
||||
static int suspends_pending;
|
||||
static int apm_disabled;
|
||||
static int arm_apm_active;
|
||||
static struct task_struct *kapmd_tsk;
|
||||
|
||||
static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue);
|
||||
static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
|
||||
|
|
@ -97,7 +98,6 @@ static LIST_HEAD(apm_user_list);
|
|||
* to be suspending the system.
|
||||
*/
|
||||
static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait);
|
||||
static DECLARE_COMPLETION(kapmd_exit);
|
||||
static DEFINE_SPINLOCK(kapmd_queue_lock);
|
||||
static struct apm_queue kapmd_queue;
|
||||
|
||||
|
|
@ -468,16 +468,13 @@ static int apm_get_info(char *buf, char **start, off_t fpos, int length)
|
|||
|
||||
static int kapmd(void *arg)
|
||||
{
|
||||
daemonize("kapmd");
|
||||
current->flags |= PF_NOFREEZE;
|
||||
|
||||
do {
|
||||
apm_event_t event;
|
||||
|
||||
wait_event_interruptible(kapmd_wait,
|
||||
!queue_empty(&kapmd_queue) || !arm_apm_active);
|
||||
!queue_empty(&kapmd_queue) || kthread_should_stop());
|
||||
|
||||
if (!arm_apm_active)
|
||||
if (kthread_should_stop())
|
||||
break;
|
||||
|
||||
spin_lock_irq(&kapmd_queue_lock);
|
||||
|
|
@ -508,7 +505,7 @@ static int kapmd(void *arg)
|
|||
}
|
||||
} while (1);
|
||||
|
||||
complete_and_exit(&kapmd_exit, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init apm_init(void)
|
||||
|
|
@ -520,13 +517,14 @@ static int __init apm_init(void)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
arm_apm_active = 1;
|
||||
|
||||
ret = kernel_thread(kapmd, NULL, CLONE_KERNEL);
|
||||
if (ret < 0) {
|
||||
arm_apm_active = 0;
|
||||
kapmd_tsk = kthread_create(kapmd, NULL, "kapmd");
|
||||
if (IS_ERR(kapmd_tsk)) {
|
||||
ret = PTR_ERR(kapmd_tsk);
|
||||
kapmd_tsk = NULL;
|
||||
return ret;
|
||||
}
|
||||
kapmd_tsk->flags |= PF_NOFREEZE;
|
||||
wake_up_process(kapmd_tsk);
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
create_proc_info_entry("apm", 0, NULL, apm_get_info);
|
||||
|
|
@ -535,10 +533,7 @@ static int __init apm_init(void)
|
|||
ret = misc_register(&apm_device);
|
||||
if (ret != 0) {
|
||||
remove_proc_entry("apm", NULL);
|
||||
|
||||
arm_apm_active = 0;
|
||||
wake_up(&kapmd_wait);
|
||||
wait_for_completion(&kapmd_exit);
|
||||
kthread_stop(kapmd_tsk);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
@ -549,9 +544,7 @@ static void __exit apm_exit(void)
|
|||
misc_deregister(&apm_device);
|
||||
remove_proc_entry("apm", NULL);
|
||||
|
||||
arm_apm_active = 0;
|
||||
wake_up(&kapmd_wait);
|
||||
wait_for_completion(&kapmd_exit);
|
||||
kthread_stop(kapmd_tsk);
|
||||
}
|
||||
|
||||
module_init(apm_init);
|
||||
|
|
|
|||
|
|
@ -21,6 +21,36 @@
|
|||
|
||||
#if defined(CONFIG_DEBUG_ICEDCC)
|
||||
@@ debug using ARM EmbeddedICE DCC channel
|
||||
|
||||
#if defined(CONFIG_CPU_V6)
|
||||
|
||||
.macro addruart, rx
|
||||
.endm
|
||||
|
||||
.macro senduart, rd, rx
|
||||
mcr p14, 0, \rd, c0, c5, 0
|
||||
.endm
|
||||
|
||||
.macro busyuart, rd, rx
|
||||
1001:
|
||||
mrc p14, 0, \rx, c0, c1, 0
|
||||
tst \rx, #0x20000000
|
||||
beq 1001b
|
||||
.endm
|
||||
|
||||
.macro waituart, rd, rx
|
||||
mov \rd, #0x2000000
|
||||
1001:
|
||||
subs \rd, \rd, #1
|
||||
bmi 1002f
|
||||
mrc p14, 0, \rx, c0, c1, 0
|
||||
tst \rx, #0x20000000
|
||||
bne 1001b
|
||||
1002:
|
||||
.endm
|
||||
|
||||
#else
|
||||
|
||||
.macro addruart, rx
|
||||
.endm
|
||||
|
||||
|
|
@ -46,9 +76,12 @@
|
|||
bne 1001b
|
||||
1002:
|
||||
.endm
|
||||
|
||||
#endif /* CONFIG_CPU_V6 */
|
||||
|
||||
#else
|
||||
#include <asm/arch/debug-macro.S>
|
||||
#endif
|
||||
#endif /* CONFIG_DEBUG_ICEDCC */
|
||||
|
||||
/*
|
||||
* Useful debugging routines
|
||||
|
|
|
|||
|
|
@ -191,6 +191,9 @@ __dabt_svc:
|
|||
__irq_svc:
|
||||
svc_entry
|
||||
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
bl trace_hardirqs_off
|
||||
#endif
|
||||
#ifdef CONFIG_PREEMPT
|
||||
get_thread_info tsk
|
||||
ldr r8, [tsk, #TI_PREEMPT] @ get preempt count
|
||||
|
|
@ -211,6 +214,10 @@ preempt_return:
|
|||
#endif
|
||||
ldr r0, [sp, #S_PSR] @ irqs are already disabled
|
||||
msr spsr_cxsf, r0
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
tst r0, #PSR_I_BIT
|
||||
bleq trace_hardirqs_on
|
||||
#endif
|
||||
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
|
||||
|
||||
.ltorg
|
||||
|
|
@ -398,6 +405,9 @@ __dabt_usr:
|
|||
__irq_usr:
|
||||
usr_entry
|
||||
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
bl trace_hardirqs_off
|
||||
#endif
|
||||
get_thread_info tsk
|
||||
#ifdef CONFIG_PREEMPT
|
||||
ldr r8, [tsk, #TI_PREEMPT] @ get preempt count
|
||||
|
|
@ -412,6 +422,9 @@ __irq_usr:
|
|||
teq r0, r7
|
||||
strne r0, [r0, -r0]
|
||||
#endif
|
||||
#ifdef CONFIG_TRACE_IRQFLAGS
|
||||
bl trace_hardirqs_on
|
||||
#endif
|
||||
|
||||
mov why, #0
|
||||
b ret_to_user
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@
|
|||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Common kernel startup code (non-paged MM)
|
||||
* for 32-bit CPUs which has a process ID register(CP15).
|
||||
*
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
|
|
@ -40,7 +39,11 @@
|
|||
ENTRY(stext)
|
||||
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
|
||||
@ and irqs disabled
|
||||
#ifndef CONFIG_CPU_CP15
|
||||
ldr r9, =CONFIG_PROCESSOR_ID
|
||||
#else
|
||||
mrc p15, 0, r9, c0, c0 @ get processor id
|
||||
#endif
|
||||
bl __lookup_processor_type @ r5=procinfo r9=cpuid
|
||||
movs r10, r5 @ invalid processor (r5=0)?
|
||||
beq __error_p @ yes, error 'p'
|
||||
|
|
@ -58,6 +61,7 @@ ENTRY(stext)
|
|||
*/
|
||||
.type __after_proc_init, %function
|
||||
__after_proc_init:
|
||||
#ifdef CONFIG_CPU_CP15
|
||||
mrc p15, 0, r0, c1, c0, 0 @ read control reg
|
||||
#ifdef CONFIG_ALIGNMENT_TRAP
|
||||
orr r0, r0, #CR_A
|
||||
|
|
@ -72,8 +76,14 @@ __after_proc_init:
|
|||
#endif
|
||||
#ifdef CONFIG_CPU_ICACHE_DISABLE
|
||||
bic r0, r0, #CR_I
|
||||
#endif
|
||||
#ifdef CONFIG_CPU_HIGH_VECTOR
|
||||
orr r0, r0, #CR_V
|
||||
#else
|
||||
bic r0, r0, #CR_V
|
||||
#endif
|
||||
mcr p15, 0, r0, c1, c0, 0 @ write control reg
|
||||
#endif /* CONFIG_CPU_CP15 */
|
||||
|
||||
mov pc, r13 @ clear the BSS and jump
|
||||
@ to start_kernel
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
* linux/arch/arm/kernel/module.c
|
||||
*
|
||||
* Copyright (C) 2002 Russell King.
|
||||
* Modified for nommu by Hyok S. Choi
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
|
@ -32,6 +33,7 @@ extern void _etext;
|
|||
#define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
void *module_alloc(unsigned long size)
|
||||
{
|
||||
struct vm_struct *area;
|
||||
|
|
@ -46,6 +48,12 @@ void *module_alloc(unsigned long size)
|
|||
|
||||
return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL);
|
||||
}
|
||||
#else /* CONFIG_MMU */
|
||||
void *module_alloc(unsigned long size)
|
||||
{
|
||||
return size == 0 ? NULL : vmalloc(size);
|
||||
}
|
||||
#endif /* !CONFIG_MMU */
|
||||
|
||||
void module_free(struct module *module, void *region)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -221,16 +221,26 @@ void __show_regs(struct pt_regs *regs)
|
|||
processor_modes[processor_mode(regs)],
|
||||
thumb_mode(regs) ? " (T)" : "",
|
||||
get_fs() == get_ds() ? "kernel" : "user");
|
||||
#if CONFIG_CPU_CP15
|
||||
{
|
||||
unsigned int ctrl, transbase, dac;
|
||||
unsigned int ctrl;
|
||||
__asm__ (
|
||||
" mrc p15, 0, %0, c1, c0\n"
|
||||
" mrc p15, 0, %1, c2, c0\n"
|
||||
" mrc p15, 0, %2, c3, c0\n"
|
||||
: "=r" (ctrl), "=r" (transbase), "=r" (dac));
|
||||
printk("Control: %04X Table: %08X DAC: %08X\n",
|
||||
ctrl, transbase, dac);
|
||||
: "=r" (ctrl));
|
||||
printk("Control: %04X\n", ctrl);
|
||||
}
|
||||
#ifdef CONFIG_CPU_CP15_MMU
|
||||
{
|
||||
unsigned int transbase, dac;
|
||||
__asm__ (
|
||||
" mrc p15, 0, %0, c2, c0\n"
|
||||
" mrc p15, 0, %1, c3, c0\n"
|
||||
: "=r" (transbase), "=r" (dac));
|
||||
printk("Table: %08X DAC: %08X\n",
|
||||
transbase, dac);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void show_regs(struct pt_regs * regs)
|
||||
|
|
|
|||
|
|
@ -69,10 +69,12 @@ EXPORT_SYMBOL(profile_pc);
|
|||
*/
|
||||
int (*set_rtc)(void);
|
||||
|
||||
#ifndef CONFIG_GENERIC_TIME
|
||||
static unsigned long dummy_gettimeoffset(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Scheduler clock - returns current time in nanosec units.
|
||||
|
|
@ -230,6 +232,7 @@ static inline void do_leds(void)
|
|||
#define do_leds()
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_GENERIC_TIME
|
||||
void do_gettimeofday(struct timeval *tv)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
|
@ -291,6 +294,7 @@ int do_settimeofday(struct timespec *tv)
|
|||
}
|
||||
|
||||
EXPORT_SYMBOL(do_settimeofday);
|
||||
#endif /* !CONFIG_GENERIC_TIME */
|
||||
|
||||
/**
|
||||
* save_time_delta - Save the offset between system time and RTC time
|
||||
|
|
@ -500,8 +504,10 @@ device_initcall(timer_init_sysfs);
|
|||
|
||||
void __init time_init(void)
|
||||
{
|
||||
#ifndef CONFIG_GENERIC_TIME
|
||||
if (system_timer->offset == NULL)
|
||||
system_timer->offset = dummy_gettimeoffset;
|
||||
#endif
|
||||
system_timer->init();
|
||||
|
||||
#ifdef CONFIG_NO_IDLE_HZ
|
||||
|
|
|
|||
|
|
@ -191,7 +191,7 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
|
|||
if (tsk != current)
|
||||
fp = thread_saved_fp(tsk);
|
||||
else
|
||||
asm("mov%? %0, fp" : "=r" (fp));
|
||||
asm("mov %0, fp" : "=r" (fp) : : "cc");
|
||||
|
||||
c_backtrace(fp, 0x10);
|
||||
barrier();
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
|
||||
#include <asm/hardware.h>
|
||||
#include "generic.h"
|
||||
#include "clock.h"
|
||||
|
||||
static struct map_desc at91rm9200_io_desc[] __initdata = {
|
||||
{
|
||||
|
|
@ -26,87 +27,224 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
|
|||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SPI,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SPI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SSC2,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SSC2),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SSC1,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SSC1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_SSC0,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_SSC0),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US3,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US3),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US2,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US2),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US1,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_US0,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_US0),
|
||||
.pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_EMAC,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_EMAC),
|
||||
.pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_TWI,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_TWI),
|
||||
.pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_MCI,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_MCI),
|
||||
.pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_UDP,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_UDP),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_TCB1,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_TCB1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_VA_BASE_TCB0,
|
||||
.pfn = __phys_to_pfn(AT91_BASE_TCB0),
|
||||
.pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = AT91_SRAM_VIRT_BASE,
|
||||
.pfn = __phys_to_pfn(AT91_SRAM_BASE),
|
||||
.length = AT91_SRAM_SIZE,
|
||||
.pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
|
||||
.length = AT91RM9200_SRAM_SIZE,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
void __init at91rm9200_map_io(void)
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_UDP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_UHP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ether_clk = {
|
||||
.name = "ether_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_EMAC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc_clk = {
|
||||
.name = "mci_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_MCI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi_clk = {
|
||||
.name = "twi_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TWI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart3_clk = {
|
||||
.name = "usart3_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi_clk = {
|
||||
.name = "spi_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_SPI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioA_clk = {
|
||||
.name = "pioA_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioB_clk = {
|
||||
.name = "pioB_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioC_clk = {
|
||||
.name = "pioC_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioD_clk = {
|
||||
.name = "pioD_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOD,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioA_clk,
|
||||
&pioB_clk,
|
||||
&pioC_clk,
|
||||
&pioD_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&usart3_clk,
|
||||
&mmc_clk,
|
||||
&udc_clk,
|
||||
&twi_clk,
|
||||
&spi_clk,
|
||||
// ssc 0 .. ssc2
|
||||
// tc0 .. tc5
|
||||
&ohci_clk,
|
||||
ðer_clk,
|
||||
// irq0 .. irq6
|
||||
};
|
||||
|
||||
/*
|
||||
* The four programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
static struct clk pck2 = {
|
||||
.name = "pck2",
|
||||
.pmc_mask = AT91_PMC_PCK2,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 2,
|
||||
};
|
||||
static struct clk pck3 = {
|
||||
.name = "pck3",
|
||||
.pmc_mask = AT91_PMC_PCK3,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 3,
|
||||
};
|
||||
|
||||
static void __init at91rm9200_register_clocks(void)
|
||||
{
|
||||
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
clk_register(&pck2);
|
||||
clk_register(&pck3);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
static struct at91_gpio_bank at91rm9200_gpio[] = {
|
||||
{
|
||||
.id = AT91RM9200_ID_PIOA,
|
||||
.offset = AT91_PIOA,
|
||||
.clock = &pioA_clk,
|
||||
}, {
|
||||
.id = AT91RM9200_ID_PIOB,
|
||||
.offset = AT91_PIOB,
|
||||
.clock = &pioB_clk,
|
||||
}, {
|
||||
.id = AT91RM9200_ID_PIOC,
|
||||
.offset = AT91_PIOC,
|
||||
.clock = &pioC_clk,
|
||||
}, {
|
||||
.id = AT91RM9200_ID_PIOD,
|
||||
.offset = AT91_PIOD,
|
||||
.clock = &pioD_clk,
|
||||
}
|
||||
};
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91RM9200 processor initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
|
||||
{
|
||||
/* Map peripherals */
|
||||
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
|
||||
|
||||
/* Init clock subsystem */
|
||||
at91_clock_init(main_clock);
|
||||
|
||||
/* Register the processor-specific clocks */
|
||||
at91rm9200_register_clocks();
|
||||
|
||||
/* Initialize GPIO subsystem */
|
||||
at91_gpio_init(at91rm9200_gpio, banks);
|
||||
}
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Interrupt initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
||||
*/
|
||||
|
|
@ -145,10 +283,14 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
|||
0 /* Advanced Interrupt Controller (IRQ6) */
|
||||
};
|
||||
|
||||
void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
|
||||
void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
|
||||
{
|
||||
if (!priority)
|
||||
priority = at91rm9200_default_irq_priority;
|
||||
|
||||
/* Initialize the AIC interrupt controller */
|
||||
at91_aic_init(priority);
|
||||
|
||||
/* Enable GPIO interrupts */
|
||||
at91_gpio_irq_setup();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,20 +34,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init onearm_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -62,15 +53,18 @@ static struct at91_uart_config __initdata onearm_uart_config = {
|
|||
|
||||
static void __init onearm_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 18.432 MHz crystal */
|
||||
at91_clock_init(18432000);
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91rm9200_initialize(18432000, AT91RM9200_PQFP);
|
||||
|
||||
/* Setup the serial ports and console */
|
||||
at91_init_serial(&onearm_uart_config);
|
||||
}
|
||||
|
||||
static void __init onearm_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata onearm_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
|
|
|
|||
|
|
@ -35,20 +35,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init carmeva_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(BGA_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -63,15 +54,19 @@ static struct at91_uart_config __initdata carmeva_uart_config = {
|
|||
|
||||
static void __init carmeva_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 20.000 MHz crystal */
|
||||
at91_clock_init(20000000);
|
||||
/* Initialize processor: 20.000 MHz crystal */
|
||||
at91rm9200_initialize(20000000, AT91RM9200_BGA);
|
||||
|
||||
/* Setup the serial ports and console */
|
||||
at91_init_serial(&carmeva_uart_config);
|
||||
}
|
||||
|
||||
static void __init carmeva_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
|
||||
static struct at91_eth_data __initdata carmeva_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
|
|
|
|||
|
|
@ -34,20 +34,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init csb337_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(BGA_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -62,10 +53,8 @@ static struct at91_uart_config __initdata csb337_uart_config = {
|
|||
|
||||
static void __init csb337_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 3.6864 MHz crystal */
|
||||
at91_clock_init(3686400);
|
||||
/* Initialize processor: 3.6864 MHz crystal */
|
||||
at91rm9200_initialize(3686400, AT91RM9200_BGA);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
|
||||
|
|
@ -74,6 +63,11 @@ static void __init csb337_map_io(void)
|
|||
at91_init_serial(&csb337_uart_config);
|
||||
}
|
||||
|
||||
static void __init csb337_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata csb337_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC2,
|
||||
.is_rmii = 0,
|
||||
|
|
|
|||
|
|
@ -33,20 +33,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init csb637_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(BGA_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -61,10 +52,8 @@ static struct at91_uart_config __initdata csb637_uart_config = {
|
|||
|
||||
static void __init csb637_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 3.6864 MHz crystal */
|
||||
at91_clock_init(3686400);
|
||||
/* Initialize processor: 3.6864 MHz crystal */
|
||||
at91rm9200_initialize(3686400, AT91RM9200_BGA);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
|
||||
|
|
@ -73,6 +62,11 @@ static void __init csb637_map_io(void)
|
|||
at91_init_serial(&csb637_uart_config);
|
||||
}
|
||||
|
||||
static void __init csb637_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata csb637_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC0,
|
||||
.is_rmii = 0,
|
||||
|
|
|
|||
|
|
@ -37,20 +37,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init dk_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(BGA_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -65,10 +56,8 @@ static struct at91_uart_config __initdata dk_uart_config = {
|
|||
|
||||
static void __init dk_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 18.432 MHz crystal */
|
||||
at91_clock_init(18432000);
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91rm9200_initialize(18432000, AT91RM9200_BGA);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
|
||||
|
|
@ -77,6 +66,11 @@ static void __init dk_map_io(void)
|
|||
at91_init_serial(&dk_uart_config);
|
||||
}
|
||||
|
||||
static void __init dk_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata dk_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
|
|
@ -128,6 +122,29 @@ static struct spi_board_info dk_spi_devices[] = {
|
|||
#endif
|
||||
};
|
||||
|
||||
static struct mtd_partition __initdata dk_nand_partition[] = {
|
||||
{
|
||||
.name = "NAND Partition 1",
|
||||
.offset = 0,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(dk_nand_partition);
|
||||
return dk_nand_partition;
|
||||
}
|
||||
|
||||
static struct at91_nand_data __initdata dk_nand_data = {
|
||||
.ale = 22,
|
||||
.cle = 21,
|
||||
.det_pin = AT91_PIN_PB1,
|
||||
.rdy_pin = AT91_PIN_PC2,
|
||||
// .enable_pin = ... not there
|
||||
.partition_info = nand_partitions,
|
||||
};
|
||||
|
||||
static void __init dk_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
|
|
@ -153,6 +170,8 @@ static void __init dk_board_init(void)
|
|||
at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
|
||||
at91_add_device_mmc(&dk_mmc_data);
|
||||
#endif
|
||||
/* NAND */
|
||||
at91_add_device_nand(&dk_nand_data);
|
||||
/* VGA */
|
||||
// dk_add_device_video();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,20 +35,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init eb9200_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(BGA_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -63,15 +54,18 @@ static struct at91_uart_config __initdata eb9200_uart_config = {
|
|||
|
||||
static void __init eb9200_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 18.432 MHz crystal */
|
||||
at91_clock_init(18432000);
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91rm9200_initialize(18432000, AT91RM9200_BGA);
|
||||
|
||||
/* Setup the serial ports and console */
|
||||
at91_init_serial(&eb9200_uart_config);
|
||||
}
|
||||
|
||||
static void __init eb9200_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata eb9200_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
|
|
|
|||
|
|
@ -37,20 +37,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init ek_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(BGA_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -65,10 +56,8 @@ static struct at91_uart_config __initdata ek_uart_config = {
|
|||
|
||||
static void __init ek_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 18.432 MHz crystal */
|
||||
at91_clock_init(18432000);
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91rm9200_initialize(18432000, AT91RM9200_BGA);
|
||||
|
||||
/* Setup the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
|
||||
|
|
@ -77,6 +66,11 @@ static void __init ek_map_io(void)
|
|||
at91_init_serial(&ek_uart_config);
|
||||
}
|
||||
|
||||
static void __init ek_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata ek_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
|
|
|
|||
|
|
@ -34,20 +34,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init kafa_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -62,10 +53,8 @@ static struct at91_uart_config __initdata kafa_uart_config = {
|
|||
|
||||
static void __init kafa_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 18.432 MHz crystal */
|
||||
at91_clock_init(18432000);
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91rm9200_initialize(18432000, AT91RM9200_PQFP);
|
||||
|
||||
/* Set up the LEDs */
|
||||
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
|
||||
|
|
@ -74,6 +63,11 @@ static void __init kafa_map_io(void)
|
|||
at91_init_serial(&kafa_uart_config);
|
||||
}
|
||||
|
||||
static void __init kafa_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata kafa_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 0,
|
||||
|
|
|
|||
|
|
@ -35,20 +35,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/arch/board.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
static void __init kb9202_init_irq(void)
|
||||
{
|
||||
/* Initialize AIC controller */
|
||||
at91rm9200_init_irq(NULL);
|
||||
|
||||
/* Set up the GPIO interrupts */
|
||||
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial port configuration.
|
||||
|
|
@ -63,10 +54,8 @@ static struct at91_uart_config __initdata kb9202_uart_config = {
|
|||
|
||||
static void __init kb9202_map_io(void)
|
||||
{
|
||||
at91rm9200_map_io();
|
||||
|
||||
/* Initialize clocks: 10 MHz crystal */
|
||||
at91_clock_init(10000000);
|
||||
/* Initialize processor: 10 MHz crystal */
|
||||
at91rm9200_initialize(10000000, AT91RM9200_PQFP);
|
||||
|
||||
/* Set up the LEDs */
|
||||
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
|
||||
|
|
@ -75,6 +64,11 @@ static void __init kb9202_map_io(void)
|
|||
at91_init_serial(&kb9202_uart_config);
|
||||
}
|
||||
|
||||
static void __init kb9202_init_irq(void)
|
||||
{
|
||||
at91rm9200_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static struct at91_eth_data __initdata kb9202_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PB29,
|
||||
.is_rmii = 0,
|
||||
|
|
@ -95,6 +89,29 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = {
|
|||
.wire4 = 1,
|
||||
};
|
||||
|
||||
static struct mtd_partition __initdata kb9202_nand_partition[] = {
|
||||
{
|
||||
.name = "nand_fs",
|
||||
.offset = 0,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(kb9202_nand_partition);
|
||||
return kb9202_nand_partition;
|
||||
}
|
||||
|
||||
static struct at91_nand_data __initdata kb9202_nand_data = {
|
||||
.ale = 22,
|
||||
.cle = 21,
|
||||
// .det_pin = ... not there
|
||||
.rdy_pin = AT91_PIN_PC29,
|
||||
.enable_pin = AT91_PIN_PC28,
|
||||
.partition_info = nand_partitions,
|
||||
};
|
||||
|
||||
static void __init kb9202_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
|
|
@ -111,6 +128,8 @@ static void __init kb9202_board_init(void)
|
|||
at91_add_device_i2c();
|
||||
/* SPI */
|
||||
at91_add_device_spi(NULL, 0);
|
||||
/* NAND */
|
||||
at91_add_device_nand(&kb9202_nand_data);
|
||||
}
|
||||
|
||||
MACHINE_START(KB9200, "KB920x")
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "clock.h"
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -38,23 +38,15 @@
|
|||
* PLLB be used at other rates (on boards that don't need USB), etc.
|
||||
*/
|
||||
|
||||
struct clk {
|
||||
const char *name; /* unique clock name */
|
||||
const char *function; /* function of the clock */
|
||||
struct device *dev; /* device associated with function */
|
||||
unsigned long rate_hz;
|
||||
struct clk *parent;
|
||||
u32 pmc_mask;
|
||||
void (*mode)(struct clk *, int);
|
||||
unsigned id:2; /* PCK0..3, or 32k/main/a/b */
|
||||
unsigned primary:1;
|
||||
unsigned pll:1;
|
||||
unsigned programmable:1;
|
||||
u16 users;
|
||||
};
|
||||
#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
|
||||
#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE)
|
||||
#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL)
|
||||
|
||||
static spinlock_t clk_lock;
|
||||
static u32 at91_pllb_usb_init;
|
||||
|
||||
static LIST_HEAD(clocks);
|
||||
static DEFINE_SPINLOCK(clk_lock);
|
||||
|
||||
static u32 at91_pllb_usb_init;
|
||||
|
||||
/*
|
||||
* Four primary clock sources: two crystal oscillators (32K, main), and
|
||||
|
|
@ -67,21 +59,20 @@ static struct clk clk32k = {
|
|||
.rate_hz = AT91_SLOW_CLOCK,
|
||||
.users = 1, /* always on */
|
||||
.id = 0,
|
||||
.primary = 1,
|
||||
.type = CLK_TYPE_PRIMARY,
|
||||
};
|
||||
static struct clk main_clk = {
|
||||
.name = "main",
|
||||
.pmc_mask = AT91_PMC_MOSCS, /* in PMC_SR */
|
||||
.id = 1,
|
||||
.primary = 1,
|
||||
.type = CLK_TYPE_PRIMARY,
|
||||
};
|
||||
static struct clk plla = {
|
||||
.name = "plla",
|
||||
.parent = &main_clk,
|
||||
.pmc_mask = AT91_PMC_LOCKA, /* in PMC_SR */
|
||||
.id = 2,
|
||||
.primary = 1,
|
||||
.pll = 1,
|
||||
.type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
|
||||
};
|
||||
|
||||
static void pllb_mode(struct clk *clk, int is_on)
|
||||
|
|
@ -94,6 +85,7 @@ static void pllb_mode(struct clk *clk, int is_on)
|
|||
} else
|
||||
value = 0;
|
||||
|
||||
// REVISIT: Add work-around for AT91RM9200 Errata #26 ?
|
||||
at91_sys_write(AT91_CKGR_PLLBR, value);
|
||||
|
||||
do {
|
||||
|
|
@ -107,8 +99,7 @@ static struct clk pllb = {
|
|||
.pmc_mask = AT91_PMC_LOCKB, /* in PMC_SR */
|
||||
.mode = pllb_mode,
|
||||
.id = 3,
|
||||
.primary = 1,
|
||||
.pll = 1,
|
||||
.type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
|
||||
};
|
||||
|
||||
static void pmc_sys_mode(struct clk *clk, int is_on)
|
||||
|
|
@ -133,41 +124,6 @@ static struct clk uhpck = {
|
|||
.mode = pmc_sys_mode,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
/*
|
||||
* The four programmable clocks can be parented by any primary clock.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 1,
|
||||
};
|
||||
static struct clk pck2 = {
|
||||
.name = "pck2",
|
||||
.pmc_mask = AT91_PMC_PCK2,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 2,
|
||||
};
|
||||
static struct clk pck3 = {
|
||||
.name = "pck3",
|
||||
.pmc_mask = AT91_PMC_PCK3,
|
||||
.mode = pmc_sys_mode,
|
||||
.programmable = 1,
|
||||
.id = 3,
|
||||
};
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
|
||||
/*
|
||||
* The master clock is divided from the CPU clock (by 1-4). It's used for
|
||||
|
|
@ -187,131 +143,21 @@ static void pmc_periph_mode(struct clk *clk, int is_on)
|
|||
at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
|
||||
}
|
||||
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_UDP,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_UHP,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk ether_clk = {
|
||||
.name = "ether_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_EMAC,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk mmc_clk = {
|
||||
.name = "mci_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_MCI,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk twi_clk = {
|
||||
.name = "twi_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_TWI,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_US0,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_US1,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_US2,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk usart3_clk = {
|
||||
.name = "usart3_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_US3,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk spi_clk = {
|
||||
.name = "spi0_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_SPI,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk pioA_clk = {
|
||||
.name = "pioA_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_PIOA,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk pioB_clk = {
|
||||
.name = "pioB_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_PIOB,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk pioC_clk = {
|
||||
.name = "pioC_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_PIOC,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
static struct clk pioD_clk = {
|
||||
.name = "pioD_clk",
|
||||
.parent = &mck,
|
||||
.pmc_mask = 1 << AT91_ID_PIOD,
|
||||
.mode = pmc_periph_mode,
|
||||
};
|
||||
|
||||
static struct clk *const clock_list[] = {
|
||||
/* four primary clocks -- MUST BE FIRST! */
|
||||
&clk32k,
|
||||
&main_clk,
|
||||
&plla,
|
||||
&pllb,
|
||||
|
||||
/* PLLB children (USB) */
|
||||
&udpck,
|
||||
&uhpck,
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
/* programmable clocks */
|
||||
&pck0,
|
||||
&pck1,
|
||||
&pck2,
|
||||
&pck3,
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
/* MCK and peripherals */
|
||||
&mck,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&usart3_clk,
|
||||
&mmc_clk,
|
||||
&udc_clk,
|
||||
&twi_clk,
|
||||
&spi_clk,
|
||||
&pioA_clk,
|
||||
&pioB_clk,
|
||||
&pioC_clk,
|
||||
&pioD_clk,
|
||||
// ssc0..ssc2
|
||||
// tc0..tc5
|
||||
// irq0..irq6
|
||||
&ohci_clk,
|
||||
ðer_clk,
|
||||
};
|
||||
static struct clk __init *at91_css_to_clk(unsigned long css)
|
||||
{
|
||||
switch (css) {
|
||||
case AT91_PMC_CSS_SLOW:
|
||||
return &clk32k;
|
||||
case AT91_PMC_CSS_MAIN:
|
||||
return &main_clk;
|
||||
case AT91_PMC_CSS_PLLA:
|
||||
return &plla;
|
||||
case AT91_PMC_CSS_PLLB:
|
||||
return &pllb;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Associate a particular clock with a function (eg, "uart") and device.
|
||||
|
|
@ -329,14 +175,12 @@ void __init at91_clock_associate(const char *id, struct device *dev, const char
|
|||
clk->dev = dev;
|
||||
}
|
||||
|
||||
/* clocks are all static for now; no refcounting necessary */
|
||||
/* clocks cannot be de-registered no refcounting necessary */
|
||||
struct clk *clk_get(struct device *dev, const char *id)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
|
||||
struct clk *clk = clock_list[i];
|
||||
struct clk *clk;
|
||||
|
||||
list_for_each_entry(clk, &clocks, node) {
|
||||
if (strcmp(id, clk->name) == 0)
|
||||
return clk;
|
||||
if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
|
||||
|
|
@ -424,7 +268,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
|
|||
unsigned prescale;
|
||||
unsigned long actual;
|
||||
|
||||
if (!clk->programmable)
|
||||
if (!clk_is_programmable(clk))
|
||||
return -EINVAL;
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
|
|
@ -446,7 +290,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
|
|||
unsigned prescale;
|
||||
unsigned long actual;
|
||||
|
||||
if (!clk->programmable)
|
||||
if (!clk_is_programmable(clk))
|
||||
return -EINVAL;
|
||||
if (clk->users)
|
||||
return -EBUSY;
|
||||
|
|
@ -484,7 +328,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
|
|||
|
||||
if (clk->users)
|
||||
return -EBUSY;
|
||||
if (!parent->primary || !clk->programmable)
|
||||
if (!clk_is_primary(parent) || !clk_is_programmable(clk))
|
||||
return -EINVAL;
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
|
|
@ -497,6 +341,18 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
|
|||
}
|
||||
EXPORT_SYMBOL(clk_set_parent);
|
||||
|
||||
/* establish PCK0..PCK3 parentage and rate */
|
||||
static void init_programmable_clock(struct clk *clk)
|
||||
{
|
||||
struct clk *parent;
|
||||
u32 pckr;
|
||||
|
||||
pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
|
||||
parent = at91_css_to_clk(pckr & AT91_PMC_CSS);
|
||||
clk->parent = parent;
|
||||
clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
|
||||
}
|
||||
|
||||
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
|
@ -506,6 +362,7 @@ EXPORT_SYMBOL(clk_set_parent);
|
|||
static int at91_clk_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
u32 scsr, pcsr, sr;
|
||||
struct clk *clk;
|
||||
unsigned i;
|
||||
|
||||
seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
|
||||
|
|
@ -523,9 +380,8 @@ static int at91_clk_show(struct seq_file *s, void *unused)
|
|||
|
||||
seq_printf(s, "\n");
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
|
||||
char *state;
|
||||
struct clk *clk = clock_list[i];
|
||||
list_for_each_entry(clk, &clocks, node) {
|
||||
char *state;
|
||||
|
||||
if (clk->mode == pmc_sys_mode)
|
||||
state = (scsr & clk->pmc_mask) ? "on" : "off";
|
||||
|
|
@ -568,6 +424,28 @@ postcore_initcall(at91_clk_debugfs_init);
|
|||
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
/* Register a new clock */
|
||||
int __init clk_register(struct clk *clk)
|
||||
{
|
||||
if (clk_is_peripheral(clk)) {
|
||||
clk->parent = &mck;
|
||||
clk->mode = pmc_periph_mode;
|
||||
list_add_tail(&clk->node, &clocks);
|
||||
}
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
else if (clk_is_programmable(clk)) {
|
||||
clk->mode = pmc_sys_mode;
|
||||
init_programmable_clock(clk);
|
||||
list_add_tail(&clk->node, &clocks);
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
|
||||
|
|
@ -640,20 +518,17 @@ fail:
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Several unused clocks may be active. Turn them off.
|
||||
*/
|
||||
static void at91_periphclk_reset(void)
|
||||
static void __init at91_periphclk_reset(void)
|
||||
{
|
||||
unsigned long reg;
|
||||
int i;
|
||||
struct clk *clk;
|
||||
|
||||
reg = at91_sys_read(AT91_PMC_PCSR);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
|
||||
struct clk *clk = clock_list[i];
|
||||
|
||||
list_for_each_entry(clk, &clocks, node) {
|
||||
if (clk->mode != pmc_periph_mode)
|
||||
continue;
|
||||
|
||||
|
|
@ -664,11 +539,25 @@ static void at91_periphclk_reset(void)
|
|||
at91_sys_write(AT91_PMC_PCDR, reg);
|
||||
}
|
||||
|
||||
static struct clk *const standard_pmc_clocks[] __initdata = {
|
||||
/* four primary clocks */
|
||||
&clk32k,
|
||||
&main_clk,
|
||||
&plla,
|
||||
&pllb,
|
||||
|
||||
/* PLLB children (USB) */
|
||||
&udpck,
|
||||
&uhpck,
|
||||
|
||||
/* MCK */
|
||||
&mck
|
||||
};
|
||||
|
||||
int __init at91_clock_init(unsigned long main_clock)
|
||||
{
|
||||
unsigned tmp, freq, mckr;
|
||||
|
||||
spin_lock_init(&clk_lock);
|
||||
int i;
|
||||
|
||||
/*
|
||||
* When the bootloader initialized the main oscillator correctly,
|
||||
|
|
@ -709,11 +598,15 @@ int __init at91_clock_init(unsigned long main_clock)
|
|||
* For now, assume this parentage won't change.
|
||||
*/
|
||||
mckr = at91_sys_read(AT91_PMC_MCKR);
|
||||
mck.parent = clock_list[mckr & AT91_PMC_CSS];
|
||||
mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
|
||||
freq = mck.parent->rate_hz;
|
||||
freq /= (1 << ((mckr >> 2) & 3)); /* prescale */
|
||||
mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */
|
||||
|
||||
/* Register the PMC's standard clocks */
|
||||
for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
|
||||
list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
|
||||
|
||||
/* MCK and CPU clock are "always on" */
|
||||
clk_enable(&mck);
|
||||
|
||||
|
|
@ -722,35 +615,8 @@ int __init at91_clock_init(unsigned long main_clock)
|
|||
(unsigned) main_clock / 1000000,
|
||||
((unsigned) main_clock % 1000000) / 1000);
|
||||
|
||||
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
|
||||
/* establish PCK0..PCK3 parentage */
|
||||
for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) {
|
||||
struct clk *clk = clock_list[tmp], *parent;
|
||||
u32 pckr;
|
||||
|
||||
if (!clk->programmable)
|
||||
continue;
|
||||
|
||||
pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
|
||||
parent = clock_list[pckr & AT91_PMC_CSS];
|
||||
clk->parent = parent;
|
||||
clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
|
||||
|
||||
if (clk->users == 0) {
|
||||
/* not being used, so switch it off */
|
||||
at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
|
||||
}
|
||||
}
|
||||
#else
|
||||
/* disable all programmable clocks */
|
||||
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
|
||||
#endif
|
||||
|
||||
/* enable the PIO clocks */
|
||||
clk_enable(&pioA_clk);
|
||||
clk_enable(&pioB_clk);
|
||||
clk_enable(&pioC_clk);
|
||||
clk_enable(&pioD_clk);
|
||||
|
||||
/* disable all other unused peripheral clocks */
|
||||
at91_periphclk_reset();
|
||||
|
|
|
|||
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/clock.h
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#define CLK_TYPE_PRIMARY 0x1
|
||||
#define CLK_TYPE_PLL 0x2
|
||||
#define CLK_TYPE_PROGRAMMABLE 0x4
|
||||
#define CLK_TYPE_PERIPHERAL 0x8
|
||||
|
||||
|
||||
struct clk {
|
||||
struct list_head node;
|
||||
const char *name; /* unique clock name */
|
||||
const char *function; /* function of the clock */
|
||||
struct device *dev; /* device associated with function */
|
||||
unsigned long rate_hz;
|
||||
struct clk *parent;
|
||||
u32 pmc_mask;
|
||||
void (*mode)(struct clk *, int);
|
||||
unsigned id:2; /* PCK0..3, or 32k/main/a/b */
|
||||
unsigned type; /* clock type */
|
||||
u16 users;
|
||||
};
|
||||
|
||||
|
||||
extern int __init clk_register(struct clk *clk);
|
||||
|
|
@ -35,13 +35,13 @@ static struct at91_usbh_data usbh_data;
|
|||
|
||||
static struct resource at91_usbh_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_UHP_BASE,
|
||||
.end = AT91_UHP_BASE + SZ_1M - 1,
|
||||
.start = AT91RM9200_UHP_BASE,
|
||||
.end = AT91RM9200_UHP_BASE + SZ_1M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_UHP,
|
||||
.end = AT91_ID_UHP,
|
||||
.start = AT91RM9200_ID_UHP,
|
||||
.end = AT91RM9200_ID_UHP,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -80,13 +80,13 @@ static struct at91_udc_data udc_data;
|
|||
|
||||
static struct resource at91_udc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_UDP,
|
||||
.end = AT91_BASE_UDP + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_UDP,
|
||||
.end = AT91RM9200_BASE_UDP + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_UDP,
|
||||
.end = AT91_ID_UDP,
|
||||
.start = AT91RM9200_ID_UDP,
|
||||
.end = AT91RM9200_ID_UDP,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -131,13 +131,13 @@ static struct at91_eth_data eth_data;
|
|||
|
||||
static struct resource at91_eth_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_EMAC,
|
||||
.end = AT91_BASE_EMAC + SZ_16K - 1,
|
||||
.start = AT91_VA_BASE_EMAC,
|
||||
.end = AT91_VA_BASE_EMAC + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_EMAC,
|
||||
.end = AT91_ID_EMAC,
|
||||
.start = AT91RM9200_ID_EMAC,
|
||||
.end = AT91RM9200_ID_EMAC,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -263,13 +263,13 @@ static struct at91_mmc_data mmc_data;
|
|||
|
||||
static struct resource at91_mmc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_MCI,
|
||||
.end = AT91_BASE_MCI + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_MCI,
|
||||
.end = AT91RM9200_BASE_MCI + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_MCI,
|
||||
.end = AT91_ID_MCI,
|
||||
.start = AT91RM9200_ID_MCI,
|
||||
.end = AT91RM9200_ID_MCI,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -423,13 +423,13 @@ static u64 spi_dmamask = 0xffffffffUL;
|
|||
|
||||
static struct resource at91_spi_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_SPI,
|
||||
.end = AT91_BASE_SPI + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_SPI,
|
||||
.end = AT91RM9200_BASE_SPI + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_SPI,
|
||||
.end = AT91_ID_SPI,
|
||||
.start = AT91RM9200_ID_SPI,
|
||||
.end = AT91RM9200_ID_SPI,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -582,13 +582,13 @@ static inline void configure_dbgu_pins(void)
|
|||
|
||||
static struct resource uart0_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_US0,
|
||||
.end = AT91_BASE_US0 + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_US0,
|
||||
.end = AT91RM9200_BASE_US0 + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_US0,
|
||||
.end = AT91_ID_US0,
|
||||
.start = AT91RM9200_ID_US0,
|
||||
.end = AT91RM9200_ID_US0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -624,13 +624,13 @@ static inline void configure_usart0_pins(void)
|
|||
|
||||
static struct resource uart1_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_US1,
|
||||
.end = AT91_BASE_US1 + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_US1,
|
||||
.end = AT91RM9200_BASE_US1 + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_US1,
|
||||
.end = AT91_ID_US1,
|
||||
.start = AT91RM9200_ID_US1,
|
||||
.end = AT91RM9200_ID_US1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -665,13 +665,13 @@ static inline void configure_usart1_pins(void)
|
|||
|
||||
static struct resource uart2_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_US2,
|
||||
.end = AT91_BASE_US2 + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_US2,
|
||||
.end = AT91RM9200_BASE_US2 + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_US2,
|
||||
.end = AT91_ID_US2,
|
||||
.start = AT91RM9200_ID_US2,
|
||||
.end = AT91RM9200_ID_US2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -700,13 +700,13 @@ static inline void configure_usart2_pins(void)
|
|||
|
||||
static struct resource uart3_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91_BASE_US3,
|
||||
.end = AT91_BASE_US3 + SZ_16K - 1,
|
||||
.start = AT91RM9200_BASE_US3,
|
||||
.end = AT91RM9200_BASE_US3 + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_ID_US3,
|
||||
.end = AT91_ID_US3,
|
||||
.start = AT91RM9200_ID_US3,
|
||||
.end = AT91RM9200_ID_US3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,18 +8,17 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/* Processors */
|
||||
extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
|
||||
|
||||
/* Interrupts */
|
||||
extern void __init at91rm9200_init_irq(unsigned int priority[]);
|
||||
extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
|
||||
extern void __init at91_aic_init(unsigned int priority[]);
|
||||
extern void __init at91_gpio_irq_setup(unsigned banks);
|
||||
|
||||
/* Timer */
|
||||
struct sys_timer;
|
||||
extern struct sys_timer at91rm9200_timer;
|
||||
|
||||
/* Memory Map */
|
||||
extern void __init at91rm9200_map_io(void);
|
||||
|
||||
/* Clocks */
|
||||
extern int __init at91_clock_init(unsigned long main_clock);
|
||||
struct device;
|
||||
|
|
@ -29,3 +28,14 @@ extern void __init at91_clock_associate(const char *id, struct device *dev, cons
|
|||
extern void at91_irq_suspend(void);
|
||||
extern void at91_irq_resume(void);
|
||||
|
||||
/* GPIO */
|
||||
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
|
||||
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
|
||||
|
||||
struct at91_gpio_bank {
|
||||
unsigned short id; /* peripheral ID */
|
||||
unsigned long offset; /* offset from system peripheral base */
|
||||
struct clk *clock; /* associated clock */
|
||||
};
|
||||
extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
|
||||
extern void __init at91_gpio_irq_setup(void);
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
|
|
@ -20,12 +21,12 @@
|
|||
#include <asm/hardware.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
static const u32 pio_controller_offset[4] = {
|
||||
AT91_PIOA,
|
||||
AT91_PIOB,
|
||||
AT91_PIOC,
|
||||
AT91_PIOD,
|
||||
};
|
||||
#include "generic.h"
|
||||
|
||||
|
||||
static struct at91_gpio_bank *gpio;
|
||||
static int gpio_banks;
|
||||
|
||||
|
||||
static inline void __iomem *pin_to_controller(unsigned pin)
|
||||
{
|
||||
|
|
@ -33,8 +34,8 @@ static inline void __iomem *pin_to_controller(unsigned pin)
|
|||
|
||||
pin -= PIN_BASE;
|
||||
pin /= 32;
|
||||
if (likely(pin < BGA_GPIO_BANKS))
|
||||
return sys_base + pio_controller_offset[pin];
|
||||
if (likely(pin < gpio_banks))
|
||||
return sys_base + gpio[pin].offset;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
|
@ -179,7 +180,6 @@ EXPORT_SYMBOL(at91_set_multi_drive);
|
|||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* assuming the pin is muxed as a gpio output, set its value.
|
||||
*/
|
||||
|
|
@ -216,8 +216,8 @@ EXPORT_SYMBOL(at91_get_gpio_value);
|
|||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static u32 wakeups[BGA_GPIO_BANKS];
|
||||
static u32 backups[BGA_GPIO_BANKS];
|
||||
static u32 wakeups[MAX_GPIO_BANKS];
|
||||
static u32 backups[MAX_GPIO_BANKS];
|
||||
|
||||
static int gpio_irq_set_wake(unsigned pin, unsigned state)
|
||||
{
|
||||
|
|
@ -226,7 +226,7 @@ static int gpio_irq_set_wake(unsigned pin, unsigned state)
|
|||
pin -= PIN_BASE;
|
||||
pin /= 32;
|
||||
|
||||
if (unlikely(pin >= BGA_GPIO_BANKS))
|
||||
if (unlikely(pin >= MAX_GPIO_BANKS))
|
||||
return -EINVAL;
|
||||
|
||||
if (state)
|
||||
|
|
@ -241,8 +241,8 @@ void at91_gpio_suspend(void)
|
|||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < BGA_GPIO_BANKS; i++) {
|
||||
u32 pio = pio_controller_offset[i];
|
||||
for (i = 0; i < gpio_banks; i++) {
|
||||
u32 pio = gpio[i].offset;
|
||||
|
||||
/*
|
||||
* Note: drivers should have disabled GPIO interrupts that
|
||||
|
|
@ -257,14 +257,14 @@ void at91_gpio_suspend(void)
|
|||
* first place!
|
||||
*/
|
||||
backups[i] = at91_sys_read(pio + PIO_IMR);
|
||||
at91_sys_write(pio_controller_offset[i] + PIO_IDR, backups[i]);
|
||||
at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
|
||||
at91_sys_write(pio + PIO_IDR, backups[i]);
|
||||
at91_sys_write(pio + PIO_IER, wakeups[i]);
|
||||
|
||||
if (!wakeups[i]) {
|
||||
disable_irq_wake(AT91_ID_PIOA + i);
|
||||
at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
|
||||
disable_irq_wake(gpio[i].id);
|
||||
at91_sys_write(AT91_PMC_PCDR, 1 << gpio[i].id);
|
||||
} else {
|
||||
enable_irq_wake(AT91_ID_PIOA + i);
|
||||
enable_irq_wake(gpio[i].id);
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
|
||||
#endif
|
||||
|
|
@ -276,16 +276,13 @@ void at91_gpio_resume(void)
|
|||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < BGA_GPIO_BANKS; i++) {
|
||||
at91_sys_write(pio_controller_offset[i] + PIO_IDR, wakeups[i]);
|
||||
at91_sys_write(pio_controller_offset[i] + PIO_IER, backups[i]);
|
||||
}
|
||||
for (i = 0; i < gpio_banks; i++) {
|
||||
u32 pio = gpio[i].offset;
|
||||
|
||||
at91_sys_write(AT91_PMC_PCER,
|
||||
(1 << AT91_ID_PIOA)
|
||||
| (1 << AT91_ID_PIOB)
|
||||
| (1 << AT91_ID_PIOC)
|
||||
| (1 << AT91_ID_PIOD));
|
||||
at91_sys_write(pio + PIO_IDR, wakeups[i]);
|
||||
at91_sys_write(pio + PIO_IER, backups[i]);
|
||||
at91_sys_write(AT91_PMC_PCER, 1 << gpio[i].id);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
|
|
@ -377,20 +374,25 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
|
|||
/* now it may re-trigger */
|
||||
}
|
||||
|
||||
/* call this from board-specific init_irq */
|
||||
void __init at91_gpio_irq_setup(unsigned banks)
|
||||
{
|
||||
unsigned pioc, pin, id;
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
if (banks > 4)
|
||||
banks = 4;
|
||||
for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
|
||||
pioc < banks;
|
||||
pioc++, id++) {
|
||||
/*
|
||||
* Called from the processor-specific init to enable GPIO interrupt support.
|
||||
*/
|
||||
void __init at91_gpio_irq_setup(void)
|
||||
{
|
||||
unsigned pioc, pin;
|
||||
|
||||
for (pioc = 0, pin = PIN_BASE;
|
||||
pioc < gpio_banks;
|
||||
pioc++) {
|
||||
void __iomem *controller;
|
||||
unsigned id = gpio[pioc].id;
|
||||
unsigned i;
|
||||
|
||||
controller = (void __iomem *) AT91_VA_BASE_SYS + pio_controller_offset[pioc];
|
||||
clk_enable(gpio[pioc].clock); /* enable PIO controller's clock */
|
||||
|
||||
controller = (void __iomem *) AT91_VA_BASE_SYS + gpio[pioc].offset;
|
||||
__raw_writel(~0, controller + PIO_IDR);
|
||||
|
||||
set_irq_data(id, (void *) pin);
|
||||
|
|
@ -408,5 +410,16 @@ void __init at91_gpio_irq_setup(unsigned banks)
|
|||
|
||||
set_irq_chained_handler(id, gpio_irq_handler);
|
||||
}
|
||||
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
|
||||
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
|
||||
}
|
||||
|
||||
/*
|
||||
* Called from the processor-specific init to enable GPIO pin support.
|
||||
*/
|
||||
void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
|
||||
{
|
||||
BUG_ON(nr_banks > MAX_GPIO_BANKS);
|
||||
|
||||
gpio = data;
|
||||
gpio_banks = nr_banks;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,8 +34,6 @@
|
|||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
|
||||
static void at91_aic_mask_irq(unsigned int irq)
|
||||
{
|
||||
|
|
@ -61,12 +59,12 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
|
|||
srctype = AT91_AIC_SRCTYPE_RISING;
|
||||
break;
|
||||
case IRQT_LOW:
|
||||
if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */
|
||||
if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */
|
||||
return -EINVAL;
|
||||
srctype = AT91_AIC_SRCTYPE_LOW;
|
||||
break;
|
||||
case IRQT_FALLING:
|
||||
if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */
|
||||
if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */
|
||||
return -EINVAL;
|
||||
srctype = AT91_AIC_SRCTYPE_FALLING;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -123,13 +123,13 @@ static int at91_pm_enter(suspend_state_t state)
|
|||
(at91_sys_read(AT91_PMC_PCSR)
|
||||
| (1 << AT91_ID_FIQ)
|
||||
| (1 << AT91_ID_SYS)
|
||||
| (1 << AT91_ID_IRQ0)
|
||||
| (1 << AT91_ID_IRQ1)
|
||||
| (1 << AT91_ID_IRQ2)
|
||||
| (1 << AT91_ID_IRQ3)
|
||||
| (1 << AT91_ID_IRQ4)
|
||||
| (1 << AT91_ID_IRQ5)
|
||||
| (1 << AT91_ID_IRQ6))
|
||||
| (1 << AT91RM9200_ID_IRQ0)
|
||||
| (1 << AT91RM9200_ID_IRQ1)
|
||||
| (1 << AT91RM9200_ID_IRQ2)
|
||||
| (1 << AT91RM9200_ID_IRQ3)
|
||||
| (1 << AT91RM9200_ID_IRQ4)
|
||||
| (1 << AT91RM9200_ID_IRQ5)
|
||||
| (1 << AT91RM9200_ID_IRQ6))
|
||||
& at91_sys_read(AT91_AIC_IMR),
|
||||
state);
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,12 @@ config MACH_EDB9302
|
|||
Say 'Y' here if you want your kernel to support the Cirrus
|
||||
Logic EDB9302 Evaluation Board.
|
||||
|
||||
config MACH_EDB9312
|
||||
bool "Support Cirrus Logic EDB9312"
|
||||
help
|
||||
Say 'Y' here if you want your kernel to support the Cirrus
|
||||
Logic EDB9312 Evaluation Board.
|
||||
|
||||
config MACH_EDB9315
|
||||
bool "Support Cirrus Logic EDB9315"
|
||||
help
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@ obj-n :=
|
|||
obj- :=
|
||||
|
||||
obj-$(CONFIG_MACH_EDB9302) += edb9302.o
|
||||
obj-$(CONFIG_MACH_EDB9312) += edb9312.o
|
||||
obj-$(CONFIG_MACH_EDB9315) += edb9315.o
|
||||
obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o
|
||||
obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* arch/arm/mach-ep93xx/edb9312.c
|
||||
* Cirrus Logic EDB9312 support.
|
||||
*
|
||||
* Copyright (C) 2006 Infosys Technologies Limited
|
||||
* Toufeeq Hussain <toufeeq_hussain@infosys.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or (at
|
||||
* your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
static struct physmap_flash_data edb9312_flash_data = {
|
||||
.width = 4,
|
||||
};
|
||||
|
||||
static struct resource edb9312_flash_resource = {
|
||||
.start = 0x60000000,
|
||||
.end = 0x61ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device edb9312_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &edb9312_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &edb9312_flash_resource,
|
||||
};
|
||||
|
||||
static void __init edb9312_init_machine(void)
|
||||
{
|
||||
ep93xx_init_devices();
|
||||
platform_device_register(&edb9312_flash);
|
||||
}
|
||||
|
||||
MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
|
||||
/* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
|
||||
.phys_io = EP93XX_APB_PHYS_BASE,
|
||||
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
|
||||
.boot_params = 0x00000100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
.init_machine = edb9312_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -69,16 +69,16 @@ dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where,
|
|||
if (addr)
|
||||
switch (size) {
|
||||
case 1:
|
||||
asm("ldr%?b %0, [%1, %2]"
|
||||
: "=r" (v) : "r" (addr), "r" (where));
|
||||
asm("ldrb %0, [%1, %2]"
|
||||
: "=r" (v) : "r" (addr), "r" (where) : "cc");
|
||||
break;
|
||||
case 2:
|
||||
asm("ldr%?h %0, [%1, %2]"
|
||||
: "=r" (v) : "r" (addr), "r" (where));
|
||||
asm("ldrh %0, [%1, %2]"
|
||||
: "=r" (v) : "r" (addr), "r" (where) : "cc");
|
||||
break;
|
||||
case 4:
|
||||
asm("ldr%? %0, [%1, %2]"
|
||||
: "=r" (v) : "r" (addr), "r" (where));
|
||||
asm("ldr %0, [%1, %2]"
|
||||
: "=r" (v) : "r" (addr), "r" (where) : "cc");
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -103,16 +103,19 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
|
|||
if (addr)
|
||||
switch (size) {
|
||||
case 1:
|
||||
asm("str%?b %0, [%1, %2]"
|
||||
: : "r" (value), "r" (addr), "r" (where));
|
||||
asm("strb %0, [%1, %2]"
|
||||
: : "r" (value), "r" (addr), "r" (where)
|
||||
: "cc");
|
||||
break;
|
||||
case 2:
|
||||
asm("str%?h %0, [%1, %2]"
|
||||
: : "r" (value), "r" (addr), "r" (where));
|
||||
asm("strh %0, [%1, %2]"
|
||||
: : "r" (value), "r" (addr), "r" (where)
|
||||
: "cc");
|
||||
break;
|
||||
case 4:
|
||||
asm("str%? %0, [%1, %2]"
|
||||
: : "r" (value), "r" (addr), "r" (where));
|
||||
asm("str %0, [%1, %2]"
|
||||
: : "r" (value), "r" (addr), "r" (where)
|
||||
: "cc");
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,35 @@
|
|||
if ARCH_IOP32X
|
||||
|
||||
menu "IOP32x Implementation Options"
|
||||
|
||||
comment "IOP32x Platform Types"
|
||||
|
||||
config MACH_GLANTANK
|
||||
bool "Enable support for the IO-Data GLAN Tank"
|
||||
help
|
||||
Say Y here if you want to run your kernel on the GLAN Tank
|
||||
NAS appliance or machines from IO-Data's HDL-Gxxx, HDL-GWxxx
|
||||
and HDL-GZxxx series.
|
||||
|
||||
config ARCH_IQ80321
|
||||
bool "Enable support for IQ80321"
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ80321
|
||||
evaluation kit for the IOP321 processor.
|
||||
|
||||
config ARCH_IQ31244
|
||||
bool "Enable support for EP80219/IQ31244"
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel EP80219
|
||||
evaluation kit for the Intel 80219 processor (a IOP321 variant)
|
||||
or the IQ31244 evaluation kit for the IOP321 processor.
|
||||
|
||||
config MACH_N2100
|
||||
bool "Enable support for the Thecus n2100"
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Thecus n2100
|
||||
NAS appliance.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
obj-y := irq.o
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
||||
obj-$(CONFIG_MACH_GLANTANK) += glantank.o
|
||||
obj-$(CONFIG_ARCH_IQ80321) += iq80321.o
|
||||
obj-$(CONFIG_ARCH_IQ31244) += iq31244.o
|
||||
obj-$(CONFIG_MACH_N2100) += n2100.o
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
zreladdr-y := 0xa0008000
|
||||
params_phys-y := 0xa0000100
|
||||
initrd_phys-y := 0xa0800000
|
||||
|
|
@ -0,0 +1,195 @@
|
|||
/*
|
||||
* arch/arm/mach-iop32x/glantank.c
|
||||
*
|
||||
* Board support code for the GLAN Tank.
|
||||
*
|
||||
* Copyright (C) 2006 Martin Michlmayr <tbm@cyrius.com>
|
||||
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
/*
|
||||
* GLAN Tank timer tick configuration.
|
||||
*/
|
||||
static void __init glantank_timer_init(void)
|
||||
{
|
||||
/* 33.333 MHz crystal. */
|
||||
iop3xx_init_time(200000000);
|
||||
}
|
||||
|
||||
static struct sys_timer glantank_timer = {
|
||||
.init = glantank_timer_init,
|
||||
.offset = iop3xx_gettimeoffset,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* GLAN Tank I/O.
|
||||
*/
|
||||
static struct map_desc glantank_io_desc[] __initdata = {
|
||||
{ /* on-board devices */
|
||||
.virtual = GLANTANK_UART,
|
||||
.pfn = __phys_to_pfn(GLANTANK_UART),
|
||||
.length = 0x00100000,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
void __init glantank_map_io(void)
|
||||
{
|
||||
iop3xx_map_io();
|
||||
iotable_init(glantank_io_desc, ARRAY_SIZE(glantank_io_desc));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* GLAN Tank PCI.
|
||||
*/
|
||||
#define INTA IRQ_IOP32X_XINT0
|
||||
#define INTB IRQ_IOP32X_XINT1
|
||||
#define INTC IRQ_IOP32X_XINT2
|
||||
#define INTD IRQ_IOP32X_XINT3
|
||||
|
||||
static inline int __init
|
||||
glantank_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
static int pci_irq_table[][4] = {
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
{INTD, INTD, INTD, INTD}, /* UART (8250) */
|
||||
{INTA, INTA, INTA, INTA}, /* Ethernet (E1000) */
|
||||
{INTB, INTB, INTB, INTB}, /* IDE (AEC6280R) */
|
||||
{INTC, INTC, INTC, INTC}, /* USB (NEC) */
|
||||
};
|
||||
|
||||
BUG_ON(pin < 1 || pin > 4);
|
||||
|
||||
return pci_irq_table[slot % 4][pin - 1];
|
||||
}
|
||||
|
||||
static struct hw_pci glantank_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = glantank_pci_map_irq,
|
||||
};
|
||||
|
||||
static int __init glantank_pci_init(void)
|
||||
{
|
||||
if (machine_is_glantank())
|
||||
pci_common_init(&glantank_pci);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(glantank_pci_init);
|
||||
|
||||
|
||||
/*
|
||||
* GLAN Tank machine initialization.
|
||||
*/
|
||||
static struct physmap_flash_data glantank_flash_data = {
|
||||
.width = 1,
|
||||
};
|
||||
|
||||
static struct resource glantank_flash_resource = {
|
||||
.start = 0xf0000000,
|
||||
.end = 0xf007ffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device glantank_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &glantank_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &glantank_flash_resource,
|
||||
};
|
||||
|
||||
static struct plat_serial8250_port glantank_serial_port[] = {
|
||||
{
|
||||
.mapbase = GLANTANK_UART,
|
||||
.membase = (char *)GLANTANK_UART,
|
||||
.irq = IRQ_IOP32X_XINT3,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 0,
|
||||
.uartclk = 1843200,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct resource glantank_uart_resource = {
|
||||
.start = GLANTANK_UART,
|
||||
.end = GLANTANK_UART + 7,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device glantank_serial_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = glantank_serial_port,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &glantank_uart_resource,
|
||||
};
|
||||
|
||||
static void glantank_power_off(void)
|
||||
{
|
||||
__raw_writeb(0x01, 0xfe8d0004);
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
static void __init glantank_init_machine(void)
|
||||
{
|
||||
platform_device_register(&iop3xx_i2c0_device);
|
||||
platform_device_register(&iop3xx_i2c1_device);
|
||||
platform_device_register(&glantank_flash_device);
|
||||
platform_device_register(&glantank_serial_device);
|
||||
|
||||
pm_power_off = glantank_power_off;
|
||||
}
|
||||
|
||||
MACHINE_START(GLANTANK, "GLAN Tank")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.phys_io = GLANTANK_UART,
|
||||
.io_pg_offst = ((GLANTANK_UART) >> 18) & 0xfffc,
|
||||
.boot_params = 0xa0000100,
|
||||
.map_io = glantank_map_io,
|
||||
.init_irq = iop32x_init_irq,
|
||||
.timer = &glantank_timer,
|
||||
.init_machine = glantank_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,293 @@
|
|||
/*
|
||||
* arch/arm/mach-iop32x/iq31244.c
|
||||
*
|
||||
* Board support code for the Intel EP80219 and IQ31244 platforms.
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
* Copyright 2003 (c) MontaVista, Software, Inc.
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
|
||||
/*
|
||||
* The EP80219 and IQ31244 use the same machine ID. To find out
|
||||
* which of the two we're running on, we look at the processor ID.
|
||||
*/
|
||||
static int is_80219(void)
|
||||
{
|
||||
extern int processor_id;
|
||||
return !!((processor_id & 0xffffffe0) == 0x69052e20);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* EP80219/IQ31244 timer tick configuration.
|
||||
*/
|
||||
static void __init iq31244_timer_init(void)
|
||||
{
|
||||
if (is_80219()) {
|
||||
/* 33.333 MHz crystal. */
|
||||
iop3xx_init_time(200000000);
|
||||
} else {
|
||||
/* 33.000 MHz crystal. */
|
||||
iop3xx_init_time(198000000);
|
||||
}
|
||||
}
|
||||
|
||||
static struct sys_timer iq31244_timer = {
|
||||
.init = iq31244_timer_init,
|
||||
.offset = iop3xx_gettimeoffset,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* IQ31244 I/O.
|
||||
*/
|
||||
static struct map_desc iq31244_io_desc[] __initdata = {
|
||||
{ /* on-board devices */
|
||||
.virtual = IQ31244_UART,
|
||||
.pfn = __phys_to_pfn(IQ31244_UART),
|
||||
.length = 0x00100000,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
void __init iq31244_map_io(void)
|
||||
{
|
||||
iop3xx_map_io();
|
||||
iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* EP80219/IQ31244 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
if (slot == 0) {
|
||||
/* CFlash */
|
||||
irq = IRQ_IOP32X_XINT1;
|
||||
} else if (slot == 1) {
|
||||
/* 82551 Pro 100 */
|
||||
irq = IRQ_IOP32X_XINT0;
|
||||
} else if (slot == 2) {
|
||||
/* PCI-X Slot */
|
||||
irq = IRQ_IOP32X_XINT3;
|
||||
} else if (slot == 3) {
|
||||
/* SATA */
|
||||
irq = IRQ_IOP32X_XINT2;
|
||||
} else {
|
||||
printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
|
||||
"device PCI:%d:%d:%d\n", dev->bus->number,
|
||||
PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
||||
irq = -1;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static struct hw_pci ep80219_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = ep80219_pci_map_irq,
|
||||
};
|
||||
|
||||
static inline int __init
|
||||
iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
if (slot == 0) {
|
||||
/* CFlash */
|
||||
irq = IRQ_IOP32X_XINT1;
|
||||
} else if (slot == 1) {
|
||||
/* SATA */
|
||||
irq = IRQ_IOP32X_XINT2;
|
||||
} else if (slot == 2) {
|
||||
/* PCI-X Slot */
|
||||
irq = IRQ_IOP32X_XINT3;
|
||||
} else if (slot == 3) {
|
||||
/* 82546 GigE */
|
||||
irq = IRQ_IOP32X_XINT0;
|
||||
} else {
|
||||
printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
|
||||
"device PCI:%d:%d:%d\n", dev->bus->number,
|
||||
PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
||||
irq = -1;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static struct hw_pci iq31244_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = iq31244_pci_map_irq,
|
||||
};
|
||||
|
||||
static int __init iq31244_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq31244()) {
|
||||
if (is_80219()) {
|
||||
pci_common_init(&ep80219_pci);
|
||||
} else {
|
||||
pci_common_init(&iq31244_pci);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq31244_pci_init);
|
||||
|
||||
|
||||
/*
|
||||
* IQ31244 machine initialisation.
|
||||
*/
|
||||
static struct physmap_flash_data iq31244_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource iq31244_flash_resource = {
|
||||
.start = 0xf0000000,
|
||||
.end = 0xf07fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device iq31244_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &iq31244_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &iq31244_flash_resource,
|
||||
};
|
||||
|
||||
static struct plat_serial8250_port iq31244_serial_port[] = {
|
||||
{
|
||||
.mapbase = IQ31244_UART,
|
||||
.membase = (char *)IQ31244_UART,
|
||||
.irq = IRQ_IOP32X_XINT1,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 0,
|
||||
.uartclk = 1843200,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct resource iq31244_uart_resource = {
|
||||
.start = IQ31244_UART,
|
||||
.end = IQ31244_UART + 7,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device iq31244_serial_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = iq31244_serial_port,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &iq31244_uart_resource,
|
||||
};
|
||||
|
||||
/*
|
||||
* This function will send a SHUTDOWN_COMPLETE message to the PIC
|
||||
* controller over I2C. We are not using the i2c subsystem since
|
||||
* we are going to power off and it may be removed
|
||||
*/
|
||||
void ep80219_power_off(void)
|
||||
{
|
||||
/*
|
||||
* Send the Address byte w/ the start condition
|
||||
*/
|
||||
*IOP3XX_IDBR1 = 0x60;
|
||||
*IOP3XX_ICR1 = 0xE9;
|
||||
mdelay(1);
|
||||
|
||||
/*
|
||||
* Send the START_MSG byte w/ no start or stop condition
|
||||
*/
|
||||
*IOP3XX_IDBR1 = 0x0F;
|
||||
*IOP3XX_ICR1 = 0xE8;
|
||||
mdelay(1);
|
||||
|
||||
/*
|
||||
* Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
|
||||
* stop condition
|
||||
*/
|
||||
*IOP3XX_IDBR1 = 0x03;
|
||||
*IOP3XX_ICR1 = 0xE8;
|
||||
mdelay(1);
|
||||
|
||||
/*
|
||||
* Send an ignored byte w/ stop condition
|
||||
*/
|
||||
*IOP3XX_IDBR1 = 0x00;
|
||||
*IOP3XX_ICR1 = 0xEA;
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
static void __init iq31244_init_machine(void)
|
||||
{
|
||||
platform_device_register(&iop3xx_i2c0_device);
|
||||
platform_device_register(&iop3xx_i2c1_device);
|
||||
platform_device_register(&iq31244_flash_device);
|
||||
platform_device_register(&iq31244_serial_device);
|
||||
|
||||
if (is_80219())
|
||||
pm_power_off = ep80219_power_off;
|
||||
}
|
||||
|
||||
MACHINE_START(IQ31244, "Intel IQ31244")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = IQ31244_UART,
|
||||
.io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
|
||||
.boot_params = 0xa0000100,
|
||||
.map_io = iq31244_map_io,
|
||||
.init_irq = iop32x_init_irq,
|
||||
.timer = &iq31244_timer,
|
||||
.init_machine = iq31244_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,193 @@
|
|||
/*
|
||||
* arch/arm/mach-iop32x/iq80321.c
|
||||
*
|
||||
* Board support code for the Intel IQ80321 platform.
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
/*
|
||||
* IQ80321 timer tick configuration.
|
||||
*/
|
||||
static void __init iq80321_timer_init(void)
|
||||
{
|
||||
/* 33.333 MHz crystal. */
|
||||
iop3xx_init_time(200000000);
|
||||
}
|
||||
|
||||
static struct sys_timer iq80321_timer = {
|
||||
.init = iq80321_timer_init,
|
||||
.offset = iop3xx_gettimeoffset,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* IQ80321 I/O.
|
||||
*/
|
||||
static struct map_desc iq80321_io_desc[] __initdata = {
|
||||
{ /* on-board devices */
|
||||
.virtual = IQ80321_UART,
|
||||
.pfn = __phys_to_pfn(IQ80321_UART),
|
||||
.length = 0x00100000,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
void __init iq80321_map_io(void)
|
||||
{
|
||||
iop3xx_map_io();
|
||||
iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* IQ80321 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
if ((slot == 2 || slot == 6) && pin == 1) {
|
||||
/* PCI-X Slot INTA */
|
||||
irq = IRQ_IOP32X_XINT2;
|
||||
} else if ((slot == 2 || slot == 6) && pin == 2) {
|
||||
/* PCI-X Slot INTA */
|
||||
irq = IRQ_IOP32X_XINT3;
|
||||
} else if ((slot == 2 || slot == 6) && pin == 3) {
|
||||
/* PCI-X Slot INTA */
|
||||
irq = IRQ_IOP32X_XINT0;
|
||||
} else if ((slot == 2 || slot == 6) && pin == 4) {
|
||||
/* PCI-X Slot INTA */
|
||||
irq = IRQ_IOP32X_XINT1;
|
||||
} else if (slot == 4 || slot == 8) {
|
||||
/* Gig-E */
|
||||
irq = IRQ_IOP32X_XINT0;
|
||||
} else {
|
||||
printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
|
||||
"device PCI:%d:%d:%d\n", dev->bus->number,
|
||||
PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
||||
irq = -1;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static struct hw_pci iq80321_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = iq80321_pci_map_irq,
|
||||
};
|
||||
|
||||
static int __init iq80321_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq80321())
|
||||
pci_common_init(&iq80321_pci);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq80321_pci_init);
|
||||
|
||||
|
||||
/*
|
||||
* IQ80321 machine initialisation.
|
||||
*/
|
||||
static struct physmap_flash_data iq80321_flash_data = {
|
||||
.width = 1,
|
||||
};
|
||||
|
||||
static struct resource iq80321_flash_resource = {
|
||||
.start = 0xf0000000,
|
||||
.end = 0xf07fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device iq80321_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &iq80321_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &iq80321_flash_resource,
|
||||
};
|
||||
|
||||
static struct plat_serial8250_port iq80321_serial_port[] = {
|
||||
{
|
||||
.mapbase = IQ80321_UART,
|
||||
.membase = (char *)IQ80321_UART,
|
||||
.irq = IRQ_IOP32X_XINT1,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 0,
|
||||
.uartclk = 1843200,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct resource iq80321_uart_resource = {
|
||||
.start = IQ80321_UART,
|
||||
.end = IQ80321_UART + 7,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device iq80321_serial_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = iq80321_serial_port,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &iq80321_uart_resource,
|
||||
};
|
||||
|
||||
static void __init iq80321_init_machine(void)
|
||||
{
|
||||
platform_device_register(&iop3xx_i2c0_device);
|
||||
platform_device_register(&iop3xx_i2c1_device);
|
||||
platform_device_register(&iq80321_flash_device);
|
||||
platform_device_register(&iq80321_serial_device);
|
||||
}
|
||||
|
||||
MACHINE_START(IQ80321, "Intel IQ80321")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = IQ80321_UART,
|
||||
.io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
|
||||
.boot_params = 0xa0000100,
|
||||
.map_io = iq80321_map_io,
|
||||
.init_irq = iop32x_init_irq,
|
||||
.timer = &iq80321_timer,
|
||||
.init_machine = iq80321_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
* arch/arm/mach-iop32x/irq.c
|
||||
*
|
||||
* Generic IOP32X IRQ handling functionality
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static u32 iop32x_mask;
|
||||
|
||||
static inline void intctl_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static inline void intstr_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static void
|
||||
iop32x_irq_mask(unsigned int irq)
|
||||
{
|
||||
iop32x_mask &= ~(1 << irq);
|
||||
intctl_write(iop32x_mask);
|
||||
}
|
||||
|
||||
static void
|
||||
iop32x_irq_unmask(unsigned int irq)
|
||||
{
|
||||
iop32x_mask |= 1 << irq;
|
||||
intctl_write(iop32x_mask);
|
||||
}
|
||||
|
||||
struct irq_chip ext_chip = {
|
||||
.name = "IOP32x",
|
||||
.ack = iop32x_irq_mask,
|
||||
.mask = iop32x_irq_mask,
|
||||
.unmask = iop32x_irq_unmask,
|
||||
};
|
||||
|
||||
void __init iop32x_init_irq(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
intctl_write(0);
|
||||
intstr_write(0);
|
||||
if (machine_is_glantank() ||
|
||||
machine_is_iq80321() ||
|
||||
machine_is_iq31244() ||
|
||||
machine_is_n2100())
|
||||
*IOP3XX_PCIIRSR = 0x0f;
|
||||
|
||||
for (i = 0; i < NR_IRQS; i++) {
|
||||
set_irq_chip(i, &ext_chip);
|
||||
set_irq_handler(i, do_level_IRQ);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,251 @@
|
|||
/*
|
||||
* arch/arm/mach-iop32x/n2100.c
|
||||
*
|
||||
* Board support code for the Thecus N2100 platform.
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
* Copyright 2003 (c) MontaVista, Software, Inc.
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
/*
|
||||
* N2100 timer tick configuration.
|
||||
*/
|
||||
static void __init n2100_timer_init(void)
|
||||
{
|
||||
/* 33.000 MHz crystal. */
|
||||
iop3xx_init_time(198000000);
|
||||
}
|
||||
|
||||
static struct sys_timer n2100_timer = {
|
||||
.init = n2100_timer_init,
|
||||
.offset = iop3xx_gettimeoffset,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* N2100 I/O.
|
||||
*/
|
||||
static struct map_desc n2100_io_desc[] __initdata = {
|
||||
{ /* on-board devices */
|
||||
.virtual = N2100_UART,
|
||||
.pfn = __phys_to_pfn(N2100_UART),
|
||||
.length = 0x00100000,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
void __init n2100_map_io(void)
|
||||
{
|
||||
iop3xx_map_io();
|
||||
iotable_init(n2100_io_desc, ARRAY_SIZE(n2100_io_desc));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* N2100 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
if (PCI_SLOT(dev->devfn) == 1) {
|
||||
/* RTL8110SB #1 */
|
||||
irq = IRQ_IOP32X_XINT0;
|
||||
} else if (PCI_SLOT(dev->devfn) == 2) {
|
||||
/* RTL8110SB #2 */
|
||||
irq = IRQ_IOP32X_XINT1;
|
||||
} else if (PCI_SLOT(dev->devfn) == 3) {
|
||||
/* Sil3512 */
|
||||
irq = IRQ_IOP32X_XINT2;
|
||||
} else if (PCI_SLOT(dev->devfn) == 4 && pin == 1) {
|
||||
/* VT6212 INTA */
|
||||
irq = IRQ_IOP32X_XINT1;
|
||||
} else if (PCI_SLOT(dev->devfn) == 4 && pin == 2) {
|
||||
/* VT6212 INTB */
|
||||
irq = IRQ_IOP32X_XINT0;
|
||||
} else if (PCI_SLOT(dev->devfn) == 4 && pin == 3) {
|
||||
/* VT6212 INTC */
|
||||
irq = IRQ_IOP32X_XINT2;
|
||||
} else if (PCI_SLOT(dev->devfn) == 5) {
|
||||
/* Mini-PCI slot */
|
||||
irq = IRQ_IOP32X_XINT3;
|
||||
} else {
|
||||
printk(KERN_ERR "n2100_pci_map_irq() called for unknown "
|
||||
"device PCI:%d:%d:%d\n", dev->bus->number,
|
||||
PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
||||
irq = -1;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static struct hw_pci n2100_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = n2100_pci_map_irq,
|
||||
};
|
||||
|
||||
static int __init n2100_pci_init(void)
|
||||
{
|
||||
if (machine_is_n2100())
|
||||
pci_common_init(&n2100_pci);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(n2100_pci_init);
|
||||
|
||||
|
||||
/*
|
||||
* N2100 machine initialisation.
|
||||
*/
|
||||
static struct physmap_flash_data n2100_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource n2100_flash_resource = {
|
||||
.start = 0xf0000000,
|
||||
.end = 0xf0ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device n2100_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &n2100_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &n2100_flash_resource,
|
||||
};
|
||||
|
||||
|
||||
static struct plat_serial8250_port n2100_serial_port[] = {
|
||||
{
|
||||
.mapbase = N2100_UART,
|
||||
.membase = (char *)N2100_UART,
|
||||
.irq = 0,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 0,
|
||||
.uartclk = 1843200,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct resource n2100_uart_resource = {
|
||||
.start = N2100_UART,
|
||||
.end = N2100_UART + 7,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device n2100_serial_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = n2100_serial_port,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &n2100_uart_resource,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Pull PCA9532 GPIO #8 low to power off the machine.
|
||||
*/
|
||||
static void n2100_power_off(void)
|
||||
{
|
||||
local_irq_disable();
|
||||
|
||||
/* Start condition, I2C address of PCA9532, write transaction. */
|
||||
*IOP3XX_IDBR0 = 0xc0;
|
||||
*IOP3XX_ICR0 = 0xe9;
|
||||
mdelay(1);
|
||||
|
||||
/* Write address 0x08. */
|
||||
*IOP3XX_IDBR0 = 0x08;
|
||||
*IOP3XX_ICR0 = 0xe8;
|
||||
mdelay(1);
|
||||
|
||||
/* Write data 0x01, stop condition. */
|
||||
*IOP3XX_IDBR0 = 0x01;
|
||||
*IOP3XX_ICR0 = 0xea;
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
|
||||
static struct timer_list power_button_poll_timer;
|
||||
|
||||
static void power_button_poll(unsigned long dummy)
|
||||
{
|
||||
if (gpio_line_get(N2100_POWER_BUTTON) == 0) {
|
||||
ctrl_alt_del();
|
||||
return;
|
||||
}
|
||||
|
||||
power_button_poll_timer.expires = jiffies + (HZ / 10);
|
||||
add_timer(&power_button_poll_timer);
|
||||
}
|
||||
|
||||
|
||||
static void __init n2100_init_machine(void)
|
||||
{
|
||||
platform_device_register(&iop3xx_i2c0_device);
|
||||
platform_device_register(&n2100_flash_device);
|
||||
platform_device_register(&n2100_serial_device);
|
||||
|
||||
pm_power_off = n2100_power_off;
|
||||
|
||||
init_timer(&power_button_poll_timer);
|
||||
power_button_poll_timer.function = power_button_poll;
|
||||
power_button_poll_timer.expires = jiffies + (HZ / 10);
|
||||
add_timer(&power_button_poll_timer);
|
||||
}
|
||||
|
||||
MACHINE_START(N2100, "Thecus N2100")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.phys_io = N2100_UART,
|
||||
.io_pg_offst = ((N2100_UART) >> 18) & 0xfffc,
|
||||
.boot_params = 0xa0000100,
|
||||
.map_io = n2100_map_io,
|
||||
.init_irq = iop32x_init_irq,
|
||||
.timer = &n2100_timer,
|
||||
.init_machine = n2100_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
if ARCH_IOP33X
|
||||
|
||||
menu "IOP33x Implementation Options"
|
||||
|
||||
comment "IOP33x Platform Types"
|
||||
|
||||
config ARCH_IQ80331
|
||||
bool "Enable support for IQ80331"
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ80331
|
||||
evaluation kit for the IOP331 chipset.
|
||||
|
||||
config MACH_IQ80332
|
||||
bool "Enable support for IQ80332"
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ80332
|
||||
evaluation kit for the IOP332 chipset.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
obj-y := irq.o uart.o
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
||||
obj-$(CONFIG_ARCH_IQ80331) += iq80331.o
|
||||
obj-$(CONFIG_MACH_IQ80332) += iq80332.o
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
zreladdr-y := 0x00008000
|
||||
params_phys-y := 0x00000100
|
||||
initrd_phys-y := 0x00800000
|
||||
|
|
@ -0,0 +1,148 @@
|
|||
/*
|
||||
* arch/arm/mach-iop33x/iq80331.c
|
||||
*
|
||||
* Board support code for the Intel IQ80331 platform.
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2003 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
/*
|
||||
* IQ80331 timer tick configuration.
|
||||
*/
|
||||
static void __init iq80331_timer_init(void)
|
||||
{
|
||||
/* D-Step parts run at a higher internal bus frequency */
|
||||
if (*IOP3XX_ATURID >= 0xa)
|
||||
iop3xx_init_time(333000000);
|
||||
else
|
||||
iop3xx_init_time(266000000);
|
||||
}
|
||||
|
||||
static struct sys_timer iq80331_timer = {
|
||||
.init = iq80331_timer_init,
|
||||
.offset = iop3xx_gettimeoffset,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* IQ80331 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
if (slot == 1 && pin == 1) {
|
||||
/* PCI-X Slot INTA */
|
||||
irq = IRQ_IOP33X_XINT1;
|
||||
} else if (slot == 1 && pin == 2) {
|
||||
/* PCI-X Slot INTB */
|
||||
irq = IRQ_IOP33X_XINT2;
|
||||
} else if (slot == 1 && pin == 3) {
|
||||
/* PCI-X Slot INTC */
|
||||
irq = IRQ_IOP33X_XINT3;
|
||||
} else if (slot == 1 && pin == 4) {
|
||||
/* PCI-X Slot INTD */
|
||||
irq = IRQ_IOP33X_XINT0;
|
||||
} else if (slot == 2) {
|
||||
/* GigE */
|
||||
irq = IRQ_IOP33X_XINT2;
|
||||
} else {
|
||||
printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
|
||||
"device PCI:%d:%d:%d\n", dev->bus->number,
|
||||
PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
||||
irq = -1;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static struct hw_pci iq80331_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = iq80331_pci_map_irq,
|
||||
};
|
||||
|
||||
static int __init iq80331_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq80331())
|
||||
pci_common_init(&iq80331_pci);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq80331_pci_init);
|
||||
|
||||
|
||||
/*
|
||||
* IQ80331 machine initialisation.
|
||||
*/
|
||||
static struct physmap_flash_data iq80331_flash_data = {
|
||||
.width = 1,
|
||||
};
|
||||
|
||||
static struct resource iq80331_flash_resource = {
|
||||
.start = 0xc0000000,
|
||||
.end = 0xc07fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device iq80331_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &iq80331_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &iq80331_flash_resource,
|
||||
};
|
||||
|
||||
static void __init iq80331_init_machine(void)
|
||||
{
|
||||
platform_device_register(&iop3xx_i2c0_device);
|
||||
platform_device_register(&iop3xx_i2c1_device);
|
||||
platform_device_register(&iop33x_uart0_device);
|
||||
platform_device_register(&iop33x_uart1_device);
|
||||
platform_device_register(&iq80331_flash_device);
|
||||
}
|
||||
|
||||
MACHINE_START(IQ80331, "Intel IQ80331")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = 0xfefff000,
|
||||
.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc,
|
||||
.boot_params = 0x00000100,
|
||||
.map_io = iop3xx_map_io,
|
||||
.init_irq = iop33x_init_irq,
|
||||
.timer = &iq80331_timer,
|
||||
.init_machine = iq80331_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,148 @@
|
|||
/*
|
||||
* arch/arm/mach-iop33x/iq80332.c
|
||||
*
|
||||
* Board support code for the Intel IQ80332 platform.
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
/*
|
||||
* IQ80332 timer tick configuration.
|
||||
*/
|
||||
static void __init iq80332_timer_init(void)
|
||||
{
|
||||
/* D-Step parts and the iop333 run at a higher internal bus frequency */
|
||||
if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374)
|
||||
iop3xx_init_time(333000000);
|
||||
else
|
||||
iop3xx_init_time(266000000);
|
||||
}
|
||||
|
||||
static struct sys_timer iq80332_timer = {
|
||||
.init = iq80332_timer_init,
|
||||
.offset = iop3xx_gettimeoffset,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* IQ80332 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
if (slot == 4 && pin == 1) {
|
||||
/* PCI-X Slot INTA */
|
||||
irq = IRQ_IOP33X_XINT0;
|
||||
} else if (slot == 4 && pin == 2) {
|
||||
/* PCI-X Slot INTB */
|
||||
irq = IRQ_IOP33X_XINT1;
|
||||
} else if (slot == 4 && pin == 3) {
|
||||
/* PCI-X Slot INTC */
|
||||
irq = IRQ_IOP33X_XINT2;
|
||||
} else if (slot == 4 && pin == 4) {
|
||||
/* PCI-X Slot INTD */
|
||||
irq = IRQ_IOP33X_XINT3;
|
||||
} else if (slot == 6) {
|
||||
/* GigE */
|
||||
irq = IRQ_IOP33X_XINT2;
|
||||
} else {
|
||||
printk(KERN_ERR "iq80332_pci_map_irq() called for unknown "
|
||||
"device PCI:%d:%d:%d\n", dev->bus->number,
|
||||
PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
||||
irq = -1;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static struct hw_pci iq80332_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iop3xx_pci_setup,
|
||||
.preinit = iop3xx_pci_preinit,
|
||||
.scan = iop3xx_pci_scan_bus,
|
||||
.map_irq = iq80332_pci_map_irq,
|
||||
};
|
||||
|
||||
static int __init iq80332_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq80332())
|
||||
pci_common_init(&iq80332_pci);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq80332_pci_init);
|
||||
|
||||
|
||||
/*
|
||||
* IQ80332 machine initialisation.
|
||||
*/
|
||||
static struct physmap_flash_data iq80332_flash_data = {
|
||||
.width = 1,
|
||||
};
|
||||
|
||||
static struct resource iq80332_flash_resource = {
|
||||
.start = 0xc0000000,
|
||||
.end = 0xc07fffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device iq80332_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &iq80332_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &iq80332_flash_resource,
|
||||
};
|
||||
|
||||
static void __init iq80332_init_machine(void)
|
||||
{
|
||||
platform_device_register(&iop3xx_i2c0_device);
|
||||
platform_device_register(&iop3xx_i2c1_device);
|
||||
platform_device_register(&iop33x_uart0_device);
|
||||
platform_device_register(&iop33x_uart1_device);
|
||||
platform_device_register(&iq80332_flash_device);
|
||||
}
|
||||
|
||||
MACHINE_START(IQ80332, "Intel IQ80332")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = 0xfefff000,
|
||||
.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc,
|
||||
.boot_params = 0x00000100,
|
||||
.map_io = iop3xx_map_io,
|
||||
.init_irq = iop33x_init_irq,
|
||||
.timer = &iq80332_timer,
|
||||
.init_machine = iq80332_init_machine,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* arch/arm/mach-iop33x/irq.c
|
||||
*
|
||||
* Generic IOP331 IRQ handling functionality
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2003 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static u32 iop33x_mask0;
|
||||
static u32 iop33x_mask1;
|
||||
|
||||
static inline void intctl0_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static inline void intctl1_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static inline void intstr0_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static inline void intstr1_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static inline void intbase_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static inline void intsize_write(u32 val)
|
||||
{
|
||||
iop3xx_cp6_enable();
|
||||
asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
|
||||
iop3xx_cp6_disable();
|
||||
}
|
||||
|
||||
static void
|
||||
iop33x_irq_mask1 (unsigned int irq)
|
||||
{
|
||||
iop33x_mask0 &= ~(1 << irq);
|
||||
intctl0_write(iop33x_mask0);
|
||||
}
|
||||
|
||||
static void
|
||||
iop33x_irq_mask2 (unsigned int irq)
|
||||
{
|
||||
iop33x_mask1 &= ~(1 << (irq - 32));
|
||||
intctl1_write(iop33x_mask1);
|
||||
}
|
||||
|
||||
static void
|
||||
iop33x_irq_unmask1(unsigned int irq)
|
||||
{
|
||||
iop33x_mask0 |= 1 << irq;
|
||||
intctl0_write(iop33x_mask0);
|
||||
}
|
||||
|
||||
static void
|
||||
iop33x_irq_unmask2(unsigned int irq)
|
||||
{
|
||||
iop33x_mask1 |= (1 << (irq - 32));
|
||||
intctl1_write(iop33x_mask1);
|
||||
}
|
||||
|
||||
struct irq_chip iop33x_irqchip1 = {
|
||||
.name = "IOP33x-1",
|
||||
.ack = iop33x_irq_mask1,
|
||||
.mask = iop33x_irq_mask1,
|
||||
.unmask = iop33x_irq_unmask1,
|
||||
};
|
||||
|
||||
struct irq_chip iop33x_irqchip2 = {
|
||||
.name = "IOP33x-2",
|
||||
.ack = iop33x_irq_mask2,
|
||||
.mask = iop33x_irq_mask2,
|
||||
.unmask = iop33x_irq_unmask2,
|
||||
};
|
||||
|
||||
void __init iop33x_init_irq(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
intctl0_write(0);
|
||||
intctl1_write(0);
|
||||
intstr0_write(0);
|
||||
intstr1_write(0);
|
||||
intbase_write(0);
|
||||
intsize_write(1);
|
||||
if (machine_is_iq80331())
|
||||
*IOP3XX_PCIIRSR = 0x0f;
|
||||
|
||||
for (i = 0; i < NR_IRQS; i++) {
|
||||
set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2);
|
||||
set_irq_handler(i, do_level_IRQ);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,105 @@
|
|||
/*
|
||||
* arch/arm/mach-iop33x/uart.c
|
||||
*
|
||||
* Author: Dave Jiang (dave.jiang@intel.com)
|
||||
* Copyright (C) 2004 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/hardware/iop3xx.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#define IOP33X_UART_XTAL 33334000
|
||||
|
||||
static struct plat_serial8250_port iop33x_uart0_data[] = {
|
||||
{
|
||||
.membase = (char *)IOP33X_UART0_VIRT,
|
||||
.mapbase = IOP33X_UART0_PHYS,
|
||||
.irq = IRQ_IOP33X_UART0,
|
||||
.uartclk = IOP33X_UART_XTAL,
|
||||
.regshift = 2,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct resource iop33x_uart0_resources[] = {
|
||||
[0] = {
|
||||
.start = IOP33X_UART0_PHYS,
|
||||
.end = IOP33X_UART0_PHYS + 0x3f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP33X_UART0,
|
||||
.end = IRQ_IOP33X_UART0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device iop33x_uart0_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = iop33x_uart0_data,
|
||||
},
|
||||
.num_resources = 2,
|
||||
.resource = iop33x_uart0_resources,
|
||||
};
|
||||
|
||||
|
||||
static struct resource iop33x_uart1_resources[] = {
|
||||
[0] = {
|
||||
.start = IOP33X_UART1_PHYS,
|
||||
.end = IOP33X_UART1_PHYS + 0x3f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP33X_UART1,
|
||||
.end = IRQ_IOP33X_UART1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct plat_serial8250_port iop33x_uart1_data[] = {
|
||||
{
|
||||
.membase = (char *)IOP33X_UART1_VIRT,
|
||||
.mapbase = IOP33X_UART1_PHYS,
|
||||
.irq = IRQ_IOP33X_UART1,
|
||||
.uartclk = IOP33X_UART_XTAL,
|
||||
.regshift = 2,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
struct platform_device iop33x_uart1_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM1,
|
||||
.dev = {
|
||||
.platform_data = iop33x_uart1_data,
|
||||
},
|
||||
.num_resources = 2,
|
||||
.resource = iop33x_uart1_resources,
|
||||
};
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
if ARCH_IOP3XX
|
||||
|
||||
menu "IOP3xx Implementation Options"
|
||||
|
||||
comment "IOP3xx Platform Types"
|
||||
|
||||
config ARCH_IQ80321
|
||||
bool "Enable support for IQ80321"
|
||||
select ARCH_IOP321
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ80321
|
||||
evaluation kit for the IOP321 chipset.
|
||||
|
||||
config ARCH_IQ31244
|
||||
bool "Enable support for IQ31244"
|
||||
select ARCH_IOP321
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ31244
|
||||
evaluation kit for the IOP321 chipset.
|
||||
|
||||
config ARCH_IQ80331
|
||||
bool "Enable support for IQ80331"
|
||||
select ARCH_IOP331
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ80331
|
||||
evaluation kit for the IOP331 chipset.
|
||||
|
||||
config MACH_IQ80332
|
||||
bool "Enable support for IQ80332"
|
||||
select ARCH_IOP331
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel IQ80332
|
||||
evaluation kit for the IOP332 chipset.
|
||||
|
||||
config ARCH_EP80219
|
||||
bool "Enable support for EP80219"
|
||||
select ARCH_IOP321
|
||||
select ARCH_IQ31244
|
||||
help
|
||||
Say Y here if you want to run your kernel on the Intel EP80219
|
||||
evaluation kit for the Intel 80219 chipset (a IOP321 variant).
|
||||
|
||||
# Which IOP variant are we running?
|
||||
config ARCH_IOP321
|
||||
bool
|
||||
help
|
||||
The IQ80321 uses the IOP321 variant.
|
||||
The IQ31244 and EP80219 uses the IOP321 variant.
|
||||
|
||||
config ARCH_IOP331
|
||||
bool
|
||||
default ARCH_IQ80331
|
||||
help
|
||||
The IQ80331, IQ80332, and IQ80333 uses the IOP331 variant.
|
||||
|
||||
comment "IOP3xx Chipset Features"
|
||||
|
||||
config IOP331_STEPD
|
||||
bool "Chip stepping D of the IOP80331 processor or IOP80333"
|
||||
depends on (ARCH_IOP331)
|
||||
help
|
||||
Say Y here if you have StepD of the IOP80331 or IOP8033
|
||||
based platforms.
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
# Object file lists.
|
||||
|
||||
obj-y := common.o
|
||||
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
||||
obj-$(CONFIG_ARCH_IOP321) += iop321-setup.o iop321-irq.o iop321-pci.o iop321-time.o
|
||||
|
||||
obj-$(CONFIG_ARCH_IOP331) += iop331-setup.o iop331-irq.o iop331-pci.o iop331-time.o
|
||||
|
||||
obj-$(CONFIG_ARCH_IQ80321) += iq80321-mm.o iq80321-pci.o
|
||||
|
||||
obj-$(CONFIG_ARCH_IQ31244) += iq31244-mm.o iq31244-pci.o
|
||||
|
||||
obj-$(CONFIG_ARCH_IQ80331) += iq80331-mm.o iq80331-pci.o
|
||||
|
||||
obj-$(CONFIG_MACH_IQ80332) += iq80332-mm.o iq80332-pci.o
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
zreladdr-y := 0xa0008000
|
||||
params_phys-y := 0xa0000100
|
||||
initrd_phys-y := 0xa0800000
|
||||
ifeq ($(CONFIG_ARCH_IOP331),y)
|
||||
zreladdr-y := 0x00008000
|
||||
params_phys-y := 0x00000100
|
||||
initrd_phys-y := 0x00800000
|
||||
endif
|
||||
|
||||
|
|
@ -1,72 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/common.c
|
||||
*
|
||||
* Common routines shared across all IOP3xx implementations
|
||||
*
|
||||
* Author: Deepak Saxena <dsaxena@mvista.com>
|
||||
*
|
||||
* Copyright 2003 (c) MontaVista, Software, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
/*
|
||||
* Shared variables
|
||||
*/
|
||||
unsigned long iop3xx_pcibios_min_io = 0;
|
||||
unsigned long iop3xx_pcibios_min_mem = 0;
|
||||
|
||||
#ifdef CONFIG_ARCH_EP80219
|
||||
#include <linux/kernel.h>
|
||||
/*
|
||||
* Default power-off for EP80219
|
||||
*/
|
||||
|
||||
static inline void ep80219_send_to_pic(__u8 c) {
|
||||
}
|
||||
|
||||
void ep80219_power_off(void)
|
||||
{
|
||||
/*
|
||||
* This function will send a SHUTDOWN_COMPLETE message to the PIC controller
|
||||
* over I2C. We are not using the i2c subsystem since we are going to power
|
||||
* off and it may be removed
|
||||
*/
|
||||
|
||||
/* Send the Address byte w/ the start condition */
|
||||
*IOP321_IDBR1 = 0x60;
|
||||
*IOP321_ICR1 = 0xE9;
|
||||
mdelay(1);
|
||||
|
||||
/* Send the START_MSG byte w/ no start or stop condition */
|
||||
*IOP321_IDBR1 = 0x0F;
|
||||
*IOP321_ICR1 = 0xE8;
|
||||
mdelay(1);
|
||||
|
||||
/* Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or stop condition */
|
||||
*IOP321_IDBR1 = 0x03;
|
||||
*IOP321_ICR1 = 0xE8;
|
||||
mdelay(1);
|
||||
|
||||
/* Send an ignored byte w/ stop condition */
|
||||
*IOP321_IDBR1 = 0x00;
|
||||
*IOP321_ICR1 = 0xEA;
|
||||
|
||||
while (1) ;
|
||||
}
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
static int __init ep80219_init(void)
|
||||
{
|
||||
pm_power_off = ep80219_power_off;
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(ep80219_init);
|
||||
#endif
|
||||
|
|
@ -1,97 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/iop321-irq.c
|
||||
*
|
||||
* Generic IOP321 IRQ handling functionality
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Added IOP3XX chipset and IQ80321 board masking code.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static u32 iop321_mask /* = 0 */;
|
||||
|
||||
static inline void intctl_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val));
|
||||
}
|
||||
|
||||
static inline void intstr_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6,0,%0,c4,c0,0"::"r" (val));
|
||||
}
|
||||
|
||||
static void
|
||||
iop321_irq_mask (unsigned int irq)
|
||||
{
|
||||
|
||||
iop321_mask &= ~(1 << (irq - IOP321_IRQ_OFS));
|
||||
|
||||
intctl_write(iop321_mask);
|
||||
}
|
||||
|
||||
static void
|
||||
iop321_irq_unmask (unsigned int irq)
|
||||
{
|
||||
iop321_mask |= (1 << (irq - IOP321_IRQ_OFS));
|
||||
|
||||
intctl_write(iop321_mask);
|
||||
}
|
||||
|
||||
struct irq_chip ext_chip = {
|
||||
.name = "IOP",
|
||||
.ack = iop321_irq_mask,
|
||||
.mask = iop321_irq_mask,
|
||||
.unmask = iop321_irq_unmask,
|
||||
};
|
||||
|
||||
void __init iop321_init_irq(void)
|
||||
{
|
||||
unsigned int i, tmp;
|
||||
|
||||
/* Enable access to coprocessor 6 for dealing with IRQs.
|
||||
* From RMK:
|
||||
* Basically, the Intel documentation here is poor. It appears that
|
||||
* you need to set the bit to be able to access the coprocessor from
|
||||
* SVC mode. Whether that allows access from user space or not is
|
||||
* unclear.
|
||||
*/
|
||||
asm volatile (
|
||||
"mrc p15, 0, %0, c15, c1, 0\n\t"
|
||||
"orr %0, %0, %1\n\t"
|
||||
"mcr p15, 0, %0, c15, c1, 0\n\t"
|
||||
/* The action is delayed, so we have to do this: */
|
||||
"mrc p15, 0, %0, c15, c1, 0\n\t"
|
||||
"mov %0, %0\n\t"
|
||||
"sub pc, pc, #4"
|
||||
: "=r" (tmp) : "i" (1 << 6) );
|
||||
|
||||
intctl_write(0); // disable all interrupts
|
||||
intstr_write(0); // treat all as IRQ
|
||||
if(machine_is_iq80321() ||
|
||||
machine_is_iq31244()) // all interrupts are inputs to chip
|
||||
*IOP321_PCIIRSR = 0x0f;
|
||||
|
||||
for(i = IOP321_IRQ_OFS; i < NR_IOP321_IRQS; i++)
|
||||
{
|
||||
set_irq_chip(i, &ext_chip);
|
||||
set_irq_handler(i, do_level_IRQ);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,220 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iop321-pci.c
|
||||
*
|
||||
* PCI support for the Intel IOP321 chipset
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach/pci.h>
|
||||
|
||||
#include <asm/arch/iop321.h>
|
||||
|
||||
// #define DEBUG
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBG(x...) printk(x)
|
||||
#else
|
||||
#define DBG(x...) do { } while (0)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This routine builds either a type0 or type1 configuration command. If the
|
||||
* bus is on the 80321 then a type0 made, else a type1 is created.
|
||||
*/
|
||||
static u32 iop321_cfg_address(struct pci_bus *bus, int devfn, int where)
|
||||
{
|
||||
struct pci_sys_data *sys = bus->sysdata;
|
||||
u32 addr;
|
||||
|
||||
if (sys->busnr == bus->number)
|
||||
addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11);
|
||||
else
|
||||
addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
|
||||
|
||||
addr |= PCI_FUNC(devfn) << 8 | (where & ~3);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine checks the status of the last configuration cycle. If an error
|
||||
* was detected it returns a 1, else it returns a 0. The errors being checked
|
||||
* are parity, master abort, target abort (master and target). These types of
|
||||
* errors occure during a config cycle where there is no device, like during
|
||||
* the discovery stage.
|
||||
*/
|
||||
static int iop321_pci_status(void)
|
||||
{
|
||||
unsigned int status;
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
* Check the status registers.
|
||||
*/
|
||||
status = *IOP321_ATUSR;
|
||||
if (status & 0xf900)
|
||||
{
|
||||
DBG("\t\t\tPCI: P0 - status = 0x%08x\n", status);
|
||||
*IOP321_ATUSR = status & 0xf900;
|
||||
ret = 1;
|
||||
}
|
||||
status = *IOP321_ATUISR;
|
||||
if (status & 0x679f)
|
||||
{
|
||||
DBG("\t\t\tPCI: P1 - status = 0x%08x\n", status);
|
||||
*IOP321_ATUISR = status & 0x679f;
|
||||
ret = 1;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Simply write the address register and read the configuration
|
||||
* data. Note that the 4 nop's ensure that we are able to handle
|
||||
* a delayed abort (in theory.)
|
||||
*/
|
||||
static inline u32 iop321_read(unsigned long addr)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"str %1, [%2]\n\t"
|
||||
"ldr %0, [%3]\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
: "=r" (val)
|
||||
: "r" (addr), "r" (IOP321_OCCAR), "r" (IOP321_OCCDR));
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* The read routines must check the error status of the last configuration
|
||||
* cycle. If there was an error, the routine returns all hex f's.
|
||||
*/
|
||||
static int
|
||||
iop321_read_config(struct pci_bus *bus, unsigned int devfn, int where,
|
||||
int size, u32 *value)
|
||||
{
|
||||
unsigned long addr = iop321_cfg_address(bus, devfn, where);
|
||||
u32 val = iop321_read(addr) >> ((where & 3) * 8);
|
||||
|
||||
if( iop321_pci_status() )
|
||||
val = 0xffffffff;
|
||||
|
||||
*value = val;
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int
|
||||
iop321_write_config(struct pci_bus *bus, unsigned int devfn, int where,
|
||||
int size, u32 value)
|
||||
{
|
||||
unsigned long addr = iop321_cfg_address(bus, devfn, where);
|
||||
u32 val;
|
||||
|
||||
if (size != 4) {
|
||||
val = iop321_read(addr);
|
||||
if (!iop321_pci_status() == 0)
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
|
||||
where = (where & 3) * 8;
|
||||
|
||||
if (size == 1)
|
||||
val &= ~(0xff << where);
|
||||
else
|
||||
val &= ~(0xffff << where);
|
||||
|
||||
*IOP321_OCCDR = val | value << where;
|
||||
} else {
|
||||
asm volatile(
|
||||
"str %1, [%2]\n\t"
|
||||
"str %0, [%3]\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
:
|
||||
: "r" (value), "r" (addr),
|
||||
"r" (IOP321_OCCAR), "r" (IOP321_OCCDR));
|
||||
}
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static struct pci_ops iop321_ops = {
|
||||
.read = iop321_read_config,
|
||||
.write = iop321_write_config,
|
||||
};
|
||||
|
||||
/*
|
||||
* When a PCI device does not exist during config cycles, the 80200 gets a
|
||||
* bus error instead of returning 0xffffffff. This handler simply returns.
|
||||
*/
|
||||
int
|
||||
iop321_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
|
||||
{
|
||||
DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n",
|
||||
addr, fsr, regs->ARM_pc, regs->ARM_lr);
|
||||
|
||||
/*
|
||||
* If it was an imprecise abort, then we need to correct the
|
||||
* return address to be _after_ the instruction.
|
||||
*/
|
||||
if (fsr & (1 << 10))
|
||||
regs->ARM_pc += 4;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Scan an IOP321 PCI bus. sys->bus defines which bus we scan.
|
||||
*/
|
||||
struct pci_bus *iop321_scan_bus(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
return pci_scan_bus(sys->busnr, &iop321_ops, sys);
|
||||
}
|
||||
|
||||
void iop321_init(void)
|
||||
{
|
||||
DBG("PCI: Intel 80321 PCI init code.\n");
|
||||
DBG("ATU: IOP321_ATUCMD=0x%04x\n", *IOP321_ATUCMD);
|
||||
DBG("ATU: IOP321_OMWTVR0=0x%04x, IOP321_OIOWTVR=0x%04x\n",
|
||||
*IOP321_OMWTVR0,
|
||||
*IOP321_OIOWTVR);
|
||||
DBG("ATU: IOP321_ATUCR=0x%08x\n", *IOP321_ATUCR);
|
||||
DBG("ATU: IOP321_IABAR0=0x%08x IOP321_IALR0=0x%08x IOP321_IATVR0=%08x\n",
|
||||
*IOP321_IABAR0, *IOP321_IALR0, *IOP321_IATVR0);
|
||||
DBG("ATU: IOP321_OMWTVR0=0x%08x\n", *IOP321_OMWTVR0);
|
||||
DBG("ATU: IOP321_IABAR1=0x%08x IOP321_IALR1=0x%08x\n",
|
||||
*IOP321_IABAR1, *IOP321_IALR1);
|
||||
DBG("ATU: IOP321_ERBAR=0x%08x IOP321_ERLR=0x%08x IOP321_ERTVR=%08x\n",
|
||||
*IOP321_ERBAR, *IOP321_ERLR, *IOP321_ERTVR);
|
||||
DBG("ATU: IOP321_IABAR2=0x%08x IOP321_IALR2=0x%08x IOP321_IATVR2=%08x\n",
|
||||
*IOP321_IABAR2, *IOP321_IALR2, *IOP321_IATVR2);
|
||||
DBG("ATU: IOP321_IABAR3=0x%08x IOP321_IALR3=0x%08x IOP321_IATVR3=%08x\n",
|
||||
*IOP321_IABAR3, *IOP321_IALR3, *IOP321_IATVR3);
|
||||
|
||||
hook_fault_code(16+6, iop321_pci_abort, SIGBUS, "imprecise external abort");
|
||||
}
|
||||
|
||||
|
|
@ -1,173 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/iop321-setup.c
|
||||
*
|
||||
* Author: Nicolas Pitre <nico@cam.org>
|
||||
* Copyright (C) 2001 MontaVista Software, Inc.
|
||||
* Copyright (C) 2004 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial_core.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#define IOP321_UART_XTAL 1843200
|
||||
|
||||
/*
|
||||
* Standard IO mapping for all IOP321 based systems
|
||||
*/
|
||||
static struct map_desc iop321_std_desc[] __initdata = {
|
||||
{ /* mem mapped registers */
|
||||
.virtual = IOP321_VIRT_MEM_BASE,
|
||||
.pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
|
||||
.length = 0x00002000,
|
||||
.type = MT_DEVICE
|
||||
}, { /* PCI IO space */
|
||||
.virtual = IOP321_PCI_LOWER_IO_VA,
|
||||
.pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
|
||||
.length = IOP321_PCI_IO_WINDOW_SIZE,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ARCH_IQ80321
|
||||
#define UARTBASE IQ80321_UART
|
||||
#define IRQ_UART IRQ_IQ80321_UART
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_IQ31244
|
||||
#define UARTBASE IQ31244_UART
|
||||
#define IRQ_UART IRQ_IQ31244_UART
|
||||
#endif
|
||||
|
||||
static struct uart_port iop321_serial_ports[] = {
|
||||
{
|
||||
.membase = (char*)(UARTBASE),
|
||||
.mapbase = (UARTBASE),
|
||||
.irq = IRQ_UART,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 0,
|
||||
.uartclk = IOP321_UART_XTAL,
|
||||
.line = 0,
|
||||
.type = PORT_16550A,
|
||||
.fifosize = 16
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource iop32x_i2c_0_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xfffff680,
|
||||
.end = 0xfffff698,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP321_I2C_0,
|
||||
.end = IRQ_IOP321_I2C_0,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource iop32x_i2c_1_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xfffff6a0,
|
||||
.end = 0xfffff6b8,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP321_I2C_1,
|
||||
.end = IRQ_IOP321_I2C_1,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device iop32x_i2c_0_controller = {
|
||||
.name = "IOP3xx-I2C",
|
||||
.id = 0,
|
||||
.num_resources = 2,
|
||||
.resource = iop32x_i2c_0_resources
|
||||
};
|
||||
|
||||
static struct platform_device iop32x_i2c_1_controller = {
|
||||
.name = "IOP3xx-I2C",
|
||||
.id = 1,
|
||||
.num_resources = 2,
|
||||
.resource = iop32x_i2c_1_resources
|
||||
};
|
||||
|
||||
static struct platform_device *iop32x_devices[] __initdata = {
|
||||
&iop32x_i2c_0_controller,
|
||||
&iop32x_i2c_1_controller
|
||||
};
|
||||
|
||||
void __init iop32x_init(void)
|
||||
{
|
||||
if(iop_is_321())
|
||||
{
|
||||
platform_add_devices(iop32x_devices,
|
||||
ARRAY_SIZE(iop32x_devices));
|
||||
}
|
||||
}
|
||||
|
||||
void __init iop321_map_io(void)
|
||||
{
|
||||
iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
|
||||
early_serial_setup(&iop321_serial_ports[0]);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_IQ80321
|
||||
extern void iq80321_map_io(void);
|
||||
extern struct sys_timer iop321_timer;
|
||||
extern void iop321_init_time(void);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_IQ31244
|
||||
extern void iq31244_map_io(void);
|
||||
extern struct sys_timer iop321_timer;
|
||||
extern void iop321_init_time(void);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_IQ80321)
|
||||
MACHINE_START(IQ80321, "Intel IQ80321")
|
||||
/* Maintainer: Intel Corporation */
|
||||
.phys_io = IQ80321_UART,
|
||||
.io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
|
||||
.map_io = iq80321_map_io,
|
||||
.init_irq = iop321_init_irq,
|
||||
.timer = &iop321_timer,
|
||||
.boot_params = 0xa0000100,
|
||||
.init_machine = iop32x_init,
|
||||
MACHINE_END
|
||||
#elif defined(CONFIG_ARCH_IQ31244)
|
||||
MACHINE_START(IQ31244, "Intel IQ31244")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = IQ31244_UART,
|
||||
.io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
|
||||
.map_io = iq31244_map_io,
|
||||
.init_irq = iop321_init_irq,
|
||||
.timer = &iop321_timer,
|
||||
.boot_params = 0xa0000100,
|
||||
.init_machine = iop32x_init,
|
||||
MACHINE_END
|
||||
#else
|
||||
#error No machine descriptor defined for this IOP3XX implementation
|
||||
#endif
|
||||
|
|
@ -1,108 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iop321-time.c
|
||||
*
|
||||
* Timer code for IOP321 based systems
|
||||
*
|
||||
* Author: Deepak Saxena <dsaxena@mvista.com>
|
||||
*
|
||||
* Copyright 2002-2003 MontaVista Software Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/timex.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#define IOP321_TIME_SYNC 0
|
||||
|
||||
static inline unsigned long get_elapsed(void)
|
||||
{
|
||||
return LATCH - *IOP321_TU_TCR0;
|
||||
}
|
||||
|
||||
static unsigned long iop321_gettimeoffset(void)
|
||||
{
|
||||
unsigned long elapsed, usec;
|
||||
u32 tisr1, tisr2;
|
||||
|
||||
/*
|
||||
* If an interrupt was pending before we read the timer,
|
||||
* we've already wrapped. Factor this into the time.
|
||||
* If an interrupt was pending after we read the timer,
|
||||
* it may have wrapped between checking the interrupt
|
||||
* status and reading the timer. Re-read the timer to
|
||||
* be sure its value is after the wrap.
|
||||
*/
|
||||
|
||||
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
|
||||
elapsed = get_elapsed();
|
||||
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
|
||||
|
||||
if(tisr1 & 1)
|
||||
elapsed += LATCH;
|
||||
else if (tisr2 & 1)
|
||||
elapsed = LATCH + get_elapsed();
|
||||
|
||||
/*
|
||||
* Now convert them to usec.
|
||||
*/
|
||||
usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
|
||||
|
||||
return usec;
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
u32 tisr;
|
||||
|
||||
write_seqlock(&xtime_lock);
|
||||
|
||||
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
|
||||
tisr |= 1;
|
||||
asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
|
||||
|
||||
timer_tick(regs);
|
||||
|
||||
write_sequnlock(&xtime_lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction iop321_timer_irq = {
|
||||
.name = "IOP321 Timer Tick",
|
||||
.handler = iop321_timer_interrupt,
|
||||
.flags = IRQF_DISABLED | IRQF_TIMER,
|
||||
};
|
||||
|
||||
static void __init iop321_timer_init(void)
|
||||
{
|
||||
u32 timer_ctl;
|
||||
|
||||
setup_irq(IRQ_IOP321_TIMER0, &iop321_timer_irq);
|
||||
|
||||
timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
|
||||
IOP321_TMR_RATIO_1_1;
|
||||
|
||||
asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
|
||||
|
||||
asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
|
||||
}
|
||||
|
||||
struct sys_timer iop321_timer = {
|
||||
.init = &iop321_timer_init,
|
||||
.offset = iop321_gettimeoffset,
|
||||
};
|
||||
|
|
@ -1,129 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/iop331-irq.c
|
||||
*
|
||||
* Generic IOP331 IRQ handling functionality
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2003 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static u32 iop331_mask0 = 0;
|
||||
static u32 iop331_mask1 = 0;
|
||||
|
||||
static inline void intctl_write0(u32 val)
|
||||
{
|
||||
// INTCTL0
|
||||
asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val));
|
||||
}
|
||||
|
||||
static inline void intctl_write1(u32 val)
|
||||
{
|
||||
// INTCTL1
|
||||
asm volatile("mcr p6,0,%0,c1,c0,0"::"r" (val));
|
||||
}
|
||||
|
||||
static inline void intstr_write0(u32 val)
|
||||
{
|
||||
// INTSTR0
|
||||
asm volatile("mcr p6,0,%0,c2,c0,0"::"r" (val));
|
||||
}
|
||||
|
||||
static inline void intstr_write1(u32 val)
|
||||
{
|
||||
// INTSTR1
|
||||
asm volatile("mcr p6,0,%0,c3,c0,0"::"r" (val));
|
||||
}
|
||||
|
||||
static void
|
||||
iop331_irq_mask1 (unsigned int irq)
|
||||
{
|
||||
iop331_mask0 &= ~(1 << (irq - IOP331_IRQ_OFS));
|
||||
intctl_write0(iop331_mask0);
|
||||
}
|
||||
|
||||
static void
|
||||
iop331_irq_mask2 (unsigned int irq)
|
||||
{
|
||||
iop331_mask1 &= ~(1 << (irq - IOP331_IRQ_OFS - 32));
|
||||
intctl_write1(iop331_mask1);
|
||||
}
|
||||
|
||||
static void
|
||||
iop331_irq_unmask1(unsigned int irq)
|
||||
{
|
||||
iop331_mask0 |= (1 << (irq - IOP331_IRQ_OFS));
|
||||
intctl_write0(iop331_mask0);
|
||||
}
|
||||
|
||||
static void
|
||||
iop331_irq_unmask2(unsigned int irq)
|
||||
{
|
||||
iop331_mask1 |= (1 << (irq - IOP331_IRQ_OFS - 32));
|
||||
intctl_write1(iop331_mask1);
|
||||
}
|
||||
|
||||
struct irq_chip iop331_irqchip1 = {
|
||||
.name = "IOP-1",
|
||||
.ack = iop331_irq_mask1,
|
||||
.mask = iop331_irq_mask1,
|
||||
.unmask = iop331_irq_unmask1,
|
||||
};
|
||||
|
||||
struct irq_chip iop331_irqchip2 = {
|
||||
.name = "IOP-2",
|
||||
.ack = iop331_irq_mask2,
|
||||
.mask = iop331_irq_mask2,
|
||||
.unmask = iop331_irq_unmask2,
|
||||
};
|
||||
|
||||
void __init iop331_init_irq(void)
|
||||
{
|
||||
unsigned int i, tmp;
|
||||
|
||||
/* Enable access to coprocessor 6 for dealing with IRQs.
|
||||
* From RMK:
|
||||
* Basically, the Intel documentation here is poor. It appears that
|
||||
* you need to set the bit to be able to access the coprocessor from
|
||||
* SVC mode. Whether that allows access from user space or not is
|
||||
* unclear.
|
||||
*/
|
||||
asm volatile (
|
||||
"mrc p15, 0, %0, c15, c1, 0\n\t"
|
||||
"orr %0, %0, %1\n\t"
|
||||
"mcr p15, 0, %0, c15, c1, 0\n\t"
|
||||
/* The action is delayed, so we have to do this: */
|
||||
"mrc p15, 0, %0, c15, c1, 0\n\t"
|
||||
"mov %0, %0\n\t"
|
||||
"sub pc, pc, #4"
|
||||
: "=r" (tmp) : "i" (1 << 6) );
|
||||
|
||||
intctl_write0(0); // disable all interrupts
|
||||
intctl_write1(0);
|
||||
intstr_write0(0); // treat all as IRQ
|
||||
intstr_write1(0);
|
||||
if(machine_is_iq80331()) // all interrupts are inputs to chip
|
||||
*IOP331_PCIIRSR = 0x0f;
|
||||
|
||||
for(i = IOP331_IRQ_OFS; i < NR_IOP331_IRQS; i++)
|
||||
{
|
||||
set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2);
|
||||
set_irq_handler(i, do_level_IRQ);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,222 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iop331-pci.c
|
||||
*
|
||||
* PCI support for the Intel IOP331 chipset
|
||||
*
|
||||
* Author: Dave Jiang (dave.jiang@intel.com)
|
||||
* Copyright (C) 2003, 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach/pci.h>
|
||||
|
||||
#include <asm/arch/iop331.h>
|
||||
|
||||
#undef DEBUG
|
||||
#undef DEBUG1
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBG(x...) printk(x)
|
||||
#else
|
||||
#define DBG(x...) do { } while (0)
|
||||
#endif
|
||||
|
||||
#ifdef DEBUG1
|
||||
#define DBG1(x...) printk(x)
|
||||
#else
|
||||
#define DBG1(x...) do { } while (0)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This routine builds either a type0 or type1 configuration command. If the
|
||||
* bus is on the 80331 then a type0 made, else a type1 is created.
|
||||
*/
|
||||
static u32 iop331_cfg_address(struct pci_bus *bus, int devfn, int where)
|
||||
{
|
||||
struct pci_sys_data *sys = bus->sysdata;
|
||||
u32 addr;
|
||||
|
||||
if (sys->busnr == bus->number)
|
||||
addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11);
|
||||
else
|
||||
addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
|
||||
|
||||
addr |= PCI_FUNC(devfn) << 8 | (where & ~3);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine checks the status of the last configuration cycle. If an error
|
||||
* was detected it returns a 1, else it returns a 0. The errors being checked
|
||||
* are parity, master abort, target abort (master and target). These types of
|
||||
* errors occure during a config cycle where there is no device, like during
|
||||
* the discovery stage.
|
||||
*/
|
||||
static int iop331_pci_status(void)
|
||||
{
|
||||
unsigned int status;
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
* Check the status registers.
|
||||
*/
|
||||
status = *IOP331_ATUSR;
|
||||
if (status & 0xf900)
|
||||
{
|
||||
DBG("\t\t\tPCI: P0 - status = 0x%08x\n", status);
|
||||
*IOP331_ATUSR = status & 0xf900;
|
||||
ret = 1;
|
||||
}
|
||||
status = *IOP331_ATUISR;
|
||||
if (status & 0x679f)
|
||||
{
|
||||
DBG("\t\t\tPCI: P1 - status = 0x%08x\n", status);
|
||||
*IOP331_ATUISR = status & 0x679f;
|
||||
ret = 1;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Simply write the address register and read the configuration
|
||||
* data. Note that the 4 nop's ensure that we are able to handle
|
||||
* a delayed abort (in theory.)
|
||||
*/
|
||||
static inline u32 iop331_read(unsigned long addr)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"str %1, [%2]\n\t"
|
||||
"ldr %0, [%3]\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
: "=r" (val)
|
||||
: "r" (addr), "r" (IOP331_OCCAR), "r" (IOP331_OCCDR));
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* The read routines must check the error status of the last configuration
|
||||
* cycle. If there was an error, the routine returns all hex f's.
|
||||
*/
|
||||
static int
|
||||
iop331_read_config(struct pci_bus *bus, unsigned int devfn, int where,
|
||||
int size, u32 *value)
|
||||
{
|
||||
unsigned long addr = iop331_cfg_address(bus, devfn, where);
|
||||
u32 val = iop331_read(addr) >> ((where & 3) * 8);
|
||||
|
||||
if( iop331_pci_status() )
|
||||
val = 0xffffffff;
|
||||
|
||||
*value = val;
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int
|
||||
iop331_write_config(struct pci_bus *bus, unsigned int devfn, int where,
|
||||
int size, u32 value)
|
||||
{
|
||||
unsigned long addr = iop331_cfg_address(bus, devfn, where);
|
||||
u32 val;
|
||||
|
||||
if (size != 4) {
|
||||
val = iop331_read(addr);
|
||||
if (!iop331_pci_status() == 0)
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
|
||||
where = (where & 3) * 8;
|
||||
|
||||
if (size == 1)
|
||||
val &= ~(0xff << where);
|
||||
else
|
||||
val &= ~(0xffff << where);
|
||||
|
||||
*IOP331_OCCDR = val | value << where;
|
||||
} else {
|
||||
asm volatile(
|
||||
"str %1, [%2]\n\t"
|
||||
"str %0, [%3]\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
:
|
||||
: "r" (value), "r" (addr),
|
||||
"r" (IOP331_OCCAR), "r" (IOP331_OCCDR));
|
||||
}
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static struct pci_ops iop331_ops = {
|
||||
.read = iop331_read_config,
|
||||
.write = iop331_write_config,
|
||||
};
|
||||
|
||||
/*
|
||||
* When a PCI device does not exist during config cycles, the XScale gets a
|
||||
* bus error instead of returning 0xffffffff. This handler simply returns.
|
||||
*/
|
||||
int
|
||||
iop331_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
|
||||
{
|
||||
DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n",
|
||||
addr, fsr, regs->ARM_pc, regs->ARM_lr);
|
||||
|
||||
/*
|
||||
* If it was an imprecise abort, then we need to correct the
|
||||
* return address to be _after_ the instruction.
|
||||
*/
|
||||
if (fsr & (1 << 10))
|
||||
regs->ARM_pc += 4;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Scan an IOP331 PCI bus. sys->bus defines which bus we scan.
|
||||
*/
|
||||
struct pci_bus *iop331_scan_bus(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
return pci_scan_bus(sys->busnr, &iop331_ops, sys);
|
||||
}
|
||||
|
||||
void iop331_init(void)
|
||||
{
|
||||
DBG1("PCI: Intel 80331 PCI init code.\n");
|
||||
DBG1("\tATU: IOP331_ATUCMD=0x%04x\n", *IOP331_ATUCMD);
|
||||
DBG1("\tATU: IOP331_OMWTVR0=0x%04x, IOP331_OIOWTVR=0x%04x\n",
|
||||
*IOP331_OMWTVR0,
|
||||
*IOP331_OIOWTVR);
|
||||
DBG1("\tATU: IOP331_OMWTVR1=0x%04x\n", *IOP331_OMWTVR1);
|
||||
DBG1("\tATU: IOP331_ATUCR=0x%08x\n", *IOP331_ATUCR);
|
||||
DBG1("\tATU: IOP331_IABAR0=0x%08x IOP331_IALR0=0x%08x IOP331_IATVR0=%08x\n", *IOP331_IABAR0, *IOP331_IALR0, *IOP331_IATVR0);
|
||||
DBG1("\tATU: IOP31_IABAR1=0x%08x IOP331_IALR1=0x%08x\n", *IOP331_IABAR1, *IOP331_IALR1);
|
||||
DBG1("\tATU: IOP331_ERBAR=0x%08x IOP331_ERLR=0x%08x IOP331_ERTVR=%08x\n", *IOP331_ERBAR, *IOP331_ERLR, *IOP331_ERTVR);
|
||||
DBG1("\tATU: IOP331_IABAR2=0x%08x IOP331_IALR2=0x%08x IOP331_IATVR2=%08x\n", *IOP331_IABAR2, *IOP331_IALR2, *IOP331_IATVR2);
|
||||
DBG1("\tATU: IOP331_IABAR3=0x%08x IOP331_IALR3=0x%08x IOP331_IATVR3=%08x\n", *IOP331_IABAR3, *IOP331_IALR3, *IOP331_IATVR3);
|
||||
|
||||
hook_fault_code(16+6, iop331_pci_abort, SIGBUS, "imprecise external abort");
|
||||
}
|
||||
|
||||
|
|
@ -1,221 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/iop331-setup.c
|
||||
*
|
||||
* Author: Dave Jiang (dave.jiang@intel.com)
|
||||
* Copyright (C) 2004 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial_8250.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#define IOP331_UART_XTAL 33334000
|
||||
|
||||
/*
|
||||
* Standard IO mapping for all IOP331 based systems
|
||||
*/
|
||||
static struct map_desc iop331_std_desc[] __initdata = {
|
||||
{ /* mem mapped registers */
|
||||
.virtual = IOP331_VIRT_MEM_BASE,
|
||||
.pfn = __phys_to_pfn(IOP331_PHYS_MEM_BASE),
|
||||
.length = 0x00002000,
|
||||
.type = MT_DEVICE
|
||||
}, { /* PCI IO space */
|
||||
.virtual = IOP331_PCI_LOWER_IO_VA,
|
||||
.pfn = __phys_to_pfn(IOP331_PCI_LOWER_IO_PA),
|
||||
.length = IOP331_PCI_IO_WINDOW_SIZE,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource iop33x_uart0_resources[] = {
|
||||
[0] = {
|
||||
.start = IOP331_UART0_PHYS,
|
||||
.end = IOP331_UART0_PHYS + 0x3f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP331_UART0,
|
||||
.end = IRQ_IOP331_UART0,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource iop33x_uart1_resources[] = {
|
||||
[0] = {
|
||||
.start = IOP331_UART1_PHYS,
|
||||
.end = IOP331_UART1_PHYS + 0x3f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP331_UART1,
|
||||
.end = IRQ_IOP331_UART1,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}
|
||||
};
|
||||
|
||||
static struct plat_serial8250_port iop33x_uart0_data[] = {
|
||||
{
|
||||
.membase = (char*)(IOP331_UART0_VIRT),
|
||||
.mapbase = (IOP331_UART0_PHYS),
|
||||
.irq = IRQ_IOP331_UART0,
|
||||
.uartclk = IOP331_UART_XTAL,
|
||||
.regshift = 2,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct plat_serial8250_port iop33x_uart1_data[] = {
|
||||
{
|
||||
.membase = (char*)(IOP331_UART1_VIRT),
|
||||
.mapbase = (IOP331_UART1_PHYS),
|
||||
.irq = IRQ_IOP331_UART1,
|
||||
.uartclk = IOP331_UART_XTAL,
|
||||
.regshift = 2,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = UPF_SKIP_TEST,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct platform_device iop33x_uart0 = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev.platform_data = iop33x_uart0_data,
|
||||
.num_resources = 2,
|
||||
.resource = iop33x_uart0_resources,
|
||||
};
|
||||
|
||||
static struct platform_device iop33x_uart1 = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM1,
|
||||
.dev.platform_data = iop33x_uart1_data,
|
||||
.num_resources = 2,
|
||||
.resource = iop33x_uart1_resources,
|
||||
};
|
||||
|
||||
static struct resource iop33x_i2c_0_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xfffff680,
|
||||
.end = 0xfffff698,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP331_I2C_0,
|
||||
.end = IRQ_IOP331_I2C_0,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource iop33x_i2c_1_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xfffff6a0,
|
||||
.end = 0xfffff6b8,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_IOP331_I2C_1,
|
||||
.end = IRQ_IOP331_I2C_1,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device iop33x_i2c_0_controller = {
|
||||
.name = "IOP3xx-I2C",
|
||||
.id = 0,
|
||||
.num_resources = 2,
|
||||
.resource = iop33x_i2c_0_resources
|
||||
};
|
||||
|
||||
static struct platform_device iop33x_i2c_1_controller = {
|
||||
.name = "IOP3xx-I2C",
|
||||
.id = 1,
|
||||
.num_resources = 2,
|
||||
.resource = iop33x_i2c_1_resources
|
||||
};
|
||||
|
||||
static struct platform_device *iop33x_devices[] __initdata = {
|
||||
&iop33x_uart0,
|
||||
&iop33x_uart1,
|
||||
&iop33x_i2c_0_controller,
|
||||
&iop33x_i2c_1_controller
|
||||
};
|
||||
|
||||
void __init iop33x_init(void)
|
||||
{
|
||||
if(iop_is_331())
|
||||
{
|
||||
platform_add_devices(iop33x_devices,
|
||||
ARRAY_SIZE(iop33x_devices));
|
||||
}
|
||||
}
|
||||
|
||||
void __init iop331_map_io(void)
|
||||
{
|
||||
iotable_init(iop331_std_desc, ARRAY_SIZE(iop331_std_desc));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_IOP331
|
||||
extern void iop331_init_irq(void);
|
||||
extern struct sys_timer iop331_timer;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_IQ80331
|
||||
extern void iq80331_map_io(void);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_IQ80332
|
||||
extern void iq80332_map_io(void);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_IQ80331)
|
||||
MACHINE_START(IQ80331, "Intel IQ80331")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = 0xfefff000,
|
||||
.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
|
||||
.map_io = iq80331_map_io,
|
||||
.init_irq = iop331_init_irq,
|
||||
.timer = &iop331_timer,
|
||||
.boot_params = 0x0100,
|
||||
.init_machine = iop33x_init,
|
||||
MACHINE_END
|
||||
|
||||
#elif defined(CONFIG_MACH_IQ80332)
|
||||
MACHINE_START(IQ80332, "Intel IQ80332")
|
||||
/* Maintainer: Intel Corp. */
|
||||
.phys_io = 0xfefff000,
|
||||
.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
|
||||
.map_io = iq80332_map_io,
|
||||
.init_irq = iop331_init_irq,
|
||||
.timer = &iop331_timer,
|
||||
.boot_params = 0x0100,
|
||||
.init_machine = iop33x_init,
|
||||
MACHINE_END
|
||||
|
||||
#else
|
||||
#error No machine descriptor defined for this IOP3XX implementation
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -1,106 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iop331-time.c
|
||||
*
|
||||
* Timer code for IOP331 based systems
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
*
|
||||
* Copyright 2003 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/timex.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
static inline unsigned long get_elapsed(void)
|
||||
{
|
||||
return LATCH - *IOP331_TU_TCR0;
|
||||
}
|
||||
|
||||
static unsigned long iop331_gettimeoffset(void)
|
||||
{
|
||||
unsigned long elapsed, usec;
|
||||
u32 tisr1, tisr2;
|
||||
|
||||
/*
|
||||
* If an interrupt was pending before we read the timer,
|
||||
* we've already wrapped. Factor this into the time.
|
||||
* If an interrupt was pending after we read the timer,
|
||||
* it may have wrapped between checking the interrupt
|
||||
* status and reading the timer. Re-read the timer to
|
||||
* be sure its value is after the wrap.
|
||||
*/
|
||||
|
||||
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
|
||||
elapsed = get_elapsed();
|
||||
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
|
||||
|
||||
if(tisr1 & 1)
|
||||
elapsed += LATCH;
|
||||
else if (tisr2 & 1)
|
||||
elapsed = LATCH + get_elapsed();
|
||||
|
||||
/*
|
||||
* Now convert them to usec.
|
||||
*/
|
||||
usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
|
||||
|
||||
return usec;
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
iop331_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
u32 tisr;
|
||||
|
||||
write_seqlock(&xtime_lock);
|
||||
|
||||
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
|
||||
tisr |= 1;
|
||||
asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
|
||||
|
||||
timer_tick(regs);
|
||||
|
||||
write_sequnlock(&xtime_lock);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction iop331_timer_irq = {
|
||||
.name = "IOP331 Timer Tick",
|
||||
.handler = iop331_timer_interrupt,
|
||||
.flags = IRQF_DISABLED | IRQF_TIMER,
|
||||
};
|
||||
|
||||
static void __init iop331_timer_init(void)
|
||||
{
|
||||
u32 timer_ctl;
|
||||
|
||||
setup_irq(IRQ_IOP331_TIMER0, &iop331_timer_irq);
|
||||
|
||||
timer_ctl = IOP331_TMR_EN | IOP331_TMR_PRIVILEGED | IOP331_TMR_RELOAD |
|
||||
IOP331_TMR_RATIO_1_1;
|
||||
|
||||
asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
|
||||
|
||||
asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
|
||||
|
||||
}
|
||||
|
||||
struct sys_timer iop331_timer = {
|
||||
.init = iop331_timer_init,
|
||||
.offset = iop331_gettimeoffset,
|
||||
};
|
||||
|
|
@ -1,45 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/mm.c
|
||||
*
|
||||
* Low level memory initialization for iq80321 platform
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
|
||||
/*
|
||||
* IQ80321 specific IO mappings
|
||||
*
|
||||
* We use RedBoot's setup for the onboard devices.
|
||||
*/
|
||||
static struct map_desc iq31244_io_desc[] __initdata = {
|
||||
{ /* on-board devices */
|
||||
.virtual = IQ31244_UART,
|
||||
.pfn = __phys_to_pfn(IQ31244_UART),
|
||||
.length = 0x00100000,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
};
|
||||
|
||||
void __init iq31244_map_io(void)
|
||||
{
|
||||
iop321_map_io();
|
||||
|
||||
iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
|
||||
}
|
||||
|
|
@ -1,129 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iq80321-pci.c
|
||||
*
|
||||
* PCI support for the Intel IQ80321 reference board
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
/*
|
||||
* The following macro is used to lookup irqs in a standard table
|
||||
* format for those systems that do not already have PCI
|
||||
* interrupts properly routed. We assume 1 <= pin <= 4
|
||||
*/
|
||||
#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
|
||||
({ int _ctl_ = -1; \
|
||||
unsigned int _idsel = idsel - minid; \
|
||||
if (_idsel <= maxid) \
|
||||
_ctl_ = pci_irq_table[_idsel][pin-1]; \
|
||||
_ctl_; })
|
||||
|
||||
#define INTA IRQ_IQ31244_INTA
|
||||
#define INTB IRQ_IQ31244_INTB
|
||||
#define INTC IRQ_IQ31244_INTC
|
||||
#define INTD IRQ_IQ31244_INTD
|
||||
|
||||
#define INTE IRQ_IQ31244_I82546
|
||||
|
||||
static inline int __init
|
||||
iq31244_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
||||
{
|
||||
static int pci_irq_table[][4] = {
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
#ifdef CONFIG_ARCH_EP80219
|
||||
{INTB, INTB, INTB, INTB}, /* CFlash */
|
||||
{INTE, INTE, INTE, INTE}, /* 82551 Pro 100 */
|
||||
{INTD, INTD, INTD, INTD}, /* PCI-X Slot */
|
||||
{INTC, INTC, INTC, INTC}, /* SATA */
|
||||
#else
|
||||
{INTB, INTB, INTB, INTB}, /* CFlash */
|
||||
{INTC, INTC, INTC, INTC}, /* SATA */
|
||||
{INTD, INTD, INTD, INTD}, /* PCI-X Slot */
|
||||
{INTE, INTE, INTE, INTE}, /* 82546 GigE */
|
||||
#endif // CONFIG_ARCH_EP80219
|
||||
};
|
||||
|
||||
BUG_ON(pin < 1 || pin > 4);
|
||||
|
||||
return PCI_IRQ_TABLE_LOOKUP(0, 7);
|
||||
}
|
||||
|
||||
static int iq31244_setup(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
struct resource *res;
|
||||
|
||||
if(nr != 0)
|
||||
return 0;
|
||||
|
||||
res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
|
||||
if (!res)
|
||||
panic("PCI: unable to alloc resources");
|
||||
|
||||
res[0].start = IOP321_PCI_LOWER_IO_VA;
|
||||
res[0].end = IOP321_PCI_UPPER_IO_VA;
|
||||
res[0].name = "IQ31244 PCI I/O Space";
|
||||
res[0].flags = IORESOURCE_IO;
|
||||
|
||||
res[1].start = IOP321_PCI_LOWER_MEM_PA;
|
||||
res[1].end = IOP321_PCI_UPPER_MEM_PA;
|
||||
res[1].name = "IQ31244 PCI Memory Space";
|
||||
res[1].flags = IORESOURCE_MEM;
|
||||
|
||||
request_resource(&ioport_resource, &res[0]);
|
||||
request_resource(&iomem_resource, &res[1]);
|
||||
|
||||
sys->mem_offset = IOP321_PCI_MEM_OFFSET;
|
||||
sys->io_offset = IOP321_PCI_IO_OFFSET;
|
||||
|
||||
sys->resource[0] = &res[0];
|
||||
sys->resource[1] = &res[1];
|
||||
sys->resource[2] = NULL;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void iq31244_preinit(void)
|
||||
{
|
||||
iop321_init();
|
||||
}
|
||||
|
||||
static struct hw_pci iq31244_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iq31244_setup,
|
||||
.scan = iop321_scan_bus,
|
||||
.preinit = iq31244_preinit,
|
||||
.map_irq = iq31244_map_irq
|
||||
};
|
||||
|
||||
static int __init iq31244_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq31244())
|
||||
pci_common_init(&iq31244_pci);
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq31244_pci_init);
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -1,45 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/mm.c
|
||||
*
|
||||
* Low level memory initialization for iq80321 platform
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
|
||||
/*
|
||||
* IQ80321 specific IO mappings
|
||||
*
|
||||
* We use RedBoot's setup for the onboard devices.
|
||||
*/
|
||||
static struct map_desc iq80321_io_desc[] __initdata = {
|
||||
{ /* on-board devices */
|
||||
.virtual = IQ80321_UART,
|
||||
.pfn = __phys_to_pfn(IQ80321_UART),
|
||||
.length = 0x00100000,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
};
|
||||
|
||||
void __init iq80321_map_io(void)
|
||||
{
|
||||
iop321_map_io();
|
||||
|
||||
iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
|
||||
}
|
||||
|
|
@ -1,123 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iq80321-pci.c
|
||||
*
|
||||
* PCI support for the Intel IQ80321 reference board
|
||||
*
|
||||
* Author: Rory Bolt <rorybolt@pacbell.net>
|
||||
* Copyright (C) 2002 Rory Bolt
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
/*
|
||||
* The following macro is used to lookup irqs in a standard table
|
||||
* format for those systems that do not already have PCI
|
||||
* interrupts properly routed. We assume 1 <= pin <= 4
|
||||
*/
|
||||
#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
|
||||
({ int _ctl_ = -1; \
|
||||
unsigned int _idsel = idsel - minid; \
|
||||
if (_idsel <= maxid) \
|
||||
_ctl_ = pci_irq_table[_idsel][pin-1]; \
|
||||
_ctl_; })
|
||||
|
||||
#define INTA IRQ_IQ80321_INTA
|
||||
#define INTB IRQ_IQ80321_INTB
|
||||
#define INTC IRQ_IQ80321_INTC
|
||||
#define INTD IRQ_IQ80321_INTD
|
||||
|
||||
#define INTE IRQ_IQ80321_I82544
|
||||
|
||||
static inline int __init
|
||||
iq80321_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
||||
{
|
||||
static int pci_irq_table[][4] = {
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
{INTE, INTE, INTE, INTE}, /* Gig-E */
|
||||
{-1, -1, -1, -1}, /* Unused */
|
||||
{INTC, INTD, INTA, INTB}, /* PCI-X Slot */
|
||||
{-1, -1, -1, -1},
|
||||
};
|
||||
|
||||
BUG_ON(pin < 1 || pin > 4);
|
||||
|
||||
// return PCI_IRQ_TABLE_LOOKUP(4, 7);
|
||||
return pci_irq_table[idsel%4][pin-1];
|
||||
}
|
||||
|
||||
static int iq80321_setup(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
struct resource *res;
|
||||
|
||||
if(nr != 0)
|
||||
return 0;
|
||||
|
||||
res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
|
||||
if (!res)
|
||||
panic("PCI: unable to alloc resources");
|
||||
|
||||
res[0].start = IOP321_PCI_LOWER_IO_VA;
|
||||
res[0].end = IOP321_PCI_UPPER_IO_VA;
|
||||
res[0].name = "IQ80321 PCI I/O Space";
|
||||
res[0].flags = IORESOURCE_IO;
|
||||
|
||||
res[1].start = IOP321_PCI_LOWER_MEM_PA;
|
||||
res[1].end = IOP321_PCI_UPPER_MEM_PA;
|
||||
res[1].name = "IQ80321 PCI Memory Space";
|
||||
res[1].flags = IORESOURCE_MEM;
|
||||
|
||||
request_resource(&ioport_resource, &res[0]);
|
||||
request_resource(&iomem_resource, &res[1]);
|
||||
|
||||
sys->mem_offset = IOP321_PCI_MEM_OFFSET;
|
||||
sys->io_offset = IOP321_PCI_IO_OFFSET;
|
||||
|
||||
sys->resource[0] = &res[0];
|
||||
sys->resource[1] = &res[1];
|
||||
sys->resource[2] = NULL;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void iq80321_preinit(void)
|
||||
{
|
||||
iop321_init();
|
||||
}
|
||||
|
||||
static struct hw_pci iq80321_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iq80321_setup,
|
||||
.scan = iop321_scan_bus,
|
||||
.preinit = iq80321_preinit,
|
||||
.map_irq = iq80321_map_irq
|
||||
};
|
||||
|
||||
static int __init iq80321_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq80321())
|
||||
pci_common_init(&iq80321_pci);
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq80321_pci_init);
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/mm.c
|
||||
*
|
||||
* Low level memory initialization for iq80331 platform
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2003 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
|
||||
/*
|
||||
* IQ80331 specific IO mappings
|
||||
*
|
||||
* We use RedBoot's setup for the onboard devices.
|
||||
*/
|
||||
|
||||
void __init iq80331_map_io(void)
|
||||
{
|
||||
iop331_map_io();
|
||||
}
|
||||
|
|
@ -1,119 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iq80331-pci.c
|
||||
*
|
||||
* PCI support for the Intel IQ80331 reference board
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2003, 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
/*
|
||||
* The following macro is used to lookup irqs in a standard table
|
||||
* format for those systems that do not already have PCI
|
||||
* interrupts properly routed. We assume 1 <= pin <= 4
|
||||
*/
|
||||
#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
|
||||
({ int _ctl_ = -1; \
|
||||
unsigned int _idsel = idsel - minid; \
|
||||
if (_idsel <= maxid) \
|
||||
_ctl_ = pci_irq_table[_idsel][pin-1]; \
|
||||
_ctl_; })
|
||||
|
||||
#define INTA IRQ_IQ80331_INTA
|
||||
#define INTB IRQ_IQ80331_INTB
|
||||
#define INTC IRQ_IQ80331_INTC
|
||||
#define INTD IRQ_IQ80331_INTD
|
||||
|
||||
//#define INTE IRQ_IQ80331_I82544
|
||||
|
||||
static inline int __init
|
||||
iq80331_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
||||
{
|
||||
static int pci_irq_table[][4] = {
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
{INTB, INTC, INTD, INTA}, /* PCI-X Slot */
|
||||
{INTC, INTC, INTC, INTC}, /* GigE */
|
||||
};
|
||||
|
||||
BUG_ON(pin < 1 || pin > 4);
|
||||
|
||||
return PCI_IRQ_TABLE_LOOKUP(1, 7);
|
||||
}
|
||||
|
||||
static int iq80331_setup(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
struct resource *res;
|
||||
|
||||
if(nr != 0)
|
||||
return 0;
|
||||
|
||||
res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
|
||||
if (!res)
|
||||
panic("PCI: unable to alloc resources");
|
||||
|
||||
res[0].start = IOP331_PCI_LOWER_IO_VA;
|
||||
res[0].end = IOP331_PCI_UPPER_IO_VA;
|
||||
res[0].name = "IQ80331 PCI I/O Space";
|
||||
res[0].flags = IORESOURCE_IO;
|
||||
|
||||
res[1].start = IOP331_PCI_LOWER_MEM_PA;
|
||||
res[1].end = IOP331_PCI_UPPER_MEM_PA;
|
||||
res[1].name = "IQ80331 PCI Memory Space";
|
||||
res[1].flags = IORESOURCE_MEM;
|
||||
|
||||
request_resource(&ioport_resource, &res[0]);
|
||||
request_resource(&iomem_resource, &res[1]);
|
||||
|
||||
sys->mem_offset = IOP331_PCI_MEM_OFFSET;
|
||||
sys->io_offset = IOP331_PCI_IO_OFFSET;
|
||||
|
||||
sys->resource[0] = &res[0];
|
||||
sys->resource[1] = &res[1];
|
||||
sys->resource[2] = NULL;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void iq80331_preinit(void)
|
||||
{
|
||||
iop331_init();
|
||||
}
|
||||
|
||||
static struct hw_pci iq80331_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iq80331_setup,
|
||||
.scan = iop331_scan_bus,
|
||||
.preinit = iq80331_preinit,
|
||||
.map_irq = iq80331_map_irq
|
||||
};
|
||||
|
||||
static int __init iq80331_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq80331())
|
||||
pci_common_init(&iq80331_pci);
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq80331_pci_init);
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-iop3xx/mm.c
|
||||
*
|
||||
* Low level memory initialization for iq80332 platform
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
|
||||
/*
|
||||
* IQ80332 specific IO mappings
|
||||
*
|
||||
* We use RedBoot's setup for the onboard devices.
|
||||
*/
|
||||
|
||||
void __init iq80332_map_io(void)
|
||||
{
|
||||
iop331_map_io();
|
||||
}
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-iop3xx/iq80332-pci.c
|
||||
*
|
||||
* PCI support for the Intel IQ80332 reference board
|
||||
*
|
||||
* Author: Dave Jiang <dave.jiang@intel.com>
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
/*
|
||||
* The following macro is used to lookup irqs in a standard table
|
||||
* format for those systems that do not already have PCI
|
||||
* interrupts properly routed. We assume 1 <= pin <= 4
|
||||
*/
|
||||
#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
|
||||
({ int _ctl_ = -1; \
|
||||
unsigned int _idsel = idsel - minid; \
|
||||
if (_idsel <= maxid) \
|
||||
_ctl_ = pci_irq_table[_idsel][pin-1]; \
|
||||
_ctl_; })
|
||||
|
||||
#define INTA IRQ_IQ80332_INTA
|
||||
#define INTB IRQ_IQ80332_INTB
|
||||
#define INTC IRQ_IQ80332_INTC
|
||||
#define INTD IRQ_IQ80332_INTD
|
||||
|
||||
//#define INTE IRQ_IQ80332_I82544
|
||||
|
||||
static inline int __init
|
||||
iq80332_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
||||
{
|
||||
static int pci_irq_table[][8] = {
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
{-1, -1, -1, -1},
|
||||
{-1, -1, -1, -1},
|
||||
{-1, -1, -1, -1},
|
||||
{INTA, INTB, INTC, INTD}, /* PCI-X Slot */
|
||||
{-1, -1, -1, -1},
|
||||
{INTC, INTC, INTC, INTC}, /* GigE */
|
||||
{-1, -1, -1, -1},
|
||||
{-1, -1, -1, -1},
|
||||
};
|
||||
|
||||
BUG_ON(pin < 1 || pin > 4);
|
||||
|
||||
return PCI_IRQ_TABLE_LOOKUP(1, 7);
|
||||
}
|
||||
|
||||
static int iq80332_setup(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
struct resource *res;
|
||||
|
||||
if(nr != 0)
|
||||
return 0;
|
||||
|
||||
res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
|
||||
if (!res)
|
||||
panic("PCI: unable to alloc resources");
|
||||
|
||||
res[0].start = IOP331_PCI_LOWER_IO_VA;
|
||||
res[0].end = IOP331_PCI_UPPER_IO_VA;
|
||||
res[0].name = "IQ80332 PCI I/O Space";
|
||||
res[0].flags = IORESOURCE_IO;
|
||||
|
||||
res[1].start = IOP331_PCI_LOWER_MEM_PA;
|
||||
res[1].end = IOP331_PCI_UPPER_MEM_PA;
|
||||
res[1].name = "IQ80332 PCI Memory Space";
|
||||
res[1].flags = IORESOURCE_MEM;
|
||||
|
||||
request_resource(&ioport_resource, &res[0]);
|
||||
request_resource(&iomem_resource, &res[1]);
|
||||
|
||||
sys->mem_offset = IOP331_PCI_MEM_OFFSET;
|
||||
sys->io_offset = IOP331_PCI_IO_OFFSET;
|
||||
|
||||
sys->resource[0] = &res[0];
|
||||
sys->resource[1] = &res[1];
|
||||
sys->resource[2] = NULL;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void iq80332_preinit(void)
|
||||
{
|
||||
iop331_init();
|
||||
}
|
||||
|
||||
static struct hw_pci iq80332_pci __initdata = {
|
||||
.swizzle = pci_std_swizzle,
|
||||
.nr_controllers = 1,
|
||||
.setup = iq80332_setup,
|
||||
.scan = iop331_scan_bus,
|
||||
.preinit = iq80332_preinit,
|
||||
.map_irq = iq80332_map_irq
|
||||
};
|
||||
|
||||
static int __init iq80332_pci_init(void)
|
||||
{
|
||||
if (machine_is_iq80332())
|
||||
pci_common_init(&iq80332_pci);
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(iq80332_pci_init);
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/bitops.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/timex.h>
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
|
@ -255,16 +256,6 @@ static unsigned volatile last_jiffy_time;
|
|||
|
||||
#define CLOCK_TICKS_PER_USEC ((CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
|
||||
|
||||
/* IRQs are disabled before entering here from do_gettimeofday() */
|
||||
static unsigned long ixp4xx_gettimeoffset(void)
|
||||
{
|
||||
u32 elapsed;
|
||||
|
||||
elapsed = *IXP4XX_OSTS - last_jiffy_time;
|
||||
|
||||
return elapsed / CLOCK_TICKS_PER_USEC;
|
||||
}
|
||||
|
||||
static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
write_seqlock(&xtime_lock);
|
||||
|
|
@ -309,7 +300,6 @@ static void __init ixp4xx_timer_init(void)
|
|||
|
||||
struct sys_timer ixp4xx_timer = {
|
||||
.init = ixp4xx_timer_init,
|
||||
.offset = ixp4xx_gettimeoffset,
|
||||
};
|
||||
|
||||
static struct resource ixp46x_i2c_resources[] = {
|
||||
|
|
@ -365,3 +355,29 @@ void __init ixp4xx_sys_init(void)
|
|||
ixp4xx_exp_bus_size >> 20);
|
||||
}
|
||||
|
||||
cycle_t ixp4xx_get_cycles(void)
|
||||
{
|
||||
return *IXP4XX_OSTS;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_ixp4xx = {
|
||||
.name = "OSTS",
|
||||
.rating = 200,
|
||||
.read = ixp4xx_get_cycles,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 20,
|
||||
.is_continuous = 1,
|
||||
};
|
||||
|
||||
unsigned long ixp4xx_timer_freq = FREQ;
|
||||
static int __init ixp4xx_clocksource_init(void)
|
||||
{
|
||||
clocksource_ixp4xx.mult =
|
||||
clocksource_hz2mult(ixp4xx_timer_freq,
|
||||
clocksource_ixp4xx.shift);
|
||||
clocksource_register(&clocksource_ixp4xx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
device_initcall(ixp4xx_clocksource_init);
|
||||
|
|
|
|||
|
|
@ -159,6 +159,8 @@ static void nslu2_power_off(void)
|
|||
|
||||
static void __init nslu2_init(void)
|
||||
{
|
||||
ixp4xx_timer_freq = NSLU2_FREQ;
|
||||
|
||||
ixp4xx_sys_init();
|
||||
|
||||
nslu2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/clk.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/arch/cpu.h>
|
||||
#include <asm/arch/usb.h>
|
||||
|
|
@ -586,77 +587,53 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
|
|||
*-------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_OMAP_RESET_CLOCKS
|
||||
/*
|
||||
* Resets some clocks that may be left on from bootloader,
|
||||
* but leaves serial clocks on. See also omap_late_clk_reset().
|
||||
*/
|
||||
static inline void omap1_early_clk_reset(void)
|
||||
{
|
||||
//omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
|
||||
}
|
||||
|
||||
static int __init omap1_late_clk_reset(void)
|
||||
static void __init omap1_clk_disable_unused(struct clk *clk)
|
||||
{
|
||||
/* Turn off all unused clocks */
|
||||
struct clk *p;
|
||||
__u32 regval32;
|
||||
|
||||
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
|
||||
regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
|
||||
omap_writew(regval32, SOFT_REQ_REG);
|
||||
omap_writew(0, SOFT_REQ_REG2);
|
||||
|
||||
list_for_each_entry(p, &clocks, node) {
|
||||
if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
|
||||
p->enable_reg == 0)
|
||||
continue;
|
||||
|
||||
/* Clocks in the DSP domain need api_ck. Just assume bootloader
|
||||
* has not enabled any DSP clocks */
|
||||
if ((u32)p->enable_reg == DSP_IDLECT2) {
|
||||
printk(KERN_INFO "Skipping reset check for DSP domain "
|
||||
"clock \"%s\"\n", p->name);
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Is the clock already disabled? */
|
||||
if (p->flags & ENABLE_REG_32BIT) {
|
||||
if (p->flags & VIRTUAL_IO_ADDRESS)
|
||||
regval32 = __raw_readl(p->enable_reg);
|
||||
else
|
||||
regval32 = omap_readl(p->enable_reg);
|
||||
} else {
|
||||
if (p->flags & VIRTUAL_IO_ADDRESS)
|
||||
regval32 = __raw_readw(p->enable_reg);
|
||||
else
|
||||
regval32 = omap_readw(p->enable_reg);
|
||||
}
|
||||
|
||||
if ((regval32 & (1 << p->enable_bit)) == 0)
|
||||
continue;
|
||||
|
||||
/* FIXME: This clock seems to be necessary but no-one
|
||||
* has asked for its activation. */
|
||||
if (p == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
|
||||
|| p == &ck_dpll1out.clk // FIX: SoSSI, SSR
|
||||
|| p == &arm_gpio_ck // FIX: GPIO code for 1510
|
||||
) {
|
||||
printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
|
||||
p->name);
|
||||
continue;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
|
||||
p->disable(p);
|
||||
printk(" done\n");
|
||||
/* Clocks in the DSP domain need api_ck. Just assume bootloader
|
||||
* has not enabled any DSP clocks */
|
||||
if ((u32)clk->enable_reg == DSP_IDLECT2) {
|
||||
printk(KERN_INFO "Skipping reset check for DSP domain "
|
||||
"clock \"%s\"\n", clk->name);
|
||||
return;
|
||||
}
|
||||
|
||||
return 0;
|
||||
/* Is the clock already disabled? */
|
||||
if (clk->flags & ENABLE_REG_32BIT) {
|
||||
if (clk->flags & VIRTUAL_IO_ADDRESS)
|
||||
regval32 = __raw_readl(clk->enable_reg);
|
||||
else
|
||||
regval32 = omap_readl(clk->enable_reg);
|
||||
} else {
|
||||
if (clk->flags & VIRTUAL_IO_ADDRESS)
|
||||
regval32 = __raw_readw(clk->enable_reg);
|
||||
else
|
||||
regval32 = omap_readw(clk->enable_reg);
|
||||
}
|
||||
|
||||
if ((regval32 & (1 << clk->enable_bit)) == 0)
|
||||
return;
|
||||
|
||||
/* FIXME: This clock seems to be necessary but no-one
|
||||
* has asked for its activation. */
|
||||
if (clk == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
|
||||
|| clk == &ck_dpll1out.clk // FIX: SoSSI, SSR
|
||||
|| clk == &arm_gpio_ck // FIX: GPIO code for 1510
|
||||
) {
|
||||
printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
|
||||
clk->name);
|
||||
return;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
|
||||
clk->disable(clk);
|
||||
printk(" done\n");
|
||||
}
|
||||
late_initcall(omap1_late_clk_reset);
|
||||
|
||||
#else
|
||||
#define omap1_early_clk_reset() {}
|
||||
#define omap1_clk_disable_unused NULL
|
||||
#endif
|
||||
|
||||
static struct clk_functions omap1_clk_functions = {
|
||||
|
|
@ -664,6 +641,7 @@ static struct clk_functions omap1_clk_functions = {
|
|||
.clk_disable = omap1_clk_disable,
|
||||
.clk_round_rate = omap1_clk_round_rate,
|
||||
.clk_set_rate = omap1_clk_set_rate,
|
||||
.clk_disable_unused = omap1_clk_disable_unused,
|
||||
};
|
||||
|
||||
int __init omap1_clk_init(void)
|
||||
|
|
@ -671,8 +649,13 @@ int __init omap1_clk_init(void)
|
|||
struct clk ** clkp;
|
||||
const struct omap_clock_config *info;
|
||||
int crystal_type = 0; /* Default 12 MHz */
|
||||
u32 reg;
|
||||
|
||||
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
|
||||
reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
|
||||
omap_writew(reg, SOFT_REQ_REG);
|
||||
omap_writew(0, SOFT_REQ_REG2);
|
||||
|
||||
omap1_early_clk_reset();
|
||||
clk_init(&omap1_clk_functions);
|
||||
|
||||
/* By default all idlect1 clocks are allowed to idle */
|
||||
|
|
@ -772,6 +755,12 @@ int __init omap1_clk_init(void)
|
|||
omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
|
||||
#endif
|
||||
|
||||
/* Amstrad Delta wants BCLK high when inactive */
|
||||
if (machine_is_ams_delta())
|
||||
omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
|
||||
(1 << SDW_MCLK_INV_BIT),
|
||||
ULPD_CLOCK_CTRL);
|
||||
|
||||
/* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
|
||||
/* (on 730, bit 13 must not be cleared) */
|
||||
if (cpu_is_omap730())
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ struct arm_idlect1_clk {
|
|||
#define EN_DSPTIMCK 5
|
||||
|
||||
/* Various register defines for clock controls scattered around OMAP chip */
|
||||
#define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */
|
||||
#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
|
||||
#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
|
||||
#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
|
||||
|
|
@ -741,6 +742,18 @@ static struct clk i2c_fck = {
|
|||
.disable = &omap1_clk_disable_generic,
|
||||
};
|
||||
|
||||
static struct clk i2c_ick = {
|
||||
.name = "i2c_ick",
|
||||
.id = 1,
|
||||
.flags = CLOCK_IN_OMAP16XX |
|
||||
VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT |
|
||||
ALWAYS_ENABLED,
|
||||
.parent = &armper_ck.clk,
|
||||
.recalc = &followparent_recalc,
|
||||
.enable = &omap1_clk_enable_generic,
|
||||
.disable = &omap1_clk_disable_generic,
|
||||
};
|
||||
|
||||
static struct clk * onchip_clks[] = {
|
||||
/* non-ULPD clocks */
|
||||
&ck_ref,
|
||||
|
|
@ -790,6 +803,7 @@ static struct clk * onchip_clks[] = {
|
|||
/* Virtual clocks */
|
||||
&virtual_ck_mpu,
|
||||
&i2c_fck,
|
||||
&i2c_ick,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -199,6 +199,17 @@ MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1)
|
|||
MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1)
|
||||
MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, 1, 14, 0, NA, 0, 1)
|
||||
|
||||
/* OMAP-1610 SPI */
|
||||
MUX_CFG("U19_1610_SPIF_SCK", 7, 21, 6, 1, 15, 0, 1, 1, 1)
|
||||
MUX_CFG("U18_1610_SPIF_DIN", 8, 0, 6, 1, 18, 1, 1, 0, 1)
|
||||
MUX_CFG("P20_1610_SPIF_DIN", 6, 27, 4, 1, 7, 1, 1, 0, 1)
|
||||
MUX_CFG("W21_1610_SPIF_DOUT", 8, 3, 6, 1, 19, 0, 1, 0, 1)
|
||||
MUX_CFG("R18_1610_SPIF_DOUT", 7, 9, 3, 1, 11, 0, 1, 0, 1)
|
||||
MUX_CFG("N14_1610_SPIF_CS0", 8, 9, 6, 1, 21, 0, 1, 1, 1)
|
||||
MUX_CFG("N15_1610_SPIF_CS1", 7, 18, 6, 1, 14, 0, 1, 1, 1)
|
||||
MUX_CFG("T19_1610_SPIF_CS2", 7, 15, 4, 1, 13, 0, 1, 1, 1)
|
||||
MUX_CFG("P15_1610_SPIF_CS3", 8, 12, 3, 1, 22, 0, 1, 1, 1)
|
||||
|
||||
/* OMAP-1610 Flash */
|
||||
MUX_CFG("L3_1610_FLASH_CS2B_OE",10, 6, 1, NA, 0, 0, NA, 0, 1)
|
||||
MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1)
|
||||
|
|
|
|||
|
|
@ -166,8 +166,8 @@ static struct omap_uart_config apollon_uart_config __initdata = {
|
|||
|
||||
static struct omap_mmc_config apollon_mmc_config __initdata = {
|
||||
.mmc [0] = {
|
||||
.enabled = 0,
|
||||
.wire4 = 0,
|
||||
.enabled = 1,
|
||||
.wire4 = 1,
|
||||
.wp_pin = -1,
|
||||
.power_pin = -1,
|
||||
.switch_pin = -1,
|
||||
|
|
@ -257,6 +257,9 @@ static void __init omap_apollon_init(void)
|
|||
/* REVISIT: where's the correct place */
|
||||
omap_cfg_reg(W19_24XX_SYS_NIRQ);
|
||||
|
||||
/* Use Interal loop-back in MMC/SDIO Module Input Clock selection */
|
||||
CONTROL_DEVCONF |= (1 << 24);
|
||||
|
||||
/*
|
||||
* Make sure the serial ports are muxed on at this point.
|
||||
* You have to mux them off in device drivers later on
|
||||
|
|
|
|||
|
|
@ -32,10 +32,14 @@
|
|||
#include "memory.h"
|
||||
#include "clock.h"
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
//#define DOWN_VARIABLE_DPLL 1 /* Experimental */
|
||||
|
||||
static struct prcm_config *curr_prcm_set;
|
||||
static u32 curr_perf_level = PRCM_FULL_SPEED;
|
||||
static struct clk *vclk;
|
||||
static struct clk *sclk;
|
||||
|
||||
/*-------------------------------------------------------------------------
|
||||
* Omap2 specific clock functions
|
||||
|
|
@ -79,6 +83,14 @@ static void omap2_propagate_rate(struct clk * clk)
|
|||
propagate_rate(clk);
|
||||
}
|
||||
|
||||
static void omap2_set_osc_ck(int enable)
|
||||
{
|
||||
if (enable)
|
||||
PRCM_CLKSRC_CTRL &= ~(0x3 << 3);
|
||||
else
|
||||
PRCM_CLKSRC_CTRL |= 0x3 << 3;
|
||||
}
|
||||
|
||||
/* Enable an APLL if off */
|
||||
static void omap2_clk_fixed_enable(struct clk *clk)
|
||||
{
|
||||
|
|
@ -101,14 +113,56 @@ static void omap2_clk_fixed_enable(struct clk *clk)
|
|||
else if (clk == &apll54_ck)
|
||||
cval = (1 << 6);
|
||||
|
||||
while (!CM_IDLEST_CKGEN & cval) { /* Wait for lock */
|
||||
while (!(CM_IDLEST_CKGEN & cval)) { /* Wait for lock */
|
||||
++i;
|
||||
udelay(1);
|
||||
if (i == 100000)
|
||||
if (i == 100000) {
|
||||
printk(KERN_ERR "Clock %s didn't lock\n", clk->name);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void omap2_clk_wait_ready(struct clk *clk)
|
||||
{
|
||||
unsigned long reg, other_reg, st_reg;
|
||||
u32 bit;
|
||||
int i;
|
||||
|
||||
reg = (unsigned long) clk->enable_reg;
|
||||
if (reg == (unsigned long) &CM_FCLKEN1_CORE ||
|
||||
reg == (unsigned long) &CM_FCLKEN2_CORE)
|
||||
other_reg = (reg & ~0xf0) | 0x10;
|
||||
else if (reg == (unsigned long) &CM_ICLKEN1_CORE ||
|
||||
reg == (unsigned long) &CM_ICLKEN2_CORE)
|
||||
other_reg = (reg & ~0xf0) | 0x00;
|
||||
else
|
||||
return;
|
||||
|
||||
/* No check for DSS or cam clocks */
|
||||
if ((reg & 0x0f) == 0) {
|
||||
if (clk->enable_bit <= 1 || clk->enable_bit == 31)
|
||||
return;
|
||||
}
|
||||
|
||||
/* Check if both functional and interface clocks
|
||||
* are running. */
|
||||
bit = 1 << clk->enable_bit;
|
||||
if (!(__raw_readl(other_reg) & bit))
|
||||
return;
|
||||
st_reg = (other_reg & ~0xf0) | 0x20;
|
||||
i = 0;
|
||||
while (!(__raw_readl(st_reg) & bit)) {
|
||||
i++;
|
||||
if (i == 100000) {
|
||||
printk(KERN_ERR "Timeout enabling clock %s\n", clk->name);
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i)
|
||||
pr_debug("Clock %s stable after %d loops\n", clk->name, i);
|
||||
}
|
||||
|
||||
/* Enables clock without considering parent dependencies or use count
|
||||
* REVISIT: Maybe change this to use clk->enable like on omap1?
|
||||
*/
|
||||
|
|
@ -119,6 +173,11 @@ static int _omap2_clk_enable(struct clk * clk)
|
|||
if (clk->flags & ALWAYS_ENABLED)
|
||||
return 0;
|
||||
|
||||
if (unlikely(clk == &osc_ck)) {
|
||||
omap2_set_osc_ck(1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (unlikely(clk->enable_reg == 0)) {
|
||||
printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
|
||||
clk->name);
|
||||
|
|
@ -133,6 +192,9 @@ static int _omap2_clk_enable(struct clk * clk)
|
|||
regval32 = __raw_readl(clk->enable_reg);
|
||||
regval32 |= (1 << clk->enable_bit);
|
||||
__raw_writel(regval32, clk->enable_reg);
|
||||
wmb();
|
||||
|
||||
omap2_clk_wait_ready(clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -155,6 +217,11 @@ static void _omap2_clk_disable(struct clk *clk)
|
|||
{
|
||||
u32 regval32;
|
||||
|
||||
if (unlikely(clk == &osc_ck)) {
|
||||
omap2_set_osc_ck(0);
|
||||
return;
|
||||
}
|
||||
|
||||
if (clk->enable_reg == 0)
|
||||
return;
|
||||
|
||||
|
|
@ -166,6 +233,7 @@ static void _omap2_clk_disable(struct clk *clk)
|
|||
regval32 = __raw_readl(clk->enable_reg);
|
||||
regval32 &= ~(1 << clk->enable_bit);
|
||||
__raw_writel(regval32, clk->enable_reg);
|
||||
wmb();
|
||||
}
|
||||
|
||||
static int omap2_clk_enable(struct clk *clk)
|
||||
|
|
@ -695,12 +763,14 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
|
|||
reg_val = __raw_readl(reg);
|
||||
reg_val &= ~(field_mask << div_off);
|
||||
reg_val |= (field_val << div_off);
|
||||
|
||||
__raw_writel(reg_val, reg);
|
||||
wmb();
|
||||
clk->rate = clk->parent->rate / field_val;
|
||||
|
||||
if (clk->flags & DELAYED_APP)
|
||||
if (clk->flags & DELAYED_APP) {
|
||||
__raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL);
|
||||
wmb();
|
||||
}
|
||||
ret = 0;
|
||||
} else if (clk->set_rate != 0)
|
||||
ret = clk->set_rate(clk, rate);
|
||||
|
|
@ -836,10 +906,12 @@ static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
|
|||
reg_val = __raw_readl(reg) & ~(field_mask << src_off);
|
||||
reg_val |= (field_val << src_off);
|
||||
__raw_writel(reg_val, reg);
|
||||
wmb();
|
||||
|
||||
if (clk->flags & DELAYED_APP)
|
||||
if (clk->flags & DELAYED_APP) {
|
||||
__raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL);
|
||||
|
||||
wmb();
|
||||
}
|
||||
if (clk->usecount > 0)
|
||||
_omap2_clk_enable(clk);
|
||||
|
||||
|
|
@ -953,12 +1025,29 @@ static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
|
|||
* Omap2 clock reset and init functions
|
||||
*-------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_OMAP_RESET_CLOCKS
|
||||
static void __init omap2_clk_disable_unused(struct clk *clk)
|
||||
{
|
||||
u32 regval32;
|
||||
|
||||
regval32 = __raw_readl(clk->enable_reg);
|
||||
if ((regval32 & (1 << clk->enable_bit)) == 0)
|
||||
return;
|
||||
|
||||
printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name);
|
||||
_omap2_clk_disable(clk);
|
||||
}
|
||||
#else
|
||||
#define omap2_clk_disable_unused NULL
|
||||
#endif
|
||||
|
||||
static struct clk_functions omap2_clk_functions = {
|
||||
.clk_enable = omap2_clk_enable,
|
||||
.clk_disable = omap2_clk_disable,
|
||||
.clk_round_rate = omap2_clk_round_rate,
|
||||
.clk_set_rate = omap2_clk_set_rate,
|
||||
.clk_set_parent = omap2_clk_set_parent,
|
||||
.clk_disable_unused = omap2_clk_disable_unused,
|
||||
};
|
||||
|
||||
static void __init omap2_get_crystal_rate(struct clk *osc, struct clk *sys)
|
||||
|
|
@ -984,27 +1073,19 @@ static void __init omap2_get_crystal_rate(struct clk *osc, struct clk *sys)
|
|||
sys->rate = sclk;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_RESET_CLOCKS
|
||||
static void __init omap2_disable_unused_clocks(void)
|
||||
/*
|
||||
* Set clocks for bypass mode for reboot to work.
|
||||
*/
|
||||
void omap2_clk_prepare_for_reboot(void)
|
||||
{
|
||||
struct clk *ck;
|
||||
u32 regval32;
|
||||
u32 rate;
|
||||
|
||||
list_for_each_entry(ck, &clocks, node) {
|
||||
if (ck->usecount > 0 || (ck->flags & ALWAYS_ENABLED) ||
|
||||
ck->enable_reg == 0)
|
||||
continue;
|
||||
if (vclk == NULL || sclk == NULL)
|
||||
return;
|
||||
|
||||
regval32 = __raw_readl(ck->enable_reg);
|
||||
if ((regval32 & (1 << ck->enable_bit)) == 0)
|
||||
continue;
|
||||
|
||||
printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name);
|
||||
_omap2_clk_disable(ck);
|
||||
}
|
||||
rate = clk_get_rate(sclk);
|
||||
clk_set_rate(vclk, rate);
|
||||
}
|
||||
late_initcall(omap2_disable_unused_clocks);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Switch the MPU rate if specified on cmdline.
|
||||
|
|
@ -1077,8 +1158,27 @@ int __init omap2_clk_init(void)
|
|||
*/
|
||||
clk_enable(&sync_32k_ick);
|
||||
clk_enable(&omapctrl_ick);
|
||||
|
||||
/* Force the APLLs active during bootup to avoid disabling and
|
||||
* enabling them unnecessarily. */
|
||||
clk_enable(&apll96_ck);
|
||||
clk_enable(&apll54_ck);
|
||||
|
||||
if (cpu_is_omap2430())
|
||||
clk_enable(&sdrc_ick);
|
||||
|
||||
/* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
|
||||
vclk = clk_get(NULL, "virt_prcm_set");
|
||||
sclk = clk_get(NULL, "sys_ck");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init omap2_disable_aplls(void)
|
||||
{
|
||||
clk_disable(&apll96_ck);
|
||||
clk_disable(&apll54_ck);
|
||||
|
||||
return 0;
|
||||
}
|
||||
late_initcall(omap2_disable_aplls);
|
||||
|
|
|
|||
|
|
@ -560,7 +560,7 @@ static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
|
|||
.name = "osc_ck",
|
||||
.rate = 26000000, /* fixed up in clock init */
|
||||
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
|
||||
RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
|
||||
RATE_FIXED | RATE_PROPAGATES,
|
||||
};
|
||||
|
||||
/* With out modem likely 12MHz, with modem likely 13MHz */
|
||||
|
|
@ -1368,7 +1368,8 @@ static struct clk mcbsp5_fck = {
|
|||
};
|
||||
|
||||
static struct clk mcspi1_ick = {
|
||||
.name = "mcspi1_ick",
|
||||
.name = "mcspi_ick",
|
||||
.id = 1,
|
||||
.parent = &l4_ck,
|
||||
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
|
||||
.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
|
||||
|
|
@ -1377,7 +1378,8 @@ static struct clk mcspi1_ick = {
|
|||
};
|
||||
|
||||
static struct clk mcspi1_fck = {
|
||||
.name = "mcspi1_fck",
|
||||
.name = "mcspi_fck",
|
||||
.id = 1,
|
||||
.parent = &func_48m_ck,
|
||||
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
|
||||
.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
|
||||
|
|
@ -1386,7 +1388,8 @@ static struct clk mcspi1_fck = {
|
|||
};
|
||||
|
||||
static struct clk mcspi2_ick = {
|
||||
.name = "mcspi2_ick",
|
||||
.name = "mcspi_ick",
|
||||
.id = 2,
|
||||
.parent = &l4_ck,
|
||||
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
|
||||
.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
|
||||
|
|
@ -1395,7 +1398,8 @@ static struct clk mcspi2_ick = {
|
|||
};
|
||||
|
||||
static struct clk mcspi2_fck = {
|
||||
.name = "mcspi2_fck",
|
||||
.name = "mcspi_fck",
|
||||
.id = 2,
|
||||
.parent = &func_48m_ck,
|
||||
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
|
||||
.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
|
||||
|
|
@ -1404,7 +1408,8 @@ static struct clk mcspi2_fck = {
|
|||
};
|
||||
|
||||
static struct clk mcspi3_ick = {
|
||||
.name = "mcspi3_ick",
|
||||
.name = "mcspi_ick",
|
||||
.id = 3,
|
||||
.parent = &l4_ck,
|
||||
.flags = CLOCK_IN_OMAP243X,
|
||||
.enable_reg = (void __iomem *)&CM_ICLKEN2_CORE,
|
||||
|
|
@ -1413,7 +1418,8 @@ static struct clk mcspi3_ick = {
|
|||
};
|
||||
|
||||
static struct clk mcspi3_fck = {
|
||||
.name = "mcspi3_fck",
|
||||
.name = "mcspi_fck",
|
||||
.id = 3,
|
||||
.parent = &func_48m_ck,
|
||||
.flags = CLOCK_IN_OMAP243X,
|
||||
.enable_reg = (void __iomem *)&CM_FCLKEN2_CORE,
|
||||
|
|
|
|||
|
|
@ -13,6 +13,8 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/gpmc.h>
|
||||
|
|
@ -41,6 +43,19 @@
|
|||
#define GPMC_CS0 0x60
|
||||
#define GPMC_CS_SIZE 0x30
|
||||
|
||||
#define GPMC_CS_NUM 8
|
||||
#define GPMC_MEM_START 0x00000000
|
||||
#define GPMC_MEM_END 0x3FFFFFFF
|
||||
#define BOOT_ROM_SPACE 0x100000 /* 1MB */
|
||||
|
||||
#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
|
||||
#define GPMC_SECTION_SHIFT 28 /* 128 MB */
|
||||
|
||||
static struct resource gpmc_mem_root;
|
||||
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
|
||||
static spinlock_t gpmc_mem_lock = SPIN_LOCK_UNLOCKED;
|
||||
static unsigned gpmc_cs_map;
|
||||
|
||||
static void __iomem *gpmc_base =
|
||||
(void __iomem *) IO_ADDRESS(GPMC_BASE);
|
||||
static void __iomem *gpmc_cs_base =
|
||||
|
|
@ -187,9 +202,168 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
|
|||
return 0;
|
||||
}
|
||||
|
||||
unsigned long gpmc_cs_get_base_addr(int cs)
|
||||
static void gpmc_cs_enable_mem(int cs, u32 base, u32 size)
|
||||
{
|
||||
return (gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7) & 0x1f) << 24;
|
||||
u32 l;
|
||||
u32 mask;
|
||||
|
||||
mask = (1 << GPMC_SECTION_SHIFT) - size;
|
||||
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
|
||||
l &= ~0x3f;
|
||||
l = (base >> GPMC_CHUNK_SHIFT) & 0x3f;
|
||||
l &= ~(0x0f << 8);
|
||||
l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8;
|
||||
l |= 1 << 6; /* CSVALID */
|
||||
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
|
||||
}
|
||||
|
||||
static void gpmc_cs_disable_mem(int cs)
|
||||
{
|
||||
u32 l;
|
||||
|
||||
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
|
||||
l &= ~(1 << 6); /* CSVALID */
|
||||
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
|
||||
}
|
||||
|
||||
static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size)
|
||||
{
|
||||
u32 l;
|
||||
u32 mask;
|
||||
|
||||
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
|
||||
*base = (l & 0x3f) << GPMC_CHUNK_SHIFT;
|
||||
mask = (l >> 8) & 0x0f;
|
||||
*size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT);
|
||||
}
|
||||
|
||||
static int gpmc_cs_mem_enabled(int cs)
|
||||
{
|
||||
u32 l;
|
||||
|
||||
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
|
||||
return l & (1 << 6);
|
||||
}
|
||||
|
||||
static void gpmc_cs_set_reserved(int cs, int reserved)
|
||||
{
|
||||
gpmc_cs_map &= ~(1 << cs);
|
||||
gpmc_cs_map |= (reserved ? 1 : 0) << cs;
|
||||
}
|
||||
|
||||
static int gpmc_cs_reserved(int cs)
|
||||
{
|
||||
return gpmc_cs_map & (1 << cs);
|
||||
}
|
||||
|
||||
static unsigned long gpmc_mem_align(unsigned long size)
|
||||
{
|
||||
int order;
|
||||
|
||||
size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1);
|
||||
order = GPMC_CHUNK_SHIFT - 1;
|
||||
do {
|
||||
size >>= 1;
|
||||
order++;
|
||||
} while (size);
|
||||
size = 1 << order;
|
||||
return size;
|
||||
}
|
||||
|
||||
static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size)
|
||||
{
|
||||
struct resource *res = &gpmc_cs_mem[cs];
|
||||
int r;
|
||||
|
||||
size = gpmc_mem_align(size);
|
||||
spin_lock(&gpmc_mem_lock);
|
||||
res->start = base;
|
||||
res->end = base + size - 1;
|
||||
r = request_resource(&gpmc_mem_root, res);
|
||||
spin_unlock(&gpmc_mem_lock);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
|
||||
{
|
||||
struct resource *res = &gpmc_cs_mem[cs];
|
||||
int r = -1;
|
||||
|
||||
if (cs > GPMC_CS_NUM)
|
||||
return -ENODEV;
|
||||
|
||||
size = gpmc_mem_align(size);
|
||||
if (size > (1 << GPMC_SECTION_SHIFT))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock(&gpmc_mem_lock);
|
||||
if (gpmc_cs_reserved(cs)) {
|
||||
r = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
if (gpmc_cs_mem_enabled(cs))
|
||||
r = adjust_resource(res, res->start & ~(size - 1), size);
|
||||
if (r < 0)
|
||||
r = allocate_resource(&gpmc_mem_root, res, size, 0, ~0,
|
||||
size, NULL, NULL);
|
||||
if (r < 0)
|
||||
goto out;
|
||||
|
||||
gpmc_cs_enable_mem(cs, res->start, res->end - res->start + 1);
|
||||
*base = res->start;
|
||||
gpmc_cs_set_reserved(cs, 1);
|
||||
out:
|
||||
spin_unlock(&gpmc_mem_lock);
|
||||
return r;
|
||||
}
|
||||
|
||||
void gpmc_cs_free(int cs)
|
||||
{
|
||||
spin_lock(&gpmc_mem_lock);
|
||||
if (cs >= GPMC_CS_NUM || !gpmc_cs_reserved(cs)) {
|
||||
printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs);
|
||||
BUG();
|
||||
spin_unlock(&gpmc_mem_lock);
|
||||
return;
|
||||
}
|
||||
gpmc_cs_disable_mem(cs);
|
||||
release_resource(&gpmc_cs_mem[cs]);
|
||||
gpmc_cs_set_reserved(cs, 0);
|
||||
spin_unlock(&gpmc_mem_lock);
|
||||
}
|
||||
|
||||
void __init gpmc_mem_init(void)
|
||||
{
|
||||
int cs;
|
||||
unsigned long boot_rom_space = 0;
|
||||
|
||||
if (cpu_is_omap242x()) {
|
||||
u32 l;
|
||||
l = omap_readl(OMAP242X_CONTROL_STATUS);
|
||||
/* In case of internal boot the 1st MB is redirected to the
|
||||
* boot ROM memory space.
|
||||
*/
|
||||
if (l & (1 << 3))
|
||||
boot_rom_space = BOOT_ROM_SPACE;
|
||||
} else
|
||||
/* We assume internal boot if the mode can't be
|
||||
* determined.
|
||||
*/
|
||||
boot_rom_space = BOOT_ROM_SPACE;
|
||||
gpmc_mem_root.start = GPMC_MEM_START + boot_rom_space;
|
||||
gpmc_mem_root.end = GPMC_MEM_END;
|
||||
|
||||
/* Reserve all regions that has been set up by bootloader */
|
||||
for (cs = 0; cs < GPMC_CS_NUM; cs++) {
|
||||
u32 base, size;
|
||||
|
||||
if (!gpmc_cs_mem_enabled(cs))
|
||||
continue;
|
||||
gpmc_cs_get_memconf(cs, &base, &size);
|
||||
if (gpmc_cs_insert_mem(cs, base, size) < 0)
|
||||
BUG();
|
||||
}
|
||||
}
|
||||
|
||||
void __init gpmc_init(void)
|
||||
|
|
@ -206,4 +380,6 @@ void __init gpmc_init(void)
|
|||
l &= 0x03 << 3;
|
||||
l |= (0x02 << 3) | (1 << 0);
|
||||
gpmc_write_reg(GPMC_SYSCONFIG, l);
|
||||
|
||||
gpmc_mem_init();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,18 +41,6 @@ static struct omap_irq_bank {
|
|||
.nr_irqs = 96,
|
||||
}, {
|
||||
/* XXX: DSP INTC */
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* Commented out for now until we fix the IVA clocking
|
||||
*/
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
}, {
|
||||
/* IVA INTC (2420 only) */
|
||||
.base_reg = OMAP24XX_IVA_INTC_BASE,
|
||||
.nr_irqs = 16, /* Actually 32, but only 16 are used */
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -104,6 +104,20 @@ MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
|
|||
MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
|
||||
|
||||
/* MMC/SDIO */
|
||||
MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
|
||||
MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
|
||||
|
||||
/* Keypad GPIO*/
|
||||
MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
|
||||
MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
|
||||
|
|
|
|||
|
|
@ -19,6 +19,8 @@
|
|||
|
||||
#include "prcm-regs.h"
|
||||
|
||||
extern void omap2_clk_prepare_for_reboot(void);
|
||||
|
||||
u32 omap_prcm_get_reset_sources(void)
|
||||
{
|
||||
return RM_RSTST_WKUP & 0x7f;
|
||||
|
|
@ -28,12 +30,6 @@ EXPORT_SYMBOL(omap_prcm_get_reset_sources);
|
|||
/* Resets clock rates and reboots the system. Only called from system.h */
|
||||
void omap_prcm_arch_reset(char mode)
|
||||
{
|
||||
u32 rate;
|
||||
struct clk *vclk, *sclk;
|
||||
|
||||
vclk = clk_get(NULL, "virt_prcm_set");
|
||||
sclk = clk_get(NULL, "sys_ck");
|
||||
rate = clk_get_rate(sclk);
|
||||
clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */
|
||||
omap2_clk_prepare_for_reboot();
|
||||
RM_RSTCTRL_WKUP |= 2;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,6 +2,13 @@ if ARCH_S3C2410
|
|||
|
||||
menu "S3C24XX Implementations"
|
||||
|
||||
config MACH_AML_M5900
|
||||
bool "AML M5900 Series"
|
||||
select CPU_S3C2410
|
||||
help
|
||||
Say Y here if you are using the American Microsystems M5900 Series
|
||||
<http://www.amltd.com>
|
||||
|
||||
config MACH_ANUBIS
|
||||
bool "Simtec Electronics ANUBIS"
|
||||
select CPU_S3C2440
|
||||
|
|
@ -126,6 +133,12 @@ config MACH_NEXCODER_2440
|
|||
help
|
||||
Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board
|
||||
|
||||
config MACH_VSTMS
|
||||
bool "VMSTMS"
|
||||
select CPU_S3C2412
|
||||
help
|
||||
Say Y here if you are using an VSTMS board
|
||||
|
||||
endmenu
|
||||
|
||||
config S3C2410_CLOCK
|
||||
|
|
@ -133,10 +146,24 @@ config S3C2410_CLOCK
|
|||
help
|
||||
Clock code for the S3C2410, and similar processors
|
||||
|
||||
config S3C2410_PM
|
||||
bool
|
||||
depends on CONFIG_PM
|
||||
help
|
||||
Power Management code common to S3C2410 and better
|
||||
|
||||
config CPU_S3C2410_DMA
|
||||
bool
|
||||
depends on S3C2410_DMA && (CPU_S3C2410 || CPU_S3C2442)
|
||||
default y if CPU_S3C2410 || CPU_S3C2442
|
||||
help
|
||||
DMA device selection for S3C2410 and compatible CPUs
|
||||
|
||||
config CPU_S3C2410
|
||||
bool
|
||||
depends on ARCH_S3C2410
|
||||
select S3C2410_CLOCK
|
||||
select S3C2410_PM
|
||||
help
|
||||
Support for S3C2410 and S3C2410A family from the S3C24XX line
|
||||
of Samsung Mobile CPUs.
|
||||
|
|
@ -149,6 +176,13 @@ config CPU_S3C2412_ONLY
|
|||
!CPU_S3C2440 && !CPU_S3C2442 && CPU_S3C2412
|
||||
default y if CPU_S3C2412
|
||||
|
||||
config S3C2412_PM
|
||||
bool
|
||||
default y if PM
|
||||
depends on CPU_S3C2412
|
||||
help
|
||||
Internal config node to apply S3C2412 power management
|
||||
|
||||
config CPU_S3C2412
|
||||
bool
|
||||
depends on ARCH_S3C2410
|
||||
|
|
@ -165,6 +199,7 @@ config CPU_S3C2440
|
|||
bool
|
||||
depends on ARCH_S3C2410
|
||||
select S3C2410_CLOCK
|
||||
select S3C2410_PM
|
||||
select CPU_S3C244X
|
||||
help
|
||||
Support for S3C2440 Samsung Mobile CPU based systems.
|
||||
|
|
@ -173,6 +208,7 @@ config CPU_S3C2442
|
|||
bool
|
||||
depends on ARCH_S3C2420
|
||||
select S3C2410_CLOCK
|
||||
select S3C2410_PM
|
||||
select CPU_S3C244X
|
||||
help
|
||||
Support for S3C2442 Samsung Mobile CPU based systems.
|
||||
|
|
@ -256,7 +292,7 @@ config S3C2410_PM_CHECK_CHUNKSIZE
|
|||
|
||||
config PM_SIMTEC
|
||||
bool
|
||||
depends on PM && (ARCH_BAST || MACH_VR1000)
|
||||
depends on PM && (ARCH_BAST || MACH_VR1000 || MACH_AML_M5900)
|
||||
default y
|
||||
|
||||
config S3C2410_LOWLEVEL_UART_PORT
|
||||
|
|
|
|||
|
|
@ -9,6 +9,8 @@ obj-y := cpu.o irq.o time.o gpio.o clock.o devs.o
|
|||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
obj-dma-y :=
|
||||
obj-dma-n :=
|
||||
|
||||
# DMA
|
||||
obj-$(CONFIG_S3C2410_DMA) += dma.o
|
||||
|
|
@ -20,6 +22,10 @@ obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o
|
|||
|
||||
obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
|
||||
obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o
|
||||
obj-$(CONFIG_CPU_S3C2410) += s3c2410-irq.o
|
||||
|
||||
obj-$(CONFIG_S3C2410_PM) += s3c2410-pm.o s3c2410-sleep.o
|
||||
obj-$(CONFIG_CPU_S3C2410_DMA) += s3c2410-dma.o
|
||||
|
||||
# Power Management support
|
||||
|
||||
|
|
@ -30,6 +36,9 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
|
|||
obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
|
||||
obj-$(CONFIG_CPU_S3C2412) += s3c2412-irq.o
|
||||
obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o
|
||||
obj-dma-$(CONFIG_CPU_S3C2412) += s3c2412-dma.o
|
||||
|
||||
obj-$(CONFIG_S3C2412_PM) += s3c2412-pm.o
|
||||
|
||||
#
|
||||
# S3C244X support
|
||||
|
|
@ -47,6 +56,7 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
|
|||
obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o
|
||||
obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o
|
||||
obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o
|
||||
obj-dma-$(CONFIG_CPU_S3C2440) += s3c2440-dma.o
|
||||
|
||||
# S3C2442 support
|
||||
|
||||
|
|
@ -57,8 +67,13 @@ obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o
|
|||
|
||||
obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o
|
||||
|
||||
# merge in dma objects
|
||||
|
||||
obj-y += $(obj-dma-y)
|
||||
|
||||
# machine specific support
|
||||
|
||||
obj-$(CONFIG_MACH_AML_M5900) += mach-amlm5900.o
|
||||
obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o
|
||||
obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o
|
||||
obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o
|
||||
|
|
@ -71,5 +86,6 @@ obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o usb-simtec.o
|
|||
obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o
|
||||
obj-$(CONFIG_MACH_OTOM) += mach-otom.o
|
||||
obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
|
||||
obj-$(CONFIG_MACH_VSTMS) += mach-vstms.o
|
||||
|
||||
obj-$(CONFIG_MACH_SMDK) += common-smdk.o
|
||||
|
|
@ -18,10 +18,6 @@
|
|||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* Modifications:
|
||||
* 08-Jan-2003 BJD Moved from central IRQ code
|
||||
* 21-Aug-2005 BJD Fixed missing code and compile errors
|
||||
*/
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -124,6 +124,15 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
.init = s3c2412_init,
|
||||
.name = name_s3c2412,
|
||||
},
|
||||
{ /* a newer version of the s3c2412 */
|
||||
.idcode = 0x32412003,
|
||||
.idmask = 0xffffffff,
|
||||
.map_io = s3c2412_map_io,
|
||||
.init_clocks = s3c2412_init_clocks,
|
||||
.init_uarts = s3c2412_init_uarts,
|
||||
.init = s3c2412_init,
|
||||
.name = name_s3c2412,
|
||||
},
|
||||
{
|
||||
.idcode = 0x0, /* S3C2400 doesn't have an idcode */
|
||||
.idmask = 0xffffffff,
|
||||
|
|
|
|||
|
|
@ -8,11 +8,6 @@
|
|||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Modifications:
|
||||
* 18-Aug-2004 BJD Created initial version
|
||||
* 27-Aug-2004 BJD Added timers 0 through 3
|
||||
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
|
||||
*/
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,35 +1,16 @@
|
|||
/* linux/arch/arm/mach-bast/dma.c
|
||||
/* linux/arch/arm/mach-s3c2410/dma.c
|
||||
*
|
||||
* (c) 2003-2005 Simtec Electronics
|
||||
* (c) 2003-2005,2006 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 DMA core
|
||||
*
|
||||
* http://www.simtec.co.uk/products/EB2410ITX/
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Changelog:
|
||||
* 27-Feb-2005 BJD Added kmem cache for dma descriptors
|
||||
* 18-Nov-2004 BJD Removed error for loading onto stopped channel
|
||||
* 10-Nov-2004 BJD Ensure all external symbols exported for modules
|
||||
* 10-Nov-2004 BJD Use sys_device and sysdev_class for power management
|
||||
* 08-Aug-2004 BJD Apply rmk's suggestions
|
||||
* 21-Jul-2004 BJD Ported to linux 2.6
|
||||
* 12-Jul-2004 BJD Finished re-write and change of API
|
||||
* 06-Jul-2004 BJD Rewrote dma code to try and cope with various problems
|
||||
* 23-May-2003 BJD Created file
|
||||
* 19-Aug-2003 BJD Cleanup, header fix, added URL
|
||||
*
|
||||
* This file is based on the Sangwook Lee/Samsung patches, re-written due
|
||||
* to various ommisions from the code (such as flexible dma configuration)
|
||||
* for use with the BAST system board.
|
||||
*
|
||||
* The re-write is pretty much complete, and should be good enough for any
|
||||
* possible DMA function
|
||||
*/
|
||||
*/
|
||||
|
||||
|
||||
#ifdef CONFIG_S3C2410_DMA_DEBUG
|
||||
|
|
@ -55,10 +36,14 @@
|
|||
#include <asm/mach/dma.h>
|
||||
#include <asm/arch/map.h>
|
||||
|
||||
#include "dma.h"
|
||||
|
||||
/* io map for dma */
|
||||
static void __iomem *dma_base;
|
||||
static kmem_cache_t *dma_kmem;
|
||||
|
||||
struct s3c24xx_dma_selection dma_sel;
|
||||
|
||||
/* dma channel state information */
|
||||
struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
|
||||
|
||||
|
|
@ -79,7 +64,6 @@ dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val)
|
|||
pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg);
|
||||
writel(val, dma_regaddr(chan, reg));
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#define dma_rdreg(chan, reg) readl((chan)->regs + (reg))
|
||||
|
|
@ -151,12 +135,20 @@ dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan)
|
|||
#define dbg_showchan(chan) do { } while(0)
|
||||
#endif /* CONFIG_S3C2410_DMA_DEBUG */
|
||||
|
||||
#define check_channel(chan) \
|
||||
do { if ((chan) >= S3C2410_DMA_CHANNELS) { \
|
||||
printk(KERN_ERR "%s: invalid channel %d\n", __FUNCTION__, (chan)); \
|
||||
return -EINVAL; \
|
||||
} } while(0)
|
||||
static struct s3c2410_dma_chan *dma_chan_map[DMACH_MAX];
|
||||
|
||||
/* lookup_dma_channel
|
||||
*
|
||||
* change the dma channel number given into a real dma channel id
|
||||
*/
|
||||
|
||||
static struct s3c2410_dma_chan *lookup_dma_channel(unsigned int channel)
|
||||
{
|
||||
if (channel & DMACH_LOW_LEVEL)
|
||||
return &s3c2410_chans[channel & ~DMACH_LOW_LEVEL];
|
||||
else
|
||||
return dma_chan_map[channel];
|
||||
}
|
||||
|
||||
/* s3c2410_dma_stats_timeout
|
||||
*
|
||||
|
|
@ -321,8 +313,10 @@ static inline void
|
|||
s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf,
|
||||
enum s3c2410_dma_buffresult result)
|
||||
{
|
||||
#if 0
|
||||
pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n",
|
||||
chan->callback_fn, buf, buf->id, buf->size, result);
|
||||
#endif
|
||||
|
||||
if (chan->callback_fn != NULL) {
|
||||
(chan->callback_fn)(chan, buf->id, buf->size, result);
|
||||
|
|
@ -439,7 +433,6 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* s3c2410_dma_enqueue
|
||||
*
|
||||
* queue an given buffer for dma transfer.
|
||||
|
|
@ -460,11 +453,12 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
|
|||
int s3c2410_dma_enqueue(unsigned int channel, void *id,
|
||||
dma_addr_t data, int size)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
struct s3c2410_dma_buf *buf;
|
||||
unsigned long flags;
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("%s: id=%p, data=%08x, size=%d\n",
|
||||
__FUNCTION__, id, (unsigned int)data, size);
|
||||
|
|
@ -562,8 +556,10 @@ s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf)
|
|||
static inline void
|
||||
s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
|
||||
{
|
||||
#if 0
|
||||
pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n",
|
||||
chan->number, chan->load_state);
|
||||
#endif
|
||||
|
||||
switch (chan->load_state) {
|
||||
case S3C2410_DMALOAD_NONE:
|
||||
|
|
@ -718,7 +714,8 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs)
|
|||
if (chan->load_state == S3C2410_DMALOAD_NONE) {
|
||||
pr_debug("dma%d: end of transfer, stopping channel (%ld)\n",
|
||||
chan->number, jiffies);
|
||||
s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_STOP);
|
||||
s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL,
|
||||
S3C2410_DMAOP_STOP);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -726,37 +723,34 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel);
|
||||
|
||||
/* s3c2410_request_dma
|
||||
*
|
||||
* get control of an dma channel
|
||||
*/
|
||||
|
||||
int s3c2410_dma_request(unsigned int channel, struct s3c2410_dma_client *client,
|
||||
int s3c2410_dma_request(unsigned int channel,
|
||||
struct s3c2410_dma_client *client,
|
||||
void *dev)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan;
|
||||
unsigned long flags;
|
||||
int err;
|
||||
|
||||
pr_debug("dma%d: s3c2410_request_dma: client=%s, dev=%p\n",
|
||||
channel, client->name, dev);
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
dbg_showchan(chan);
|
||||
|
||||
if (chan->in_use) {
|
||||
if (client != chan->client) {
|
||||
printk(KERN_ERR "dma%d: already in use\n", channel);
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
} else {
|
||||
printk(KERN_ERR "dma%d: client already has channel\n", channel);
|
||||
}
|
||||
chan = s3c2410_dma_map_channel(channel);
|
||||
if (chan == NULL) {
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
dbg_showchan(chan);
|
||||
|
||||
chan->client = client;
|
||||
chan->in_use = 1;
|
||||
|
||||
|
|
@ -809,14 +803,14 @@ EXPORT_SYMBOL(s3c2410_dma_request);
|
|||
|
||||
int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
unsigned long flags;
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
|
||||
if (chan->client != client) {
|
||||
printk(KERN_WARNING "dma%d: possible free from different client (channel %p, passed %p)\n",
|
||||
channel, chan->client, client);
|
||||
|
|
@ -837,8 +831,12 @@ int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
|
|||
|
||||
if (chan->irq_claimed)
|
||||
free_irq(chan->irq, (void *)chan);
|
||||
|
||||
chan->irq_claimed = 0;
|
||||
|
||||
if (!(channel & DMACH_LOW_LEVEL))
|
||||
dma_chan_map[channel] = NULL;
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
||||
return 0;
|
||||
|
|
@ -848,8 +846,8 @@ EXPORT_SYMBOL(s3c2410_dma_free);
|
|||
|
||||
static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan)
|
||||
{
|
||||
unsigned long tmp;
|
||||
unsigned long flags;
|
||||
unsigned long tmp;
|
||||
|
||||
pr_debug("%s:\n", __FUNCTION__);
|
||||
|
||||
|
|
@ -997,9 +995,10 @@ s3c2410_dma_started(struct s3c2410_dma_chan *chan)
|
|||
int
|
||||
s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (op) {
|
||||
case S3C2410_DMAOP_START:
|
||||
|
|
@ -1046,12 +1045,19 @@ int s3c2410_dma_config(dmach_t channel,
|
|||
int xferunit,
|
||||
int dcon)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n",
|
||||
__FUNCTION__, channel, xferunit, dcon);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
printk("Initial dcon is %08x\n", dcon);
|
||||
|
||||
dcon |= chan->dcon & dma_sel.dcon_mask;
|
||||
|
||||
printk("New dcon is %08x\n", dcon);
|
||||
|
||||
switch (xferunit) {
|
||||
case 1:
|
||||
|
|
@ -1086,9 +1092,10 @@ EXPORT_SYMBOL(s3c2410_dma_config);
|
|||
|
||||
int s3c2410_dma_setflags(dmach_t channel, unsigned int flags)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("%s: chan=%p, flags=%08x\n", __FUNCTION__, chan, flags);
|
||||
|
||||
|
|
@ -1106,9 +1113,10 @@ EXPORT_SYMBOL(s3c2410_dma_setflags);
|
|||
|
||||
int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("%s: chan=%p, op rtn=%p\n", __FUNCTION__, chan, rtn);
|
||||
|
||||
|
|
@ -1121,9 +1129,10 @@ EXPORT_SYMBOL(s3c2410_dma_set_opfn);
|
|||
|
||||
int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("%s: chan=%p, callback rtn=%p\n", __FUNCTION__, chan, rtn);
|
||||
|
||||
|
|
@ -1153,9 +1162,10 @@ int s3c2410_dma_devconfig(int channel,
|
|||
int hwcfg,
|
||||
unsigned long devaddr)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n",
|
||||
__FUNCTION__, (int)source, hwcfg, devaddr);
|
||||
|
|
@ -1200,9 +1210,10 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig);
|
|||
|
||||
int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
|
||||
{
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
|
||||
|
||||
check_channel(channel);
|
||||
if (chan == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
if (src != NULL)
|
||||
*src = dma_rdreg(chan, S3C2410_DMA_DCSRC);
|
||||
|
|
@ -1252,7 +1263,7 @@ static int s3c2410_dma_resume(struct sys_device *dev)
|
|||
#define s3c2410_dma_resume NULL
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
static struct sysdev_class dma_sysclass = {
|
||||
struct sysdev_class dma_sysclass = {
|
||||
set_kset_name("s3c24xx-dma"),
|
||||
.suspend = s3c2410_dma_suspend,
|
||||
.resume = s3c2410_dma_resume,
|
||||
|
|
@ -1265,7 +1276,6 @@ static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f)
|
|||
memset(p, 0, sizeof(struct s3c2410_dma_buf));
|
||||
}
|
||||
|
||||
|
||||
/* initialisation code */
|
||||
|
||||
static int __init s3c2410_init_dma(void)
|
||||
|
|
@ -1274,7 +1284,7 @@ static int __init s3c2410_init_dma(void)
|
|||
int channel;
|
||||
int ret;
|
||||
|
||||
printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n");
|
||||
printk("S3C24XX DMA Driver, (c) 2003-2004,2006 Simtec Electronics\n");
|
||||
|
||||
dma_base = ioremap(S3C24XX_PA_DMA, 0x200);
|
||||
if (dma_base == NULL) {
|
||||
|
|
@ -1282,6 +1292,8 @@ static int __init s3c2410_init_dma(void)
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
printk("Registering sysclass\n");
|
||||
|
||||
ret = sysdev_class_register(&dma_sysclass);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR "dma sysclass registration failed\n");
|
||||
|
|
@ -1335,4 +1347,95 @@ static int __init s3c2410_init_dma(void)
|
|||
return ret;
|
||||
}
|
||||
|
||||
__initcall(s3c2410_init_dma);
|
||||
core_initcall(s3c2410_init_dma);
|
||||
|
||||
static inline int is_channel_valid(unsigned int channel)
|
||||
{
|
||||
return (channel & DMA_CH_VALID);
|
||||
}
|
||||
|
||||
/* s3c2410_dma_map_channel()
|
||||
*
|
||||
* turn the virtual channel number into a real, and un-used hardware
|
||||
* channel.
|
||||
*
|
||||
* currently this code uses first-free channel from the specified harware
|
||||
* map, not taking into account anything that the board setup code may
|
||||
* have to say about the likely peripheral set to be in use.
|
||||
*/
|
||||
|
||||
struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel)
|
||||
{
|
||||
struct s3c24xx_dma_map *ch_map;
|
||||
struct s3c2410_dma_chan *dmach;
|
||||
int ch;
|
||||
|
||||
if (dma_sel.map == NULL || channel > dma_sel.map_size)
|
||||
return NULL;
|
||||
|
||||
ch_map = dma_sel.map + channel;
|
||||
|
||||
for (ch = 0; ch < S3C2410_DMA_CHANNELS; ch++) {
|
||||
if (!is_channel_valid(ch_map->channels[ch]))
|
||||
continue;
|
||||
|
||||
if (s3c2410_chans[ch].in_use == 0) {
|
||||
printk("mapped channel %d to %d\n", channel, ch);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (ch >= S3C2410_DMA_CHANNELS)
|
||||
return NULL;
|
||||
|
||||
/* update our channel mapping */
|
||||
|
||||
dmach = &s3c2410_chans[ch];
|
||||
dma_chan_map[channel] = dmach;
|
||||
|
||||
/* select the channel */
|
||||
|
||||
(dma_sel.select)(dmach, ch_map);
|
||||
|
||||
return dmach;
|
||||
}
|
||||
|
||||
static void s3c24xx_dma_show_ch(struct s3c24xx_dma_map *map, int ch)
|
||||
{
|
||||
/* show the channel configuration */
|
||||
|
||||
printk("%2d: %20s, channels %c%c%c%c\n", ch, map->name,
|
||||
(is_channel_valid(map->channels[0]) ? '0' : '-'),
|
||||
(is_channel_valid(map->channels[1]) ? '1' : '-'),
|
||||
(is_channel_valid(map->channels[2]) ? '2' : '-'),
|
||||
(is_channel_valid(map->channels[3]) ? '3' : '-'));
|
||||
}
|
||||
|
||||
static int s3c24xx_dma_check_entry(struct s3c24xx_dma_map *map, int ch)
|
||||
{
|
||||
if (1)
|
||||
s3c24xx_dma_show_ch(map, ch);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel)
|
||||
{
|
||||
struct s3c24xx_dma_map *nmap;
|
||||
size_t map_sz = sizeof(*nmap) * sel->map_size;
|
||||
int ptr;
|
||||
|
||||
nmap = kmalloc(map_sz, GFP_KERNEL);
|
||||
if (nmap == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
memcpy(nmap, sel->map, map_sz);
|
||||
memcpy(&dma_sel, sel, sizeof(*sel));
|
||||
|
||||
dma_sel.map = nmap;
|
||||
|
||||
for (ptr = 0; ptr < sel->map_size; ptr++)
|
||||
s3c24xx_dma_check_entry(nmap+ptr, ptr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,45 @@
|
|||
/* arch/arm/mach-s3c2410/dma.h
|
||||
*
|
||||
* Copyright (C) 2006 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* Samsung S3C24XX DMA support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
extern struct sysdev_class dma_sysclass;
|
||||
extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
|
||||
|
||||
#define DMA_CH_VALID (1<<31)
|
||||
|
||||
struct s3c24xx_dma_addr {
|
||||
unsigned long from;
|
||||
unsigned long to;
|
||||
};
|
||||
|
||||
/* struct s3c24xx_dma_map
|
||||
*
|
||||
* this holds the mapping information for the channel selected
|
||||
* to be connected to the specified device
|
||||
*/
|
||||
|
||||
struct s3c24xx_dma_map {
|
||||
const char *name;
|
||||
struct s3c24xx_dma_addr hw_addr;
|
||||
|
||||
unsigned long channels[S3C2410_DMA_CHANNELS];
|
||||
};
|
||||
|
||||
struct s3c24xx_dma_selection {
|
||||
struct s3c24xx_dma_map *map;
|
||||
unsigned long map_size;
|
||||
unsigned long dcon_mask;
|
||||
|
||||
void (*select)(struct s3c2410_dma_chan *chan,
|
||||
struct s3c24xx_dma_map *map);
|
||||
};
|
||||
|
||||
extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
|
||||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue