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drm/amdgpu: use kernel fence for vce ib test 

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
hifive-unleashed-5.1
Chunming Zhou 2015-08-03 13:28:16 +08:00 committed by Alex Deucher
parent 0e3f154a9e
commit ed40bfb81a
3 changed files with 12 additions and 11 deletions
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5
drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
View File

@ -260,18 +260,19 @@ static int amdgpu_test_create_and_emit_fence(struct amdgpu_device *adev,
} else if (ring == &adev->vce.ring[0] || } else if (ring == &adev->vce.ring[0] ||
ring == &adev->vce.ring[1]) { ring == &adev->vce.ring[1]) {
struct fence *f = NULL;
r = amdgpu_vce_get_create_msg(ring, handle, NULL); r = amdgpu_vce_get_create_msg(ring, handle, NULL);
if (r) { if (r) {
DRM_ERROR("Failed to get dummy create msg\n"); DRM_ERROR("Failed to get dummy create msg\n");
return r; return r;
} }
r = amdgpu_vce_get_destroy_msg(ring, handle, fence); r = amdgpu_vce_get_destroy_msg(ring, handle, &f);
if (r) { if (r) {
DRM_ERROR("Failed to get dummy destroy msg\n"); DRM_ERROR("Failed to get dummy destroy msg\n");
return r; return r;
} }
*fence = to_amdgpu_fence(f);
} else { } else {
r = amdgpu_ring_lock(ring, 64); r = amdgpu_ring_lock(ring, 64);
if (r) { if (r) {

14
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
View File

@ -358,7 +358,7 @@ static int amdgpu_vce_free_job(
* Open up a stream for HW test * Open up a stream for HW test
*/ */
int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
struct amdgpu_fence **fence) struct fence **fence)
{ {
const unsigned ib_size_dw = 1024; const unsigned ib_size_dw = 1024;
struct amdgpu_ib *ib = NULL; struct amdgpu_ib *ib = NULL;
@ -412,7 +412,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
if (r) if (r)
goto err; goto err;
if (fence) if (fence)
*fence = amdgpu_fence_ref(ib->fence); *fence = fence_get(&ib->fence->base);
if (amdgpu_enable_scheduler) if (amdgpu_enable_scheduler)
return 0; return 0;
err: err:
@ -432,7 +432,7 @@ err:
* Close up a stream for HW test or if userspace failed to do so * Close up a stream for HW test or if userspace failed to do so
*/ */
int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
struct amdgpu_fence **fence) struct fence **fence)
{ {
const unsigned ib_size_dw = 1024; const unsigned ib_size_dw = 1024;
struct amdgpu_ib *ib = NULL; struct amdgpu_ib *ib = NULL;
@ -476,7 +476,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
if (r) if (r)
goto err; goto err;
if (fence) if (fence)
*fence = amdgpu_fence_ref(ib->fence); *fence = fence_get(&ib->fence->base);
if (amdgpu_enable_scheduler) if (amdgpu_enable_scheduler)
return 0; return 0;
err: err:
@ -827,7 +827,7 @@ int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring)
*/ */
int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring) int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring)
{ {
struct amdgpu_fence *fence = NULL; struct fence *fence = NULL;
int r; int r;
r = amdgpu_vce_get_create_msg(ring, 1, NULL); r = amdgpu_vce_get_create_msg(ring, 1, NULL);
@ -842,13 +842,13 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring)
goto error; goto error;
} }
r = amdgpu_fence_wait(fence, false); r = fence_wait(fence, false);
if (r) { if (r) {
DRM_ERROR("amdgpu: fence wait failed (%d).\n", r); DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
} else { } else {
DRM_INFO("ib test on ring %d succeeded\n", ring->idx); DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
} }
error: error:
amdgpu_fence_unref(&fence); fence_put(fence);
return r; return r;
} }

4
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
View File

@ -29,9 +29,9 @@ int amdgpu_vce_sw_fini(struct amdgpu_device *adev);
int amdgpu_vce_suspend(struct amdgpu_device *adev); int amdgpu_vce_suspend(struct amdgpu_device *adev);
int amdgpu_vce_resume(struct amdgpu_device *adev); int amdgpu_vce_resume(struct amdgpu_device *adev);
int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
struct amdgpu_fence **fence); struct fence **fence);
int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
struct amdgpu_fence **fence); struct fence **fence);
void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp); void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx); int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
bool amdgpu_vce_ring_emit_semaphore(struct amdgpu_ring *ring, bool amdgpu_vce_ring_emit_semaphore(struct amdgpu_ring *ring,