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staging: olpc_dcon: Replace a bit shift by a use of BIT.

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in the file olpc_dcon.h .

Signed-off-by: Anchal Jain <anchalj109@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Anchal Jain 2016-09-18 12:16:40 +05:30 committed by Greg Kroah-Hartman
parent 6841b2a0fc
commit ed88363e6a
1 changed files with 15 additions and 15 deletions

View File

@ -9,18 +9,18 @@
#define DCON_REG_ID 0
#define DCON_REG_MODE 1
#define MODE_PASSTHRU (1<<0)
#define MODE_SLEEP (1<<1)
#define MODE_SLEEP_AUTO (1<<2)
#define MODE_BL_ENABLE (1<<3)
#define MODE_BLANK (1<<4)
#define MODE_CSWIZZLE (1<<5)
#define MODE_COL_AA (1<<6)
#define MODE_MONO_LUMA (1<<7)
#define MODE_SCAN_INT (1<<8)
#define MODE_CLOCKDIV (1<<9)
#define MODE_DEBUG (1<<14)
#define MODE_SELFTEST (1<<15)
#define MODE_PASSTHRU bit(0)
#define MODE_SLEEP bit(1)
#define MODE_SLEEP_AUTO bit(2)
#define MODE_BL_ENABLE bit(3)
#define MODE_BLANK bit(4)
#define MODE_CSWIZZLE bit(5)
#define MODE_COL_AA bit(6)
#define MODE_MONO_LUMA bit(7)
#define MODE_SCAN_INT bit(8)
#define MODE_CLOCKDIV bit(9)
#define MODE_DEBUG bit(14)
#define MODE_SELFTEST bit(15)
#define DCON_REG_HRES 0x2
#define DCON_REG_HTOTAL 0x3
@ -35,11 +35,11 @@
#define DCON_REG_MEM_OPT_B 0x42
/* Load Delay Locked Loop (DLL) settings for clock delay */
#define MEM_DLL_CLOCK_DELAY (1<<0)
#define MEM_DLL_CLOCK_DELAY bit(0)
/* Memory controller power down function */
#define MEM_POWER_DOWN (1<<8)
#define MEM_POWER_DOWN bit(8)
/* Memory controller software reset */
#define MEM_SOFT_RESET (1<<0)
#define MEM_SOFT_RESET bit(0)
/* Status values */