iio: adc: at91: Add support for Touchscreen Switches Closure Time
On newer components compatible with the at91sam9x5, the Touchscreen Switches Closure Time or TSSCTIM value of the Touchscreen Mode Register is not filled at all. On some hardware, having no time indicated for it may lead to incoherent values and jitter. We fix this time to 10us as it is usually difficult to retrieve impedance values from LCD manufacturers. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -113,6 +113,7 @@
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#define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */
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#define AT91_ADC_TSMR_TSAV_(x) ((x) << 4)
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#define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */
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#define AT91_ADC_TSMR_SCTIM_(x) ((x) << 16)
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#define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */
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#define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28)
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#define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */
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@ -150,6 +151,7 @@
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#define MAX_RLPOS_BITS 10
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#define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */
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#define TOUCH_SHTIM 0xa
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#define TOUCH_SCTIM_US 10 /* 10us for the Touchscreen Switches Closure Time */
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/**
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* struct at91_adc_reg_desc - Various informations relative to registers
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@ -1001,7 +1003,9 @@ static void atmel_ts_close(struct input_dev *dev)
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static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
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{
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struct iio_dev *idev = iio_priv_to_dev(st);
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u32 reg = 0;
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u32 tssctim = 0;
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int i = 0;
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/* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
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@ -1034,11 +1038,20 @@ static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
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return 0;
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}
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/* Touchscreen Switches Closure time needed for allowing the value to
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* stabilize.
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* Switch Closure Time = (TSSCTIM * 4) ADCClock periods
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*/
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tssctim = DIV_ROUND_UP(TOUCH_SCTIM_US * adc_clk_khz / 1000, 4);
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dev_dbg(&idev->dev, "adc_clk at: %d KHz, tssctim at: %d\n",
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adc_clk_khz, tssctim);
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if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
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reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
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else
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reg = AT91_ADC_TSMR_TSMODE_5WIRE;
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reg |= AT91_ADC_TSMR_SCTIM_(tssctim) & AT91_ADC_TSMR_SCTIM;
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reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
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& AT91_ADC_TSMR_TSAV;
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reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
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