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drm/amdgpu: add reset_method asic callback for soc15 

APUs only support mode2 reset.  dGPUs use either mode1 or
baco depending on various conditions.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
alistair/sunxi64-5.4-dsi
Alex Deucher 2019-07-23 23:47:06 -05:00
parent 9bc1932f5c
commit ee360c0b7c
1 changed files with 15 additions and 2 deletions
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17
drivers/gpu/drm/amd/amdgpu/soc15.c
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@ -465,12 +465,14 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
return 0;
}
static int soc15_asic_reset(struct amdgpu_device *adev)
static enum amd_reset_method
soc15_asic_reset_method(struct amdgpu_device *adev)
{
int ret;
bool baco_reset;
switch (adev->asic_type) {
case CHIP_RAVEN:
return AMD_RESET_METHOD_MODE2;
case CHIP_VEGA10:
case CHIP_VEGA12:
soc15_asic_get_baco_capability(adev, &baco_reset);
@ -494,6 +496,16 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
}
if (baco_reset)
return AMD_RESET_METHOD_BACO;
else
return AMD_RESET_METHOD_MODE1;
}
static int soc15_asic_reset(struct amdgpu_device *adev)
{
int ret;
if (soc15_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)
ret = soc15_asic_baco_reset(adev);
else
ret = soc15_asic_mode1_reset(adev);
@ -807,6 +819,7 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs =
.read_bios_from_rom = &soc15_read_bios_from_rom,
.read_register = &soc15_read_register,
.reset = &soc15_asic_reset,
.reset_method = &soc15_asic_reset_method,
.set_vga_state = &soc15_vga_set_state,
.get_xclk = &soc15_get_xclk,
.set_uvd_clocks = &soc15_set_uvd_clocks,