Merge branch 'linux-4.15' of git://github.com/skeggsb/linux into drm-fixes
Thought I'd try my luck getting one more in: - Two fixes for Tegra (one is to common code, but our userspace doesn't hit it). - One for NV5x-class MCPs * 'linux-4.15' of git://github.com/skeggsb/linux: drm/nouveau/mmu/mcp77: fix regressions in stolen memory handling drm/nouveau/bar/gk20a: Avoid bar teardown during init drm/nouveau/drm/nouveau: Pass the proper arguments to nvif_object_map_handle()
This commit is contained in:
commit
ee62249d85
|
@ -121,6 +121,7 @@ int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
|||
int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
int g84_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
int mcp77_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
int gk104_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
int gk20a_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
|
||||
|
|
|
@ -1447,11 +1447,13 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg)
|
|||
args.nv50.ro = 0;
|
||||
args.nv50.kind = mem->kind;
|
||||
args.nv50.comp = mem->comp;
|
||||
argc = sizeof(args.nv50);
|
||||
break;
|
||||
case NVIF_CLASS_MEM_GF100:
|
||||
args.gf100.version = 0;
|
||||
args.gf100.ro = 0;
|
||||
args.gf100.kind = mem->kind;
|
||||
argc = sizeof(args.gf100);
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
|
@ -1459,7 +1461,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg)
|
|||
}
|
||||
|
||||
ret = nvif_object_map_handle(&mem->mem.object,
|
||||
&argc, argc,
|
||||
&args, argc,
|
||||
&handle, &length);
|
||||
if (ret != 1)
|
||||
return ret ? ret : -EINVAL;
|
||||
|
|
|
@ -1251,7 +1251,7 @@ nvaa_chipset = {
|
|||
.i2c = g94_i2c_new,
|
||||
.imem = nv50_instmem_new,
|
||||
.mc = g98_mc_new,
|
||||
.mmu = g84_mmu_new,
|
||||
.mmu = mcp77_mmu_new,
|
||||
.mxm = nv50_mxm_new,
|
||||
.pci = g94_pci_new,
|
||||
.therm = g84_therm_new,
|
||||
|
@ -1283,7 +1283,7 @@ nvac_chipset = {
|
|||
.i2c = g94_i2c_new,
|
||||
.imem = nv50_instmem_new,
|
||||
.mc = g98_mc_new,
|
||||
.mmu = g84_mmu_new,
|
||||
.mmu = mcp77_mmu_new,
|
||||
.mxm = nv50_mxm_new,
|
||||
.pci = g94_pci_new,
|
||||
.therm = g84_therm_new,
|
||||
|
|
|
@ -73,7 +73,8 @@ static int
|
|||
nvkm_bar_fini(struct nvkm_subdev *subdev, bool suspend)
|
||||
{
|
||||
struct nvkm_bar *bar = nvkm_bar(subdev);
|
||||
bar->func->bar1.fini(bar);
|
||||
if (bar->func->bar1.fini)
|
||||
bar->func->bar1.fini(bar);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -26,7 +26,6 @@ gk20a_bar_func = {
|
|||
.dtor = gf100_bar_dtor,
|
||||
.oneinit = gf100_bar_oneinit,
|
||||
.bar1.init = gf100_bar_bar1_init,
|
||||
.bar1.fini = gf100_bar_bar1_fini,
|
||||
.bar1.wait = gf100_bar_bar1_wait,
|
||||
.bar1.vmm = gf100_bar_bar1_vmm,
|
||||
.flush = g84_bar_flush,
|
||||
|
|
|
@ -4,6 +4,7 @@ nvkm-y += nvkm/subdev/mmu/nv41.o
|
|||
nvkm-y += nvkm/subdev/mmu/nv44.o
|
||||
nvkm-y += nvkm/subdev/mmu/nv50.o
|
||||
nvkm-y += nvkm/subdev/mmu/g84.o
|
||||
nvkm-y += nvkm/subdev/mmu/mcp77.o
|
||||
nvkm-y += nvkm/subdev/mmu/gf100.o
|
||||
nvkm-y += nvkm/subdev/mmu/gk104.o
|
||||
nvkm-y += nvkm/subdev/mmu/gk20a.o
|
||||
|
@ -22,6 +23,7 @@ nvkm-y += nvkm/subdev/mmu/vmmnv04.o
|
|||
nvkm-y += nvkm/subdev/mmu/vmmnv41.o
|
||||
nvkm-y += nvkm/subdev/mmu/vmmnv44.o
|
||||
nvkm-y += nvkm/subdev/mmu/vmmnv50.o
|
||||
nvkm-y += nvkm/subdev/mmu/vmmmcp77.o
|
||||
nvkm-y += nvkm/subdev/mmu/vmmgf100.o
|
||||
nvkm-y += nvkm/subdev/mmu/vmmgk104.o
|
||||
nvkm-y += nvkm/subdev/mmu/vmmgk20a.o
|
||||
|
|
41
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.c
Normal file
41
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.c
Normal file
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* Copyright 2017 Red Hat Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
#include "mem.h"
|
||||
#include "vmm.h"
|
||||
|
||||
#include <nvif/class.h>
|
||||
|
||||
static const struct nvkm_mmu_func
|
||||
mcp77_mmu = {
|
||||
.dma_bits = 40,
|
||||
.mmu = {{ -1, -1, NVIF_CLASS_MMU_NV50}},
|
||||
.mem = {{ -1, 0, NVIF_CLASS_MEM_NV50}, nv50_mem_new, nv50_mem_map },
|
||||
.vmm = {{ -1, -1, NVIF_CLASS_VMM_NV50}, mcp77_vmm_new, false, 0x0200 },
|
||||
.kind = nv50_mmu_kind,
|
||||
.kind_sys = true,
|
||||
};
|
||||
|
||||
int
|
||||
mcp77_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
|
||||
{
|
||||
return nvkm_mmu_new_(&mcp77_mmu, device, index, pmmu);
|
||||
}
|
|
@ -95,6 +95,9 @@ struct nvkm_vmm_desc {
|
|||
const struct nvkm_vmm_desc_func *func;
|
||||
};
|
||||
|
||||
extern const struct nvkm_vmm_desc nv50_vmm_desc_12[];
|
||||
extern const struct nvkm_vmm_desc nv50_vmm_desc_16[];
|
||||
|
||||
extern const struct nvkm_vmm_desc gk104_vmm_desc_16_12[];
|
||||
extern const struct nvkm_vmm_desc gk104_vmm_desc_16_16[];
|
||||
extern const struct nvkm_vmm_desc gk104_vmm_desc_17_12[];
|
||||
|
@ -169,6 +172,11 @@ int nv04_vmm_new_(const struct nvkm_vmm_func *, struct nvkm_mmu *, u32,
|
|||
const char *, struct nvkm_vmm **);
|
||||
int nv04_vmm_valid(struct nvkm_vmm *, void *, u32, struct nvkm_vmm_map *);
|
||||
|
||||
int nv50_vmm_join(struct nvkm_vmm *, struct nvkm_memory *);
|
||||
void nv50_vmm_part(struct nvkm_vmm *, struct nvkm_memory *);
|
||||
int nv50_vmm_valid(struct nvkm_vmm *, void *, u32, struct nvkm_vmm_map *);
|
||||
void nv50_vmm_flush(struct nvkm_vmm *, int);
|
||||
|
||||
int gf100_vmm_new_(const struct nvkm_vmm_func *, const struct nvkm_vmm_func *,
|
||||
struct nvkm_mmu *, u64, u64, void *, u32,
|
||||
struct lock_class_key *, const char *, struct nvkm_vmm **);
|
||||
|
@ -200,6 +208,8 @@ int nv44_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32,
|
|||
struct lock_class_key *, const char *, struct nvkm_vmm **);
|
||||
int nv50_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32,
|
||||
struct lock_class_key *, const char *, struct nvkm_vmm **);
|
||||
int mcp77_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32,
|
||||
struct lock_class_key *, const char *, struct nvkm_vmm **);
|
||||
int g84_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32,
|
||||
struct lock_class_key *, const char *, struct nvkm_vmm **);
|
||||
int gf100_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32,
|
||||
|
|
45
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.c
Normal file
45
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.c
Normal file
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* Copyright 2017 Red Hat Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
#include "vmm.h"
|
||||
|
||||
static const struct nvkm_vmm_func
|
||||
mcp77_vmm = {
|
||||
.join = nv50_vmm_join,
|
||||
.part = nv50_vmm_part,
|
||||
.valid = nv50_vmm_valid,
|
||||
.flush = nv50_vmm_flush,
|
||||
.page_block = 1 << 29,
|
||||
.page = {
|
||||
{ 16, &nv50_vmm_desc_16[0], NVKM_VMM_PAGE_xVxx },
|
||||
{ 12, &nv50_vmm_desc_12[0], NVKM_VMM_PAGE_xVHx },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
int
|
||||
mcp77_vmm_new(struct nvkm_mmu *mmu, u64 addr, u64 size, void *argv, u32 argc,
|
||||
struct lock_class_key *key, const char *name,
|
||||
struct nvkm_vmm **pvmm)
|
||||
{
|
||||
return nv04_vmm_new_(&mcp77_vmm, mmu, 0, addr, size,
|
||||
argv, argc, key, name, pvmm);
|
||||
}
|
|
@ -32,7 +32,7 @@ static inline void
|
|||
nv50_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
|
||||
u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr)
|
||||
{
|
||||
u64 next = addr | map->type, data;
|
||||
u64 next = addr + map->type, data;
|
||||
u32 pten;
|
||||
int log2blk;
|
||||
|
||||
|
@ -69,7 +69,7 @@ nv50_vmm_pgt_dma(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
|
|||
VMM_SPAM(vmm, "DMAA %08x %08x PTE(s)", ptei, ptes);
|
||||
nvkm_kmap(pt->memory);
|
||||
while (ptes--) {
|
||||
const u64 data = *map->dma++ | map->type;
|
||||
const u64 data = *map->dma++ + map->type;
|
||||
VMM_WO064(pt, vmm, ptei++ * 8, data);
|
||||
map->type += map->ctag;
|
||||
}
|
||||
|
@ -163,21 +163,21 @@ nv50_vmm_pgd = {
|
|||
.pde = nv50_vmm_pgd_pde,
|
||||
};
|
||||
|
||||
static const struct nvkm_vmm_desc
|
||||
const struct nvkm_vmm_desc
|
||||
nv50_vmm_desc_12[] = {
|
||||
{ PGT, 17, 8, 0x1000, &nv50_vmm_pgt },
|
||||
{ PGD, 11, 0, 0x0000, &nv50_vmm_pgd },
|
||||
{}
|
||||
};
|
||||
|
||||
static const struct nvkm_vmm_desc
|
||||
const struct nvkm_vmm_desc
|
||||
nv50_vmm_desc_16[] = {
|
||||
{ PGT, 13, 8, 0x1000, &nv50_vmm_pgt },
|
||||
{ PGD, 11, 0, 0x0000, &nv50_vmm_pgd },
|
||||
{}
|
||||
};
|
||||
|
||||
static void
|
||||
void
|
||||
nv50_vmm_flush(struct nvkm_vmm *vmm, int level)
|
||||
{
|
||||
struct nvkm_subdev *subdev = &vmm->mmu->subdev;
|
||||
|
@ -223,7 +223,7 @@ nv50_vmm_flush(struct nvkm_vmm *vmm, int level)
|
|||
mutex_unlock(&subdev->mutex);
|
||||
}
|
||||
|
||||
static int
|
||||
int
|
||||
nv50_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc,
|
||||
struct nvkm_vmm_map *map)
|
||||
{
|
||||
|
@ -321,7 +321,7 @@ nv50_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
void
|
||||
nv50_vmm_part(struct nvkm_vmm *vmm, struct nvkm_memory *inst)
|
||||
{
|
||||
struct nvkm_vmm_join *join;
|
||||
|
@ -335,7 +335,7 @@ nv50_vmm_part(struct nvkm_vmm *vmm, struct nvkm_memory *inst)
|
|||
}
|
||||
}
|
||||
|
||||
static int
|
||||
int
|
||||
nv50_vmm_join(struct nvkm_vmm *vmm, struct nvkm_memory *inst)
|
||||
{
|
||||
const u32 pd_offset = vmm->mmu->func->vmm.pd_offset;
|
||||
|
|
Loading…
Reference in a new issue