This is the 5.4.67 stable release
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] - drivers/gpu/drm/imx/dw_hdmi-imx.c - drivers/gpu/drm/imx/imx-ldb.c - drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c Port changes from upstream commit [1a27987101
], which extends component lifetime by moving drm structures allocation/free from bind() to probe(). - drivers/gpu/drm/imx/imx-ldb.c Merge patch [1752ab50e8
] from upstream to disable both LVDS channels when Enoder is disabled - drivers/mmc/host/sdhci-esdhc-imx.c Fix merge fuzz produced by [6534c897fd
]. - drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c Commitd1a00c9bb1
from upstream solves the issue with improper error reporting when qdisc type support is absent. Upstream version is merged into NXP implementation. - drivers/net/ethernet/freescale/enetc/enetc.c Commit [ce06fcb6a6
] from upstream merged, base NXP version kept - drivers/net/ethernet/freescale/enetc/enetc_pf.c Commit [e8b86b4d87
] from upstream solves the kernel panic in case if probing fails. NXP has a clean-up logic implemented different, where the MDIO remove would be invoked in any failure case. Keep the NXP logic in place. - drivers/thermal/imx_thermal.c Upstream patch [9025a5589c
] adds missing of_node_put call, NXP version has been adapted to accommodate this patch into the code. - drivers/usb/cdns3/ep0.c Manual merge of commit [be8df02707
] from upstream to protect cdns3_check_new_setup - drivers/xen/swiotlb-xen.c Port upstream commitcca58a1669
to NXP tree, manual hunk was resolved during merge. - sound/soc/fsl/fsl_esai.c Commit [53057bd4ac
] upstream addresses the problem of endless isr in case if exception interrupt is enabled and tasklet is scheduled. Since NXP implementation has tasklet removed with commit [2bbe95fe6c
], upstream fix does not match the main implementation, hence we keep the NXP version here. - sound/soc/fsl/fsl_sai.c Apply patch [b8ae2bf5cc
] from upstream, which uses FIFO watermark mask macro. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
commit
ee7b6ad15b
|
@ -1566,7 +1566,8 @@ What: /sys/bus/iio/devices/iio:deviceX/in_concentrationX_voc_raw
|
|||
KernelVersion: 4.3
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Raw (unscaled no offset etc.) percentage reading of a substance.
|
||||
Raw (unscaled no offset etc.) reading of a substance. Units
|
||||
after application of scale and offset are percents.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_resistance_raw
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_resistanceX_raw
|
||||
|
|
|
@ -16,6 +16,9 @@ Required properties:
|
|||
Documentation/devicetree/bindings/graph.txt. This port should be connected
|
||||
to the input port of an attached HDMI or LVDS encoder chip.
|
||||
|
||||
Optional properties:
|
||||
- pinctrl-names: Contain "default" and "sleep".
|
||||
|
||||
Example:
|
||||
|
||||
dpi0: dpi@1401d000 {
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||||
|
@ -26,6 +29,9 @@ dpi0: dpi@1401d000 {
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|||
<&mmsys CLK_MM_DPI_ENGINE>,
|
||||
<&apmixedsys CLK_APMIXED_TVDPLL>;
|
||||
clock-names = "pixel", "engine", "pll";
|
||||
pinctrl-names = "default", "sleep";
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pinctrl-0 = <&dpi_pin_func>;
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pinctrl-1 = <&dpi_pin_idle>;
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||||
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||||
port {
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dpi0_out: endpoint {
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|
|
|
@ -21,7 +21,7 @@ controller state. The mux controller state is described in
|
|||
|
||||
Example:
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mux: mux-controller {
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||||
compatible = "mux-gpio";
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||||
compatible = "gpio-mux";
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||||
#mux-control-cells = <0>;
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||||
|
||||
mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
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||||
|
|
|
@ -87,7 +87,7 @@ Example:
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|||
ranges;
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||||
|
||||
/* APU<->RPU0 IPI mailbox controller */
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||||
ipi_mailbox_rpu0: mailbox@ff90400 {
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ipi_mailbox_rpu0: mailbox@ff990400 {
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reg = <0xff990400 0x20>,
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<0xff990420 0x20>,
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<0xff990080 0x20>,
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|
|
|
@ -49,6 +49,8 @@ Optional properties:
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|||
error caused by stop clock(fifo full)
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||||
Valid range = [0:0x7]. if not present, default value is 0.
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||||
applied to compatible "mediatek,mt2701-mmc".
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- resets: Phandle and reset specifier pair to softreset line of MSDC IP.
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||||
- reset-names: Should be "hrst".
|
||||
|
||||
Examples:
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mmc0: mmc@11230000 {
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|
|
|
@ -15,8 +15,15 @@ Required properties:
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|||
- "nvidia,tegra210-sdhci": for Tegra210
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- "nvidia,tegra186-sdhci": for Tegra186
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- "nvidia,tegra194-sdhci": for Tegra194
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||||
- clocks : Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
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One for the module clock and one for the timeout clock.
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||||
For all other Tegra devices, must contain a single entry for
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the module clock. See ../clocks/clock-bindings.txt for details.
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- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
|
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strings 'sdhci' and 'tmclk' to represent the module and
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the timeout clocks, respectively.
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For all other Tegra devices must contain the string 'sdhci'
|
||||
to represent the module clock.
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||||
- resets : Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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||||
|
@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194:
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|||
|
||||
Example:
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||||
sdhci@700b0000 {
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||||
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
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||||
compatible = "nvidia,tegra124-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
|
||||
|
@ -115,3 +122,22 @@ sdhci@700b0000 {
|
|||
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 14>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
|
||||
pinctrl-0 = <&sdmmc1_3v3>;
|
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pinctrl-1 = <&sdmmc1_1v8>;
|
||||
nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
|
||||
nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
|
||||
nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
|
||||
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -89,6 +89,8 @@ Optional properties:
|
|||
from P0 to P1/P2/P3 without delay.
|
||||
- snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check
|
||||
during HS transmit.
|
||||
- snps,parkmode-disable-ss-quirk: when set, all SuperSpeed bus instances in
|
||||
park mode are disabled.
|
||||
- snps,dis_metastability_quirk: when set, disable metastability workaround.
|
||||
CAUTION: use only if you are absolutely sure of it.
|
||||
- snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
|
||||
|
|
|
@ -93,13 +93,15 @@ The Amiga protection flags RWEDRWEDHSPARWED are handled as follows:
|
|||
|
||||
- R maps to r for user, group and others. On directories, R implies x.
|
||||
|
||||
- If both W and D are allowed, w will be set.
|
||||
- W maps to w.
|
||||
|
||||
- E maps to x.
|
||||
|
||||
- H and P are always retained and ignored under Linux.
|
||||
- D is ignored.
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||||
|
||||
- A is always reset when a file is written to.
|
||||
- H, S and P are always retained and ignored under Linux.
|
||||
|
||||
- A is cleared when a file is written to.
|
||||
|
||||
User id and group id will be used unless set[gu]id are given as mount
|
||||
options. Since most of the Amiga file systems are single user systems
|
||||
|
@ -111,11 +113,13 @@ Linux -> Amiga:
|
|||
|
||||
The Linux rwxrwxrwx file mode is handled as follows:
|
||||
|
||||
- r permission will set R for user, group and others.
|
||||
- r permission will allow R for user, group and others.
|
||||
|
||||
- w permission will set W and D for user, group and others.
|
||||
- w permission will allow W for user, group and others.
|
||||
|
||||
- x permission of the user will set E for plain files.
|
||||
- x permission of the user will allow E for plain files.
|
||||
|
||||
- D will be allowed for user, group and others.
|
||||
|
||||
- All other flags (suid, sgid, ...) are ignored and will
|
||||
not be retained.
|
||||
|
|
|
@ -19,6 +19,7 @@ Kernel Build System
|
|||
|
||||
issues
|
||||
reproducible-builds
|
||||
llvm
|
||||
|
||||
.. only:: subproject and html
|
||||
|
||||
|
|
|
@ -262,3 +262,8 @@ KBUILD_BUILD_USER, KBUILD_BUILD_HOST
|
|||
These two variables allow to override the user@host string displayed during
|
||||
boot and in /proc/version. The default value is the output of the commands
|
||||
whoami and host, respectively.
|
||||
|
||||
LLVM
|
||||
----
|
||||
If this variable is set to 1, Kbuild will use Clang and LLVM utilities instead
|
||||
of GCC and GNU binutils to build the kernel.
|
||||
|
|
|
@ -0,0 +1,87 @@
|
|||
==============================
|
||||
Building Linux with Clang/LLVM
|
||||
==============================
|
||||
|
||||
This document covers how to build the Linux kernel with Clang and LLVM
|
||||
utilities.
|
||||
|
||||
About
|
||||
-----
|
||||
|
||||
The Linux kernel has always traditionally been compiled with GNU toolchains
|
||||
such as GCC and binutils. Ongoing work has allowed for `Clang
|
||||
<https://clang.llvm.org/>`_ and `LLVM <https://llvm.org/>`_ utilities to be
|
||||
used as viable substitutes. Distributions such as `Android
|
||||
<https://www.android.com/>`_, `ChromeOS
|
||||
<https://www.chromium.org/chromium-os>`_, and `OpenMandriva
|
||||
<https://www.openmandriva.org/>`_ use Clang built kernels. `LLVM is a
|
||||
collection of toolchain components implemented in terms of C++ objects
|
||||
<https://www.aosabook.org/en/llvm.html>`_. Clang is a front-end to LLVM that
|
||||
supports C and the GNU C extensions required by the kernel, and is pronounced
|
||||
"klang," not "see-lang."
|
||||
|
||||
Clang
|
||||
-----
|
||||
|
||||
The compiler used can be swapped out via `CC=` command line argument to `make`.
|
||||
`CC=` should be set when selecting a config and during a build.
|
||||
|
||||
make CC=clang defconfig
|
||||
|
||||
make CC=clang
|
||||
|
||||
Cross Compiling
|
||||
---------------
|
||||
|
||||
A single Clang compiler binary will typically contain all supported backends,
|
||||
which can help simplify cross compiling.
|
||||
|
||||
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
|
||||
|
||||
`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead
|
||||
`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For
|
||||
example:
|
||||
|
||||
clang --target aarch64-linux-gnu foo.c
|
||||
|
||||
LLVM Utilities
|
||||
--------------
|
||||
|
||||
LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1`
|
||||
to enable them.
|
||||
|
||||
make LLVM=1
|
||||
|
||||
They can be enabled individually. The full list of the parameters:
|
||||
|
||||
make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\
|
||||
OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\
|
||||
READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\
|
||||
HOSTLD=ld.lld
|
||||
|
||||
Currently, the integrated assembler is disabled by default. You can pass
|
||||
`LLVM_IAS=1` to enable it.
|
||||
|
||||
Getting Help
|
||||
------------
|
||||
|
||||
- `Website <https://clangbuiltlinux.github.io/>`_
|
||||
- `Mailing List <https://groups.google.com/forum/#!forum/clang-built-linux>`_: <clang-built-linux@googlegroups.com>
|
||||
- `Issue Tracker <https://github.com/ClangBuiltLinux/linux/issues>`_
|
||||
- IRC: #clangbuiltlinux on chat.freenode.net
|
||||
- `Telegram <https://t.me/ClangBuiltLinux>`_: @ClangBuiltLinux
|
||||
- `Wiki <https://github.com/ClangBuiltLinux/linux/wiki>`_
|
||||
- `Beginner Bugs <https://github.com/ClangBuiltLinux/linux/issues?q=is%3Aopen+is%3Aissue+label%3A%22good+first+issue%22>`_
|
||||
|
||||
Getting LLVM
|
||||
-------------
|
||||
|
||||
- http://releases.llvm.org/download.html
|
||||
- https://github.com/llvm/llvm-project
|
||||
- https://llvm.org/docs/GettingStarted.html
|
||||
- https://llvm.org/docs/CMake.html
|
||||
- https://apt.llvm.org/
|
||||
- https://www.archlinux.org/packages/extra/x86_64/llvm/
|
||||
- https://github.com/ClangBuiltLinux/tc-build
|
||||
- https://github.com/ClangBuiltLinux/linux/wiki/Building-Clang-from-source
|
||||
- https://android.googlesource.com/platform/prebuilts/clang/host/linux-x86/
|
|
@ -4444,9 +4444,11 @@ EOI was received.
|
|||
#define KVM_EXIT_HYPERV_SYNIC 1
|
||||
#define KVM_EXIT_HYPERV_HCALL 2
|
||||
__u32 type;
|
||||
__u32 pad1;
|
||||
union {
|
||||
struct {
|
||||
__u32 msr;
|
||||
__u32 pad2;
|
||||
__u64 control;
|
||||
__u64 evt_page;
|
||||
__u64 msg_page;
|
||||
|
|
|
@ -4028,6 +4028,7 @@ B: https://github.com/ClangBuiltLinux/linux/issues
|
|||
C: irc://chat.freenode.net/clangbuiltlinux
|
||||
S: Supported
|
||||
K: \b(?i:clang|llvm)\b
|
||||
F: Documentation/kbuild/llvm.rst
|
||||
|
||||
CLEANCACHE API
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
|
|
66
Makefile
66
Makefile
|
@ -1,7 +1,7 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 47
|
||||
SUBLEVEL = 67
|
||||
EXTRAVERSION =
|
||||
NAME = Kleptomaniac Octopus
|
||||
|
||||
|
@ -394,8 +394,13 @@ HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
|
|||
HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
|
||||
HOST_LFS_LIBS := $(shell getconf LFS_LIBS 2>/dev/null)
|
||||
|
||||
HOSTCC = gcc
|
||||
HOSTCXX = g++
|
||||
ifneq ($(LLVM),)
|
||||
HOSTCC = clang
|
||||
HOSTCXX = clang++
|
||||
else
|
||||
HOSTCC = gcc
|
||||
HOSTCXX = g++
|
||||
endif
|
||||
KBUILD_HOSTCFLAGS := -Wall -Wmissing-prototypes -Wstrict-prototypes -O2 \
|
||||
-fomit-frame-pointer -std=gnu89 $(HOST_LFS_CFLAGS) \
|
||||
$(HOSTCFLAGS)
|
||||
|
@ -404,16 +409,28 @@ KBUILD_HOSTLDFLAGS := $(HOST_LFS_LDFLAGS) $(HOSTLDFLAGS)
|
|||
KBUILD_HOSTLDLIBS := $(HOST_LFS_LIBS) $(HOSTLDLIBS)
|
||||
|
||||
# Make variables (CC, etc...)
|
||||
AS = $(CROSS_COMPILE)as
|
||||
LD = $(CROSS_COMPILE)ld
|
||||
CC = $(CROSS_COMPILE)gcc
|
||||
CPP = $(CC) -E
|
||||
ifneq ($(LLVM),)
|
||||
CC = clang
|
||||
LD = ld.lld
|
||||
AR = llvm-ar
|
||||
NM = llvm-nm
|
||||
OBJCOPY = llvm-objcopy
|
||||
OBJDUMP = llvm-objdump
|
||||
READELF = llvm-readelf
|
||||
OBJSIZE = llvm-size
|
||||
STRIP = llvm-strip
|
||||
else
|
||||
CC = $(CROSS_COMPILE)gcc
|
||||
LD = $(CROSS_COMPILE)ld
|
||||
AR = $(CROSS_COMPILE)ar
|
||||
NM = $(CROSS_COMPILE)nm
|
||||
STRIP = $(CROSS_COMPILE)strip
|
||||
OBJCOPY = $(CROSS_COMPILE)objcopy
|
||||
OBJDUMP = $(CROSS_COMPILE)objdump
|
||||
READELF = $(CROSS_COMPILE)readelf
|
||||
OBJSIZE = $(CROSS_COMPILE)size
|
||||
STRIP = $(CROSS_COMPILE)strip
|
||||
endif
|
||||
PAHOLE = pahole
|
||||
LEX = flex
|
||||
YACC = bison
|
||||
|
@ -422,10 +439,15 @@ INSTALLKERNEL := installkernel
|
|||
DEPMOD = /sbin/depmod
|
||||
PERL = perl
|
||||
PYTHON = python
|
||||
PYTHON2 = python2
|
||||
PYTHON3 = python3
|
||||
CHECK = sparse
|
||||
BASH = bash
|
||||
KGZIP = gzip
|
||||
KBZIP2 = bzip2
|
||||
KLZOP = lzop
|
||||
LZMA = lzma
|
||||
LZ4 = lz4c
|
||||
XZ = xz
|
||||
|
||||
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
|
||||
-Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
|
||||
|
@ -471,9 +493,10 @@ KBUILD_LDFLAGS :=
|
|||
GCC_PLUGINS_CFLAGS :=
|
||||
CLANG_FLAGS :=
|
||||
|
||||
export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC
|
||||
export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE PAHOLE LEX YACC AWK INSTALLKERNEL
|
||||
export PERL PYTHON PYTHON2 PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
|
||||
export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
|
||||
export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE READELF PAHOLE LEX YACC AWK INSTALLKERNEL
|
||||
export PERL PYTHON PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
|
||||
export KGZIP KBZIP2 KLZOP LZMA LZ4 XZ
|
||||
export KBUILD_HOSTCXXFLAGS KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS LDFLAGS_MODULE
|
||||
|
||||
export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS KBUILD_LDFLAGS
|
||||
|
@ -528,13 +551,13 @@ ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),)
|
|||
ifneq ($(CROSS_COMPILE),)
|
||||
CLANG_FLAGS += --target=$(notdir $(CROSS_COMPILE:%-=%))
|
||||
GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit))
|
||||
CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)
|
||||
CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)$(notdir $(CROSS_COMPILE))
|
||||
GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)
|
||||
endif
|
||||
ifneq ($(GCC_TOOLCHAIN),)
|
||||
CLANG_FLAGS += --gcc-toolchain=$(GCC_TOOLCHAIN)
|
||||
endif
|
||||
ifeq ($(shell $(AS) --version 2>&1 | head -n 1 | grep clang),)
|
||||
ifneq ($(LLVM_IAS),1)
|
||||
CLANG_FLAGS += -no-integrated-as
|
||||
endif
|
||||
CLANG_FLAGS += -Werror=unknown-warning-option
|
||||
|
@ -587,12 +610,8 @@ KBUILD_MODULES :=
|
|||
KBUILD_BUILTIN := 1
|
||||
|
||||
# If we have only "make modules", don't compile built-in objects.
|
||||
# When we're building modules with modversions, we need to consider
|
||||
# the built-in objects during the descend as well, in order to
|
||||
# make sure the checksums are up to date before we record them.
|
||||
|
||||
ifeq ($(MAKECMDGOALS),modules)
|
||||
KBUILD_BUILTIN := $(if $(CONFIG_MODVERSIONS),1)
|
||||
KBUILD_BUILTIN :=
|
||||
endif
|
||||
|
||||
# If we have "make <whatever> modules", compile modules
|
||||
|
@ -985,10 +1004,10 @@ export mod_strip_cmd
|
|||
mod_compress_cmd = true
|
||||
ifdef CONFIG_MODULE_COMPRESS
|
||||
ifdef CONFIG_MODULE_COMPRESS_GZIP
|
||||
mod_compress_cmd = gzip -n -f
|
||||
mod_compress_cmd = $(KGZIP) -n -f
|
||||
endif # CONFIG_MODULE_COMPRESS_GZIP
|
||||
ifdef CONFIG_MODULE_COMPRESS_XZ
|
||||
mod_compress_cmd = xz -f
|
||||
mod_compress_cmd = $(XZ) -f
|
||||
endif # CONFIG_MODULE_COMPRESS_XZ
|
||||
endif # CONFIG_MODULE_COMPRESS
|
||||
export mod_compress_cmd
|
||||
|
@ -1282,6 +1301,13 @@ ifdef CONFIG_MODULES
|
|||
|
||||
all: modules
|
||||
|
||||
# When we're building modules with modversions, we need to consider
|
||||
# the built-in objects during the descend as well, in order to
|
||||
# make sure the checksums are up to date before we record them.
|
||||
ifdef CONFIG_MODVERSIONS
|
||||
KBUILD_BUILTIN := 1
|
||||
endif
|
||||
|
||||
# Build modules
|
||||
#
|
||||
# A module can be listed more than once in obj-m resulting in
|
||||
|
|
|
@ -36,7 +36,6 @@ CONFIG_BLK_DEV_CY82C693=y
|
|||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_SCSI_AIC7XXX=m
|
||||
CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
|
||||
# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
|
||||
|
|
|
@ -322,14 +322,18 @@ static inline int __is_mmio(const volatile void __iomem *addr)
|
|||
#if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
|
||||
extern inline unsigned int ioread8(void __iomem *addr)
|
||||
{
|
||||
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern inline unsigned int ioread16(void __iomem *addr)
|
||||
{
|
||||
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
@ -370,7 +374,9 @@ extern inline void outw(u16 b, unsigned long port)
|
|||
#if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
|
||||
extern inline unsigned int ioread32(void __iomem *addr)
|
||||
{
|
||||
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
@ -415,14 +421,18 @@ extern inline void __raw_writew(u16 b, volatile void __iomem *addr)
|
|||
|
||||
extern inline u8 readb(const volatile void __iomem *addr)
|
||||
{
|
||||
u8 ret = __raw_readb(addr);
|
||||
u8 ret;
|
||||
mb();
|
||||
ret = __raw_readb(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern inline u16 readw(const volatile void __iomem *addr)
|
||||
{
|
||||
u16 ret = __raw_readw(addr);
|
||||
u16 ret;
|
||||
mb();
|
||||
ret = __raw_readw(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
@ -463,14 +473,18 @@ extern inline void __raw_writeq(u64 b, volatile void __iomem *addr)
|
|||
|
||||
extern inline u32 readl(const volatile void __iomem *addr)
|
||||
{
|
||||
u32 ret = __raw_readl(addr);
|
||||
u32 ret;
|
||||
mb();
|
||||
ret = __raw_readl(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern inline u64 readq(const volatile void __iomem *addr)
|
||||
{
|
||||
u64 ret = __raw_readq(addr);
|
||||
u64 ret;
|
||||
mb();
|
||||
ret = __raw_readq(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
@ -488,10 +502,10 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
|
|||
}
|
||||
#endif
|
||||
|
||||
#define ioread16be(p) be16_to_cpu(ioread16(p))
|
||||
#define ioread32be(p) be32_to_cpu(ioread32(p))
|
||||
#define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p))
|
||||
#define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p))
|
||||
#define ioread16be(p) swab16(ioread16(p))
|
||||
#define ioread32be(p) swab32(ioread32(p))
|
||||
#define iowrite16be(v,p) iowrite16(swab16(v), (p))
|
||||
#define iowrite32be(v,p) iowrite32(swab32(v), (p))
|
||||
|
||||
#define inb_p inb
|
||||
#define inw_p inw
|
||||
|
@ -499,14 +513,44 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
|
|||
#define outb_p outb
|
||||
#define outw_p outw
|
||||
#define outl_p outl
|
||||
#define readb_relaxed(addr) __raw_readb(addr)
|
||||
#define readw_relaxed(addr) __raw_readw(addr)
|
||||
#define readl_relaxed(addr) __raw_readl(addr)
|
||||
#define readq_relaxed(addr) __raw_readq(addr)
|
||||
#define writeb_relaxed(b, addr) __raw_writeb(b, addr)
|
||||
#define writew_relaxed(b, addr) __raw_writew(b, addr)
|
||||
#define writel_relaxed(b, addr) __raw_writel(b, addr)
|
||||
#define writeq_relaxed(b, addr) __raw_writeq(b, addr)
|
||||
|
||||
extern u8 readb_relaxed(const volatile void __iomem *addr);
|
||||
extern u16 readw_relaxed(const volatile void __iomem *addr);
|
||||
extern u32 readl_relaxed(const volatile void __iomem *addr);
|
||||
extern u64 readq_relaxed(const volatile void __iomem *addr);
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
|
||||
extern inline u8 readb_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readb(addr);
|
||||
}
|
||||
|
||||
extern inline u16 readw_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readw(addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
|
||||
extern inline u32 readl_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readl(addr);
|
||||
}
|
||||
|
||||
extern inline u64 readq_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readq(addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
#define writeb_relaxed writeb
|
||||
#define writew_relaxed writew
|
||||
#define writel_relaxed writel
|
||||
#define writeq_relaxed writeq
|
||||
|
||||
/*
|
||||
* String version of IO memory access ops:
|
||||
|
|
|
@ -16,21 +16,27 @@
|
|||
unsigned int
|
||||
ioread8(void __iomem *addr)
|
||||
{
|
||||
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
unsigned int ioread16(void __iomem *addr)
|
||||
{
|
||||
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
unsigned int ioread32(void __iomem *addr)
|
||||
{
|
||||
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
@ -148,28 +154,36 @@ EXPORT_SYMBOL(__raw_writeq);
|
|||
|
||||
u8 readb(const volatile void __iomem *addr)
|
||||
{
|
||||
u8 ret = __raw_readb(addr);
|
||||
u8 ret;
|
||||
mb();
|
||||
ret = __raw_readb(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
u16 readw(const volatile void __iomem *addr)
|
||||
{
|
||||
u16 ret = __raw_readw(addr);
|
||||
u16 ret;
|
||||
mb();
|
||||
ret = __raw_readw(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
u32 readl(const volatile void __iomem *addr)
|
||||
{
|
||||
u32 ret = __raw_readl(addr);
|
||||
u32 ret;
|
||||
mb();
|
||||
ret = __raw_readl(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
u64 readq(const volatile void __iomem *addr)
|
||||
{
|
||||
u64 ret = __raw_readq(addr);
|
||||
u64 ret;
|
||||
mb();
|
||||
ret = __raw_readq(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
@ -207,6 +221,38 @@ EXPORT_SYMBOL(writew);
|
|||
EXPORT_SYMBOL(writel);
|
||||
EXPORT_SYMBOL(writeq);
|
||||
|
||||
/*
|
||||
* The _relaxed functions must be ordered w.r.t. each other, but they don't
|
||||
* have to be ordered w.r.t. other memory accesses.
|
||||
*/
|
||||
u8 readb_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readb(addr);
|
||||
}
|
||||
|
||||
u16 readw_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readw(addr);
|
||||
}
|
||||
|
||||
u32 readl_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readl(addr);
|
||||
}
|
||||
|
||||
u64 readq_relaxed(const volatile void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
return __raw_readq(addr);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(readb_relaxed);
|
||||
EXPORT_SYMBOL(readw_relaxed);
|
||||
EXPORT_SYMBOL(readl_relaxed);
|
||||
EXPORT_SYMBOL(readq_relaxed);
|
||||
|
||||
/*
|
||||
* Read COUNT 8-bit bytes from port PORT into memory starting at SRC.
|
||||
|
|
|
@ -88,6 +88,8 @@
|
|||
|
||||
arcpct: pct {
|
||||
compatible = "snps,archs-pct";
|
||||
interrupt-parent = <&cpu_intc>;
|
||||
interrupts = <20>;
|
||||
};
|
||||
|
||||
/* TIMER0 with interrupt for clockevent */
|
||||
|
@ -208,7 +210,7 @@
|
|||
reg = <0x8000 0x2000>;
|
||||
interrupts = <10>;
|
||||
interrupt-names = "macirq";
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-id";
|
||||
snps,pbl = <32>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
clocks = <&gmacclk>;
|
||||
|
@ -226,7 +228,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
#define R_ARC_32_PCREL 0x31
|
||||
|
||||
/*to set parameters in the core dumps */
|
||||
#define ELF_ARCH EM_ARCOMPACT
|
||||
#define ELF_ARCH EM_ARC_INUSE
|
||||
#define ELF_CLASS ELFCLASS32
|
||||
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
|
|
|
@ -153,7 +153,6 @@ END(EV_Extension)
|
|||
tracesys:
|
||||
; save EFA in case tracer wants the PC of traced task
|
||||
; using ERET won't work since next-PC has already committed
|
||||
lr r12, [efa]
|
||||
GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11
|
||||
st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address
|
||||
|
||||
|
@ -196,15 +195,9 @@ tracesys_exit:
|
|||
; Breakpoint TRAP
|
||||
; ---------------------------------------------
|
||||
trap_with_param:
|
||||
|
||||
; stop_pc info by gdb needs this info
|
||||
lr r0, [efa]
|
||||
mov r0, r12 ; EFA in case ptracer/gdb wants stop_pc
|
||||
mov r1, sp
|
||||
|
||||
; Now that we have read EFA, it is safe to do "fake" rtie
|
||||
; and get out of CPU exception mode
|
||||
FAKE_RET_FROM_EXCPN
|
||||
|
||||
; Save callee regs in case gdb wants to have a look
|
||||
; SP will grow up by size of CALLEE Reg-File
|
||||
; NOTE: clobbers r12
|
||||
|
@ -231,6 +224,10 @@ ENTRY(EV_Trap)
|
|||
|
||||
EXCEPTION_PROLOGUE
|
||||
|
||||
lr r12, [efa]
|
||||
|
||||
FAKE_RET_FROM_EXCPN
|
||||
|
||||
;============ TRAP 1 :breakpoints
|
||||
; Check ECR for trap with arg (PROLOGUE ensures r10 has ECR)
|
||||
bmsk.f 0, r10, 7
|
||||
|
@ -238,9 +235,6 @@ ENTRY(EV_Trap)
|
|||
|
||||
;============ TRAP (no param): syscall top level
|
||||
|
||||
; First return from Exception to pure K mode (Exception/IRQs renabled)
|
||||
FAKE_RET_FROM_EXCPN
|
||||
|
||||
; If syscall tracing ongoing, invoke pre-post-hooks
|
||||
GET_CURR_THR_INFO_FLAGS r10
|
||||
btst r10, TIF_SYSCALL_TRACE
|
||||
|
|
|
@ -562,7 +562,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
{
|
||||
struct arc_reg_pct_build pct_bcr;
|
||||
struct arc_reg_cc_build cc_bcr;
|
||||
int i, has_interrupts;
|
||||
int i, has_interrupts, irq;
|
||||
int counter_size; /* in bits */
|
||||
|
||||
union cc_name {
|
||||
|
@ -637,13 +637,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
.attr_groups = arc_pmu->attr_groups,
|
||||
};
|
||||
|
||||
if (has_interrupts) {
|
||||
int irq = platform_get_irq(pdev, 0);
|
||||
|
||||
if (irq < 0) {
|
||||
pr_err("Cannot get IRQ number for the platform\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
if (has_interrupts && (irq = platform_get_irq(pdev, 0) >= 0)) {
|
||||
|
||||
arc_pmu->irq = irq;
|
||||
|
||||
|
@ -652,9 +646,9 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
this_cpu_ptr(&arc_pmu_cpu));
|
||||
|
||||
on_each_cpu(arc_cpu_pmu_irq_init, &irq, 1);
|
||||
|
||||
} else
|
||||
} else {
|
||||
arc_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
|
||||
}
|
||||
|
||||
/*
|
||||
* perf parser doesn't really like '-' symbol in events name, so let's
|
||||
|
|
|
@ -33,7 +33,6 @@
|
|||
#define CTOP_AUX_DPC (CTOP_AUX_BASE + 0x02C)
|
||||
#define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)
|
||||
#define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)
|
||||
#define CTOP_AUX_IACK (CTOP_AUX_BASE + 0x088)
|
||||
#define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)
|
||||
#define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)
|
||||
|
||||
|
|
|
@ -56,7 +56,7 @@ trap 'rm -f "$XIPIMAGE.tmp"; exit 1' 1 2 3
|
|||
# substitute the data section by a compressed version
|
||||
$DD if="$XIPIMAGE" count=$data_start iflag=count_bytes of="$XIPIMAGE.tmp"
|
||||
$DD if="$XIPIMAGE" skip=$data_start iflag=skip_bytes |
|
||||
gzip -9 >> "$XIPIMAGE.tmp"
|
||||
$KGZIP -9 >> "$XIPIMAGE.tmp"
|
||||
|
||||
# replace kernel binary
|
||||
mv -f "$XIPIMAGE.tmp" "$XIPIMAGE"
|
||||
|
|
|
@ -88,7 +88,6 @@
|
|||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
@ -1576,8 +1576,9 @@
|
|||
reg-names = "rev";
|
||||
ti,hwmods = "d_can0";
|
||||
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
|
||||
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
|
||||
<&dcan0_fck>;
|
||||
clock-names = "fck", "osc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0xcc000 0x2000>;
|
||||
|
@ -1585,6 +1586,8 @@
|
|||
dcan0: can@0 {
|
||||
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
||||
reg = <0x0 0x2000>;
|
||||
clocks = <&dcan0_fck>;
|
||||
clock-names = "fck";
|
||||
syscon-raminit = <&scm_conf 0x644 0>;
|
||||
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
|
@ -1597,8 +1600,9 @@
|
|||
reg-names = "rev";
|
||||
ti,hwmods = "d_can1";
|
||||
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
|
||||
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
|
||||
<&dcan1_fck>;
|
||||
clock-names = "fck", "osc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0xd0000 0x2000>;
|
||||
|
@ -1606,6 +1610,8 @@
|
|||
dcan1: can@0 {
|
||||
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
||||
reg = <0x0 0x2000>;
|
||||
clocks = <&dcan1_fck>;
|
||||
clock-name = "fck";
|
||||
syscon-raminit = <&scm_conf 0x644 1>;
|
||||
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
|
|
|
@ -339,7 +339,8 @@
|
|||
|
||||
comphy: phy@18300 {
|
||||
compatible = "marvell,armada-380-comphy";
|
||||
reg = <0x18300 0x100>;
|
||||
reg-names = "comphy", "conf";
|
||||
reg = <0x18300 0x100>, <0x18460 4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
|
||||
ahb {
|
||||
usb0: gadget@300000 {
|
||||
atmel,vbus-gpio = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
|
||||
atmel,vbus-gpio = <&pioA PIN_PB11 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usba_vbus>;
|
||||
status = "okay";
|
||||
|
|
|
@ -217,7 +217,7 @@
|
|||
};
|
||||
|
||||
qspi: spi@27200 {
|
||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
||||
compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
|
||||
reg = <0x027200 0x184>,
|
||||
<0x027000 0x124>,
|
||||
<0x11c408 0x004>,
|
||||
|
|
|
@ -257,10 +257,10 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mailbox: mailbox@25000 {
|
||||
mailbox: mailbox@25c00 {
|
||||
compatible = "brcm,iproc-fa2-mbox";
|
||||
reg = <0x25000 0x445>;
|
||||
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x25c00 0x400>;
|
||||
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
|
@ -282,7 +282,7 @@
|
|||
};
|
||||
|
||||
qspi: spi@27200 {
|
||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
||||
compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
|
||||
reg = <0x027200 0x184>,
|
||||
<0x027000 0x124>,
|
||||
<0x11c408 0x004>,
|
||||
|
|
|
@ -488,7 +488,7 @@
|
|||
};
|
||||
|
||||
spi@18029200 {
|
||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
||||
compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
|
||||
reg = <0x18029200 0x184>,
|
||||
<0x18029000 0x124>,
|
||||
<0x1811b408 0x004>,
|
||||
|
|
|
@ -68,7 +68,7 @@
|
|||
|
||||
i2c_cm36651: i2c-gpio-2 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpf0 0 GPIO_ACTIVE_HIGH>, <&gpf0 1 GPIO_ACTIVE_HIGH>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
@ -105,19 +105,16 @@
|
|||
sound-digital {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "tda1997x-audio";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&sound_codec>;
|
||||
simple-audio-card,frame-master = <&sound_codec>;
|
||||
|
||||
simple-audio-card,dai-link@0 {
|
||||
format = "i2s";
|
||||
sound_cpu: simple-audio-card,cpu {
|
||||
sound-dai = <&ssi1>;
|
||||
};
|
||||
|
||||
cpu {
|
||||
sound-dai = <&ssi2>;
|
||||
};
|
||||
|
||||
codec {
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
sound-dai = <&hdmi_receiver>;
|
||||
};
|
||||
sound_codec: simple-audio-card,codec {
|
||||
sound-dai = <&hdmi_receiver>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -384,7 +384,7 @@
|
|||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -396,6 +396,7 @@
|
|||
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070
|
||||
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070
|
||||
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
|
||||
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
@ -576,7 +576,7 @@
|
|||
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
|
||||
<&pcc3 IMX7ULP_CLK_PCTLC>;
|
||||
clock-names = "gpio", "port";
|
||||
gpio-ranges = <&iomuxc1 0 0 32>;
|
||||
gpio-ranges = <&iomuxc1 0 0 20>;
|
||||
};
|
||||
|
||||
gpio_ptd: gpio@40af0000 {
|
||||
|
@ -590,7 +590,7 @@
|
|||
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
|
||||
<&pcc3 IMX7ULP_CLK_PCTLD>;
|
||||
clock-names = "gpio", "port";
|
||||
gpio-ranges = <&iomuxc1 0 32 32>;
|
||||
gpio-ranges = <&iomuxc1 0 32 12>;
|
||||
};
|
||||
|
||||
gpio_pte: gpio@40b00000 {
|
||||
|
@ -604,7 +604,7 @@
|
|||
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
|
||||
<&pcc3 IMX7ULP_CLK_PCTLE>;
|
||||
clock-names = "gpio", "port";
|
||||
gpio-ranges = <&iomuxc1 0 64 32>;
|
||||
gpio-ranges = <&iomuxc1 0 64 16>;
|
||||
};
|
||||
|
||||
gpio_ptf: gpio@40b10000 {
|
||||
|
@ -618,7 +618,7 @@
|
|||
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
|
||||
<&pcc3 IMX7ULP_CLK_PCTLF>;
|
||||
clock-names = "gpio", "port";
|
||||
gpio-ranges = <&iomuxc1 0 96 32>;
|
||||
gpio-ranges = <&iomuxc1 0 96 20>;
|
||||
};
|
||||
|
||||
gpu: gpu@41800000 {
|
||||
|
|
|
@ -51,6 +51,8 @@
|
|||
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
};
|
||||
|
||||
&charger {
|
||||
|
@ -102,35 +104,18 @@
|
|||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
lcd0: display@0 {
|
||||
compatible = "panel-dpi";
|
||||
label = "28";
|
||||
status = "okay";
|
||||
/* default-on; */
|
||||
lcd0: display {
|
||||
/* This isn't the exact LCD, but the timings meet spec */
|
||||
compatible = "logicpd,type28";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_enable_pin>;
|
||||
enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */
|
||||
backlight = <&bl>;
|
||||
enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <9000000>;
|
||||
hactive = <480>;
|
||||
vactive = <272>;
|
||||
hfront-porch = <3>;
|
||||
hback-porch = <2>;
|
||||
hsync-len = <42>;
|
||||
vback-porch = <3>;
|
||||
vfront-porch = <2>;
|
||||
vsync-len = <11>;
|
||||
hsync-active = <1>;
|
||||
vsync-active = <1>;
|
||||
de-active = <1>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
bl: backlight {
|
||||
|
|
|
@ -80,6 +80,8 @@
|
|||
};
|
||||
|
||||
&mcbsp2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -183,7 +183,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0x1550000 0x0 0x10000>,
|
||||
<0x0 0x40000000 0x0 0x40000000>;
|
||||
<0x0 0x40000000 0x0 0x20000000>;
|
||||
reg-names = "QuadSPI", "QuadSPI-memory";
|
||||
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "qspi_en", "qspi";
|
||||
|
@ -759,7 +759,7 @@
|
|||
fsl,tmr-prsc = <2>;
|
||||
fsl,tmr-add = <0xaaaaaaab>;
|
||||
fsl,tmr-fiper1 = <999999995>;
|
||||
fsl,tmr-fiper2 = <99990>;
|
||||
fsl,tmr-fiper2 = <999999995>;
|
||||
fsl,max-adj = <499999999>;
|
||||
fsl,extts-fifo;
|
||||
};
|
||||
|
|
|
@ -13,8 +13,10 @@
|
|||
#interrupt-cells = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spi-max-frequency = <3000000>;
|
||||
spi-max-frequency = <9600000>;
|
||||
spi-cs-high;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
cpcap_adc: adc {
|
||||
compatible = "motorola,mapphone-cpcap-adc";
|
||||
|
|
|
@ -138,6 +138,7 @@
|
|||
mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&phy5>;
|
||||
};
|
||||
|
||||
|
|
|
@ -105,6 +105,14 @@
|
|||
linux,code = <SW_FRONT_PROXIMITY>;
|
||||
linux,can-disable;
|
||||
};
|
||||
|
||||
machine_cover {
|
||||
label = "Machine Cover";
|
||||
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
|
||||
linux,input-type = <EV_SW>;
|
||||
linux,code = <SW_MACHINE_COVER>;
|
||||
linux,can-disable;
|
||||
};
|
||||
};
|
||||
|
||||
isp1707: isp1707 {
|
||||
|
@ -814,10 +822,6 @@
|
|||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
bus-width = <4>;
|
||||
/* For debugging, it is often good idea to remove this GPIO.
|
||||
It means you can remove back cover (to reboot by removing
|
||||
battery) and still use the MMC card. */
|
||||
cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
|
||||
};
|
||||
|
||||
/* most boards use vaux3, only some old versions use vmmc2 instead */
|
||||
|
|
|
@ -139,7 +139,7 @@
|
|||
ethernet@gpmc {
|
||||
reg = <5 0 0xff>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* gpio_44 */
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */
|
||||
|
||||
phy-mode = "mii";
|
||||
|
||||
|
|
|
@ -338,7 +338,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7743",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -348,7 +348,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7743",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -357,7 +357,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7743",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -367,7 +367,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7743",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -376,7 +376,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7743",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -386,7 +386,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7743",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
@ -338,7 +338,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -348,7 +348,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -357,7 +357,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -367,7 +367,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -376,7 +376,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -386,7 +386,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
@ -302,7 +302,7 @@
|
|||
resets = <&cpg 407>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -312,7 +312,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -321,7 +321,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -331,7 +331,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -340,7 +340,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -350,7 +350,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
@ -427,7 +427,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -437,7 +437,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -446,7 +446,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -456,7 +456,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -465,7 +465,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -475,7 +475,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
|
|
@ -350,7 +350,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -360,7 +360,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -369,7 +369,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -379,7 +379,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -388,7 +388,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -398,7 +398,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
@ -407,7 +407,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
@ -339,7 +339,7 @@
|
|||
reg = <0x20>;
|
||||
remote = <&vin1>;
|
||||
|
||||
port {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
@ -399,7 +399,7 @@
|
|||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
default-input = <0>;
|
||||
|
||||
port {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
|
|
@ -336,7 +336,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -346,7 +346,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -355,7 +355,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -365,7 +365,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -374,7 +374,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -384,7 +384,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
@ -393,7 +393,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
@ -290,7 +290,7 @@
|
|||
resets = <&cpg 407>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
@ -300,7 +300,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
@ -309,7 +309,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
@ -319,7 +319,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
@ -328,7 +328,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
@ -338,7 +338,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
@ -454,6 +454,7 @@
|
|||
pinctrl-names = "default";
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
keep-power-in-suspend;
|
||||
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
|
|
|
@ -710,7 +710,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
L2: l2-cache@fffef000 {
|
||||
L2: cache-controller@fffef000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0xfffef000 0x1000>;
|
||||
interrupts = <0 38 0x04>;
|
||||
|
|
|
@ -636,7 +636,7 @@
|
|||
reg = <0xffcfb100 0x80>;
|
||||
};
|
||||
|
||||
L2: l2-cache@fffff000 {
|
||||
L2: cache-controller@fffff000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0xfffff000 0x1000>;
|
||||
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -819,7 +819,7 @@
|
|||
timer3: timer3@ffd00100 {
|
||||
compatible = "snps,dw-apb-timer";
|
||||
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xffd01000 0x100>;
|
||||
reg = <0xffd00100 0x100>;
|
||||
clocks = <&l4_sys_free_clk>;
|
||||
clock-names = "timer";
|
||||
resets = <&rst L4SYSTIMER1_RESET>;
|
||||
|
|
|
@ -91,6 +91,9 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <1000>;
|
||||
|
||||
phy0: ethernet-phy@7 {
|
||||
reg = <7>;
|
||||
};
|
||||
|
|
|
@ -198,7 +198,7 @@
|
|||
default-pool {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x6000000>;
|
||||
alloc-ranges = <0x4a000000 0x6000000>;
|
||||
alloc-ranges = <0x40000000 0x10000000>;
|
||||
reusable;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
|
|
@ -117,7 +117,7 @@
|
|||
default-pool {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x6000000>;
|
||||
alloc-ranges = <0x4a000000 0x6000000>;
|
||||
alloc-ranges = <0x40000000 0x10000000>;
|
||||
reusable;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
|
|
@ -180,7 +180,7 @@
|
|||
default-pool {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x6000000>;
|
||||
alloc-ranges = <0x4a000000 0x6000000>;
|
||||
alloc-ranges = <0x40000000 0x10000000>;
|
||||
reusable;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
pwr_led {
|
||||
label = "bananapi-m2-zero:red:pwr";
|
||||
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
|
||||
gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -16,15 +16,27 @@
|
|||
regulator-type = "voltage";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-min-microvolt = <1108475>;
|
||||
regulator-max-microvolt = <1308475>;
|
||||
regulator-ramp-delay = <50>; /* 4ms */
|
||||
gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
|
||||
gpios-states = <0x1>;
|
||||
states = <1100000 0>, <1300000 1>;
|
||||
states = <1108475 0>, <1308475 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpux>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <®_vdd_cpux>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
cpu-supply = <®_vdd_cpux>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
cpu-supply = <®_vdd_cpux>;
|
||||
};
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
|
||||
nor_flash: flash@0,00000000 {
|
||||
nor_flash: flash@0 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>,
|
||||
<4 0x00000000 0x04000000>;
|
||||
|
@ -41,13 +41,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
psram@1,00000000 {
|
||||
psram@100000000 {
|
||||
compatible = "arm,vexpress-psram", "mtd-ram";
|
||||
reg = <1 0x00000000 0x02000000>;
|
||||
bank-width = <4>;
|
||||
};
|
||||
|
||||
ethernet@2,02000000 {
|
||||
ethernet@202000000 {
|
||||
compatible = "smsc,lan9118", "smsc,lan9115";
|
||||
reg = <2 0x02000000 0x10000>;
|
||||
interrupts = <15>;
|
||||
|
@ -59,14 +59,14 @@
|
|||
vddvario-supply = <&v2m_fixed_3v3>;
|
||||
};
|
||||
|
||||
usb@2,03000000 {
|
||||
usb@203000000 {
|
||||
compatible = "nxp,usb-isp1761";
|
||||
reg = <2 0x03000000 0x20000>;
|
||||
interrupts = <16>;
|
||||
port1-otg;
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -495,7 +495,7 @@
|
|||
};
|
||||
|
||||
ocotp: ocotp@400a5000 {
|
||||
compatible = "fsl,vf610-ocotp";
|
||||
compatible = "fsl,vf610-ocotp", "syscon";
|
||||
reg = <0x400a5000 0x1000>;
|
||||
clocks = <&clks VF610_CLK_OCOTP>;
|
||||
};
|
||||
|
|
|
@ -32,7 +32,6 @@ CONFIG_BLK_DEV_RAM=y
|
|||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=m
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
CONFIG_SCSI_LOGGING=y
|
||||
|
|
|
@ -202,7 +202,6 @@ CONFIG_EEPROM_AT24=y
|
|||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=m
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
CONFIG_CHR_DEV_SCH=m
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
|
|
|
@ -1,8 +1,17 @@
|
|||
#ifndef _ASM_CLOCKSOURCE_H
|
||||
#define _ASM_CLOCKSOURCE_H
|
||||
|
||||
enum vdso_arch_clockmode {
|
||||
/* vdso clocksource not usable */
|
||||
VDSO_CLOCKMODE_NONE,
|
||||
/* vdso clocksource usable */
|
||||
VDSO_CLOCKMODE_ARCHTIMER,
|
||||
VDSO_CLOCKMODE_ARCHTIMER_NOCOMPAT = VDSO_CLOCKMODE_ARCHTIMER,
|
||||
};
|
||||
|
||||
struct arch_clocksource_data {
|
||||
bool vdso_direct; /* Usable for direct VDSO access? */
|
||||
/* Usable for direct VDSO access? */
|
||||
enum vdso_arch_clockmode clock_mode;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
@ -266,7 +266,7 @@ int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
|
|||
|
||||
#define KVM_ARCH_WANT_MMU_NOTIFIER
|
||||
int kvm_unmap_hva_range(struct kvm *kvm,
|
||||
unsigned long start, unsigned long end);
|
||||
unsigned long start, unsigned long end, unsigned flags);
|
||||
int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
|
||||
|
||||
unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
|
||||
|
|
|
@ -5,6 +5,8 @@
|
|||
#ifndef _ASM_ARM_PERCPU_H_
|
||||
#define _ASM_ARM_PERCPU_H_
|
||||
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
/*
|
||||
* Same as asm-generic/percpu.h, except that we store the per cpu offset
|
||||
* in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
|
||||
|
|
|
@ -680,6 +680,12 @@ static void disable_single_step(struct perf_event *bp)
|
|||
arch_install_hw_breakpoint(bp);
|
||||
}
|
||||
|
||||
static int watchpoint_fault_on_uaccess(struct pt_regs *regs,
|
||||
struct arch_hw_breakpoint *info)
|
||||
{
|
||||
return !user_mode(regs) && info->ctrl.privilege == ARM_BREAKPOINT_USER;
|
||||
}
|
||||
|
||||
static void watchpoint_handler(unsigned long addr, unsigned int fsr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
|
@ -739,16 +745,27 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
|
|||
}
|
||||
|
||||
pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
|
||||
|
||||
/*
|
||||
* If we triggered a user watchpoint from a uaccess routine,
|
||||
* then handle the stepping ourselves since userspace really
|
||||
* can't help us with this.
|
||||
*/
|
||||
if (watchpoint_fault_on_uaccess(regs, info))
|
||||
goto step;
|
||||
|
||||
perf_bp_event(wp, regs);
|
||||
|
||||
/*
|
||||
* If no overflow handler is present, insert a temporary
|
||||
* mismatch breakpoint so we can single-step over the
|
||||
* watchpoint trigger.
|
||||
* Defer stepping to the overflow handler if one is installed.
|
||||
* Otherwise, insert a temporary mismatch breakpoint so that
|
||||
* we can single-step over the watchpoint trigger.
|
||||
*/
|
||||
if (is_default_overflow_handler(wp))
|
||||
enable_single_step(wp, instruction_pointer(regs));
|
||||
if (!is_default_overflow_handler(wp))
|
||||
goto unlock;
|
||||
|
||||
step:
|
||||
enable_single_step(wp, instruction_pointer(regs));
|
||||
unlock:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
|
|
@ -22,6 +22,19 @@
|
|||
* A simple function epilogue looks like this:
|
||||
* ldm sp, {fp, sp, pc}
|
||||
*
|
||||
* When compiled with clang, pc and sp are not pushed. A simple function
|
||||
* prologue looks like this when built with clang:
|
||||
*
|
||||
* stmdb {..., fp, lr}
|
||||
* add fp, sp, #x
|
||||
* sub sp, sp, #y
|
||||
*
|
||||
* A simple function epilogue looks like this when built with clang:
|
||||
*
|
||||
* sub sp, fp, #x
|
||||
* ldm {..., fp, pc}
|
||||
*
|
||||
*
|
||||
* Note that with framepointer enabled, even the leaf functions have the same
|
||||
* prologue and epilogue, therefore we can ignore the LR value in this case.
|
||||
*/
|
||||
|
@ -34,6 +47,16 @@ int notrace unwind_frame(struct stackframe *frame)
|
|||
low = frame->sp;
|
||||
high = ALIGN(low, THREAD_SIZE);
|
||||
|
||||
#ifdef CONFIG_CC_IS_CLANG
|
||||
/* check current frame pointer is within bounds */
|
||||
if (fp < low + 4 || fp > high - 4)
|
||||
return -EINVAL;
|
||||
|
||||
frame->sp = frame->fp;
|
||||
frame->fp = *(unsigned long *)(fp);
|
||||
frame->pc = frame->lr;
|
||||
frame->lr = *(unsigned long *)(fp + 4);
|
||||
#else
|
||||
/* check current frame pointer is within bounds */
|
||||
if (fp < low + 12 || fp > high - 4)
|
||||
return -EINVAL;
|
||||
|
@ -42,6 +65,7 @@ int notrace unwind_frame(struct stackframe *frame)
|
|||
frame->fp = *(unsigned long *)(fp - 12);
|
||||
frame->sp = *(unsigned long *)(fp - 8);
|
||||
frame->pc = *(unsigned long *)(fp - 4);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -281,7 +281,7 @@ static bool tk_is_cntvct(const struct timekeeper *tk)
|
|||
if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
|
||||
return false;
|
||||
|
||||
if (!tk->tkr_mono.clock->archdata.vdso_direct)
|
||||
if (tk->tkr_mono.clock->archdata.clock_mode != VDSO_CLOCKMODE_ARCHTIMER)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
|
|
|
@ -592,13 +592,13 @@ static void __init at91_pm_sram_init(void)
|
|||
sram_pool = gen_pool_get(&pdev->dev, NULL);
|
||||
if (!sram_pool) {
|
||||
pr_warn("%s: sram pool unavailable!\n", __func__);
|
||||
return;
|
||||
goto out_put_device;
|
||||
}
|
||||
|
||||
sram_base = gen_pool_alloc(sram_pool, at91_pm_suspend_in_sram_sz);
|
||||
if (!sram_base) {
|
||||
pr_warn("%s: unable to alloc sram!\n", __func__);
|
||||
return;
|
||||
goto out_put_device;
|
||||
}
|
||||
|
||||
sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
|
||||
|
@ -606,12 +606,17 @@ static void __init at91_pm_sram_init(void)
|
|||
at91_pm_suspend_in_sram_sz, false);
|
||||
if (!at91_suspend_sram_fn) {
|
||||
pr_warn("SRAM: Could not map\n");
|
||||
return;
|
||||
goto out_put_device;
|
||||
}
|
||||
|
||||
/* Copy the pm suspend handler to SRAM */
|
||||
at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn,
|
||||
&at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
|
||||
return;
|
||||
|
||||
out_put_device:
|
||||
put_device(&pdev->dev);
|
||||
return;
|
||||
}
|
||||
|
||||
static bool __init at91_is_pm_mode_active(int pm_mode)
|
||||
|
|
|
@ -268,6 +268,10 @@ ENDPROC(at91_backup_mode)
|
|||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
/* Quirk for SAM9X60's PMC */
|
||||
nop
|
||||
nop
|
||||
|
||||
wait_mckrdy
|
||||
|
||||
/* Enable the crystal oscillator */
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30)
|
||||
|
||||
static void __iomem *ns_sram_base_addr __ro_after_init;
|
||||
static bool secure_firmware __ro_after_init;
|
||||
|
||||
/*
|
||||
* The common v7_exit_coherency_flush API could not be used because of the
|
||||
|
@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;
|
|||
static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
|
||||
{
|
||||
unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
|
||||
bool state;
|
||||
|
||||
pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
|
||||
if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
|
||||
cluster >= EXYNOS5420_NR_CLUSTERS)
|
||||
return -EINVAL;
|
||||
|
||||
if (!exynos_cpu_power_state(cpunr)) {
|
||||
exynos_cpu_power_up(cpunr);
|
||||
|
||||
state = exynos_cpu_power_state(cpunr);
|
||||
exynos_cpu_power_up(cpunr);
|
||||
if (!state && secure_firmware) {
|
||||
/*
|
||||
* This assumes the cluster number of the big cores(Cortex A15)
|
||||
* is 0 and the Little cores(Cortex A7) is 1.
|
||||
|
@ -258,6 +260,8 @@ static int __init exynos_mcpm_init(void)
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
secure_firmware = exynos_secure_firmware_available();
|
||||
|
||||
/*
|
||||
* To increase the stability of KFC reset we need to program
|
||||
* the PMU SPARE3 register
|
||||
|
|
|
@ -295,14 +295,14 @@ static int __init imx_suspend_alloc_ocram(
|
|||
if (!ocram_pool) {
|
||||
pr_warn("%s: ocram pool unavailable!\n", __func__);
|
||||
ret = -ENODEV;
|
||||
goto put_node;
|
||||
goto put_device;
|
||||
}
|
||||
|
||||
ocram_base = gen_pool_alloc(ocram_pool, size);
|
||||
if (!ocram_base) {
|
||||
pr_warn("%s: unable to alloc ocram!\n", __func__);
|
||||
ret = -ENOMEM;
|
||||
goto put_node;
|
||||
goto put_device;
|
||||
}
|
||||
|
||||
phys = gen_pool_virt_to_phys(ocram_pool, ocram_base);
|
||||
|
@ -312,6 +312,8 @@ static int __init imx_suspend_alloc_ocram(
|
|||
if (virt_out)
|
||||
*virt_out = virt;
|
||||
|
||||
put_device:
|
||||
put_device(&pdev->dev);
|
||||
put_node:
|
||||
of_node_put(node);
|
||||
|
||||
|
|
|
@ -1066,6 +1066,7 @@ void __init imx6_pm_map_io(void)
|
|||
|
||||
static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
|
||||
{
|
||||
struct device_node *node;
|
||||
struct imx6_cpu_pm_info *pm_info;
|
||||
unsigned long iram_paddr;
|
||||
int i, ret = 0;
|
||||
|
@ -1079,8 +1080,11 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (psci_ops.cpu_suspend)
|
||||
if (psci_ops.cpu_suspend) {
|
||||
/* TODO: seems not needed */
|
||||
/* of_node_put(node); */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* 16KB is allocated for IRAM TLB, but only up 8k is for kernel TLB,
|
||||
|
@ -1226,6 +1230,11 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
|
|||
&imx6_suspend,
|
||||
MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info));
|
||||
|
||||
goto put_node;
|
||||
|
||||
put_node:
|
||||
of_node_put(node);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -4,6 +4,8 @@ menuconfig ARCH_INTEGRATOR
|
|||
depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6
|
||||
select ARM_AMBA
|
||||
select COMMON_CLK_VERSATILE
|
||||
select CMA
|
||||
select DMA_CMA
|
||||
select HAVE_TCM
|
||||
select ICST
|
||||
select MFD_SYSCON
|
||||
|
@ -35,14 +37,13 @@ config INTEGRATOR_IMPD1
|
|||
select ARM_VIC
|
||||
select GPIO_PL061
|
||||
select GPIOLIB
|
||||
select REGULATOR
|
||||
select REGULATOR_FIXED_VOLTAGE
|
||||
help
|
||||
The IM-PD1 is an add-on logic module for the Integrator which
|
||||
allows ARM(R) Ltd PrimeCells to be developed and evaluated.
|
||||
The IM-PD1 can be found on the Integrator/PP2 platform.
|
||||
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called impd1.
|
||||
|
||||
config INTEGRATOR_CM7TDMI
|
||||
bool "Integrator/CM7TDMI core module"
|
||||
depends on ARCH_INTEGRATOR_AP
|
||||
|
|
|
@ -11,14 +11,43 @@
|
|||
|
||||
#include "omap_hwmod.h"
|
||||
#include "omap_device.h"
|
||||
#include "clockdomain.h"
|
||||
#include "powerdomain.h"
|
||||
|
||||
static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev,
|
||||
bool enable)
|
||||
{
|
||||
static struct clockdomain *emu_clkdm;
|
||||
static DEFINE_SPINLOCK(emu_lock);
|
||||
static atomic_t count;
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
|
||||
if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu"))
|
||||
return;
|
||||
|
||||
if (!emu_clkdm) {
|
||||
emu_clkdm = clkdm_lookup("emu_clkdm");
|
||||
if (WARN_ON_ONCE(!emu_clkdm))
|
||||
return;
|
||||
}
|
||||
|
||||
spin_lock(&emu_lock);
|
||||
|
||||
if (enable && (atomic_inc_return(&count) == 1))
|
||||
clkdm_deny_idle(emu_clkdm);
|
||||
else if (!enable && (atomic_dec_return(&count) == 0))
|
||||
clkdm_allow_idle(emu_clkdm);
|
||||
|
||||
spin_unlock(&emu_lock);
|
||||
}
|
||||
|
||||
int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
|
||||
u8 *pwrst)
|
||||
{
|
||||
struct powerdomain *pwrdm;
|
||||
struct omap_device *od;
|
||||
u8 next_pwrst;
|
||||
int ret = 0;
|
||||
|
||||
od = to_omap_device(pdev);
|
||||
if (!od)
|
||||
|
@ -31,13 +60,21 @@ int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
|
|||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (request)
|
||||
if (request) {
|
||||
*pwrst = pwrdm_read_next_pwrst(pwrdm);
|
||||
omap_iommu_dra7_emu_swsup_config(pdev, true);
|
||||
}
|
||||
|
||||
if (*pwrst > PWRDM_POWER_RET)
|
||||
return 0;
|
||||
goto out;
|
||||
|
||||
next_pwrst = request ? PWRDM_POWER_ON : *pwrst;
|
||||
|
||||
return pwrdm_set_next_pwrst(pwrdm, next_pwrst);
|
||||
ret = pwrdm_set_next_pwrst(pwrdm, next_pwrst);
|
||||
|
||||
out:
|
||||
if (!request)
|
||||
omap_iommu_dra7_emu_swsup_config(pdev, false);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -3535,7 +3535,7 @@ static const struct omap_hwmod_reset dra7_reset_quirks[] = {
|
|||
};
|
||||
|
||||
static const struct omap_hwmod_reset omap_reset_quirks[] = {
|
||||
{ .match = "dss", .len = 3, .reset = omap_dss_reset, },
|
||||
{ .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
|
||||
{ .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
|
||||
{ .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
|
||||
{ .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
|
||||
|
|
|
@ -44,6 +44,17 @@ struct pdata_init {
|
|||
static struct of_dev_auxdata omap_auxdata_lookup[];
|
||||
static struct twl4030_gpio_platform_data twl_gpio_auxdata;
|
||||
|
||||
#if IS_ENABLED(CONFIG_OMAP_IOMMU)
|
||||
int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
|
||||
u8 *pwrst);
|
||||
#else
|
||||
static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
|
||||
bool request, u8 *pwrst)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_NOKIA_N8X0
|
||||
static void __init omap2420_n8x0_legacy_init(void)
|
||||
{
|
||||
|
@ -311,16 +322,6 @@ static void __init omap3_pandora_legacy_init(void)
|
|||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
static struct iommu_platform_data omap4_iommu_pdata = {
|
||||
.reset_name = "mmu_cache",
|
||||
.assert_reset = omap_device_assert_hardreset,
|
||||
.deassert_reset = omap_device_deassert_hardreset,
|
||||
.device_enable = omap_device_enable,
|
||||
.device_idle = omap_device_idle,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
|
||||
static struct wkup_m3_platform_data wkup_m3_data = {
|
||||
.reset_name = "wkup_m3",
|
||||
|
@ -336,6 +337,10 @@ static void __init omap5_uevm_legacy_init(void)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_DRA7XX
|
||||
static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = {
|
||||
.set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
|
||||
};
|
||||
|
||||
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
|
||||
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
|
||||
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
|
||||
|
@ -543,10 +548,6 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
|
|||
&wkup_m3_data),
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
|
||||
"4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]),
|
||||
OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000,
|
||||
|
@ -561,6 +562,12 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
|
|||
&dra7_hsmmc_data_mmc2),
|
||||
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
|
||||
&dra7_hsmmc_data_mmc3),
|
||||
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu",
|
||||
&dra7_ipu1_dsp_iommu_pdata),
|
||||
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
|
||||
&dra7_ipu1_dsp_iommu_pdata),
|
||||
OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",
|
||||
&dra7_ipu1_dsp_iommu_pdata),
|
||||
#endif
|
||||
/* Common auxdata */
|
||||
OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
|
||||
|
|
|
@ -49,14 +49,14 @@ static int socfpga_setup_ocram_self_refresh(void)
|
|||
if (!ocram_pool) {
|
||||
pr_warn("%s: ocram pool unavailable!\n", __func__);
|
||||
ret = -ENODEV;
|
||||
goto put_node;
|
||||
goto put_device;
|
||||
}
|
||||
|
||||
ocram_base = gen_pool_alloc(ocram_pool, socfpga_sdram_self_refresh_sz);
|
||||
if (!ocram_base) {
|
||||
pr_warn("%s: unable to alloc ocram!\n", __func__);
|
||||
ret = -ENOMEM;
|
||||
goto put_node;
|
||||
goto put_device;
|
||||
}
|
||||
|
||||
ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
|
||||
|
@ -67,7 +67,7 @@ static int socfpga_setup_ocram_self_refresh(void)
|
|||
if (!suspend_ocram_base) {
|
||||
pr_warn("%s: __arm_ioremap_exec failed!\n", __func__);
|
||||
ret = -ENOMEM;
|
||||
goto put_node;
|
||||
goto put_device;
|
||||
}
|
||||
|
||||
/* Copy the code that puts DDR in self refresh to ocram */
|
||||
|
@ -81,6 +81,8 @@ static int socfpga_setup_ocram_self_refresh(void)
|
|||
if (!socfpga_sdram_self_refresh_in_ocram)
|
||||
ret = -EFAULT;
|
||||
|
||||
put_device:
|
||||
put_device(&pdev->dev);
|
||||
put_node:
|
||||
of_node_put(np);
|
||||
|
||||
|
|
|
@ -106,8 +106,8 @@ static const char * const tegra_dt_board_compat[] = {
|
|||
};
|
||||
|
||||
DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
|
||||
.l2c_aux_val = 0x3c400001,
|
||||
.l2c_aux_mask = 0xc20fc3fe,
|
||||
.l2c_aux_val = 0x3c400000,
|
||||
.l2c_aux_mask = 0xc20fc3ff,
|
||||
.smp = smp_ops(tegra_smp_ops),
|
||||
.map_io = tegra_map_common_io,
|
||||
.init_early = tegra_init_early,
|
||||
|
|
|
@ -5,6 +5,7 @@
|
|||
* VMA_VM_FLAGS
|
||||
* VM_EXEC
|
||||
*/
|
||||
#include <linux/const.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
|
@ -30,7 +31,7 @@
|
|||
* act_mm - get current->active_mm
|
||||
*/
|
||||
.macro act_mm, rd
|
||||
bic \rd, sp, #8128
|
||||
bic \rd, sp, #(THREAD_SIZE - 1) & ~63
|
||||
bic \rd, \rd, #63
|
||||
ldr \rd, [\rd, #TI_TASK]
|
||||
.if (TSK_ACTIVE_MM > IMM12_MASK)
|
||||
|
|
|
@ -146,6 +146,8 @@ zinstall install:
|
|||
PHONY += vdso_install
|
||||
vdso_install:
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
|
||||
$(if $(CONFIG_COMPAT_VDSO), \
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
|
||||
|
||||
# We use MRPROPER_FILES and CLEAN_FILES now
|
||||
archclean:
|
||||
|
|
|
@ -77,7 +77,7 @@
|
|||
method = "smc";
|
||||
};
|
||||
|
||||
intc: intc@fffc1000 {
|
||||
intc: interrupt-controller@fffc1000 {
|
||||
compatible = "arm,gic-400", "arm,cortex-a15-gic";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
|
@ -302,7 +302,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
nand: nand@ffb90000 {
|
||||
nand: nand-controller@ffb90000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "altr,socfpga-denali-nand";
|
||||
|
@ -445,7 +445,7 @@
|
|||
clock-names = "timer";
|
||||
};
|
||||
|
||||
uart0: serial0@ffc02000 {
|
||||
uart0: serial@ffc02000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xffc02000 0x100>;
|
||||
interrupts = <0 108 4>;
|
||||
|
@ -456,7 +456,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial1@ffc02100 {
|
||||
uart1: serial@ffc02100 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xffc02100 0x100>;
|
||||
interrupts = <0 109 4>;
|
||||
|
|
|
@ -1728,18 +1728,18 @@
|
|||
};
|
||||
|
||||
sram: sram@fffc0000 {
|
||||
compatible = "amlogic,meson-axg-sram", "mmio-sram";
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x0 0xfffc0000 0x0 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0xfffc0000 0x20000>;
|
||||
|
||||
cpu_scp_lpri: scp-shmem@13000 {
|
||||
cpu_scp_lpri: scp-sram@13000 {
|
||||
compatible = "amlogic,meson-axg-scp-shmem";
|
||||
reg = <0x13000 0x400>;
|
||||
};
|
||||
|
||||
cpu_scp_hpri: scp-shmem@13400 {
|
||||
cpu_scp_hpri: scp-sram@13400 {
|
||||
compatible = "amlogic,meson-axg-scp-shmem";
|
||||
reg = <0x13400 0x400>;
|
||||
};
|
||||
|
|
|
@ -2381,6 +2381,7 @@
|
|||
dr_mode = "host";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,quirk-frame-length-adjustment;
|
||||
snps,parkmode-disable-ss-quirk;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -345,20 +345,20 @@
|
|||
};
|
||||
|
||||
sram: sram@c8000000 {
|
||||
compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x0 0xc8000000 0x0 0x14000>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0xc8000000 0x14000>;
|
||||
|
||||
cpu_scp_lpri: scp-shmem@0 {
|
||||
compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
|
||||
cpu_scp_lpri: scp-sram@0 {
|
||||
compatible = "amlogic,meson-gxbb-scp-shmem";
|
||||
reg = <0x13000 0x400>;
|
||||
};
|
||||
|
||||
cpu_scp_hpri: scp-shmem@200 {
|
||||
compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
|
||||
cpu_scp_hpri: scp-sram@200 {
|
||||
compatible = "amlogic,meson-gxbb-scp-shmem";
|
||||
reg = <0x13400 0x400>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
#include "meson-gxl-s905x.dtsi"
|
||||
#include "meson-gxl-s805x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
#include "meson-gxl-s905x.dtsi"
|
||||
#include "meson-gxl-s805x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";
|
||||
|
|
|
@ -0,0 +1,24 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2020 BayLibre SAS
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*/
|
||||
|
||||
#include "meson-gxl-s905x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,s805x", "amlogic,meson-gxl";
|
||||
};
|
||||
|
||||
/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
|
||||
&mali {
|
||||
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
|
||||
<&clkc CLKID_MALI_0>,
|
||||
<&clkc CLKID_MALI>; /* Glitch free mux */
|
||||
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
|
||||
<0>, /* Do Nothing */
|
||||
<&clkc CLKID_MALI_0>;
|
||||
assigned-clock-rates = <0>, /* Do Nothing */
|
||||
<666666666>,
|
||||
<0>; /* Do Nothing */
|
||||
};
|
|
@ -288,6 +288,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
&hwrng {
|
||||
clocks = <&clkc CLKID_RNG0>;
|
||||
clock-names = "core";
|
||||
};
|
||||
|
||||
&i2c_A {
|
||||
clocks = <&clkc CLKID_I2C>;
|
||||
};
|
||||
|
|
|
@ -8,7 +8,7 @@
|
|||
gic: interrupt-controller@2c001000 {
|
||||
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <2>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x0 0x2c001000 0 0x1000>,
|
||||
<0x0 0x2c002000 0 0x2000>,
|
||||
|
|
|
@ -8,9 +8,9 @@
|
|||
gic: interrupt-controller@2f000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x2f000000 0x100000>;
|
||||
interrupt-controller;
|
||||
reg = <0x0 0x2f000000 0x0 0x10000>,
|
||||
<0x0 0x2f100000 0x0 0x200000>,
|
||||
|
@ -22,7 +22,7 @@
|
|||
its: its@2f020000 {
|
||||
compatible = "arm,gic-v3-its";
|
||||
msi-controller;
|
||||
reg = <0x0 0x2f020000 0x0 0x20000>;
|
||||
reg = <0x20000 0x20000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -107,51 +107,51 @@
|
|||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 13 &gic 0 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 14 &gic 0 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 15 &gic 0 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 16 &gic 0 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 17 &gic 0 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 18 &gic 0 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 19 &gic 0 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 20 &gic 0 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 21 &gic 0 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 22 &gic 0 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 23 &gic 0 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 24 &gic 0 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 25 &gic 0 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 26 &gic 0 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 27 &gic 0 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 28 &gic 0 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 29 &gic 0 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 30 &gic 0 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 31 &gic 0 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 32 &gic 0 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 33 &gic 0 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 34 &gic 0 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 35 &gic 0 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 36 &gic 0 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 37 &gic 0 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 38 &gic 0 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 39 &gic 0 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 40 &gic 0 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 0 &gic 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 13 &gic 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 14 &gic 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 15 &gic 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 16 &gic 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 17 &gic 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 18 &gic 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 19 &gic 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 20 &gic 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 21 &gic 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 22 &gic 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 23 &gic 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 24 &gic 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 25 &gic 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 26 &gic 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 27 &gic 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 28 &gic 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 29 &gic 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 30 &gic 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 31 &gic 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 32 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 33 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 34 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 35 &gic 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 36 &gic 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 37 &gic 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 38 &gic 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 39 &gic 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 40 &gic 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 41 &gic 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet@2,02000000 {
|
||||
ethernet@202000000 {
|
||||
compatible = "smsc,lan91c111";
|
||||
reg = <2 0x02000000 0x10000>;
|
||||
interrupts = <15>;
|
||||
|
@ -178,7 +178,7 @@
|
|||
clock-output-names = "v2m:refclk32khz";
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -62,35 +62,35 @@
|
|||
<0x0 0x2c02f000 0 0x2000>,
|
||||
<0x0 0x2c04f000 0 0x2000>,
|
||||
<0x0 0x2c06f000 0 0x2000>;
|
||||
#address-cells = <2>;
|
||||
#address-cells = <1>;
|
||||
#interrupt-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
ranges = <0 0 0 0x2c1c0000 0 0x40000>;
|
||||
ranges = <0 0 0x2c1c0000 0x40000>;
|
||||
|
||||
v2m_0: v2m@0 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0 0 0x10000>;
|
||||
reg = <0 0x10000>;
|
||||
};
|
||||
|
||||
v2m@10000 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0x10000 0 0x10000>;
|
||||
reg = <0x10000 0x10000>;
|
||||
};
|
||||
|
||||
v2m@20000 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0x20000 0 0x10000>;
|
||||
reg = <0x20000 0x10000>;
|
||||
};
|
||||
|
||||
v2m@30000 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0x30000 0 0x10000>;
|
||||
reg = <0x30000 0x10000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -519,10 +519,10 @@
|
|||
<0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 2 &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 3 &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 4 &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
|
||||
msi-parent = <&v2m_0>;
|
||||
status = "disabled";
|
||||
iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
|
||||
|
@ -786,19 +786,19 @@
|
|||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 15>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
site2: tlx@60000000 {
|
||||
|
@ -808,6 +808,6 @@
|
|||
ranges = <0 0 0x60000000 0x10000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0>;
|
||||
interrupt-map = <0 0 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -103,7 +103,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
flash@0,00000000 {
|
||||
flash@0 {
|
||||
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>;
|
||||
|
@ -120,7 +120,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
ethernet@2,00000000 {
|
||||
ethernet@200000000 {
|
||||
compatible = "smsc,lan9118", "smsc,lan9115";
|
||||
reg = <2 0x00000000 0x10000>;
|
||||
interrupts = <3>;
|
||||
|
@ -133,7 +133,7 @@
|
|||
vddvario-supply = <&mb_fixed_3v3>;
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
motherboard {
|
||||
arm,v2m-memory-map = "rs2";
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
virtio-p9@140000 {
|
||||
compatible = "virtio,mmio";
|
||||
reg = <0x140000 0x200>;
|
||||
|
|
|
@ -17,14 +17,14 @@
|
|||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
|
||||
flash@0,00000000 {
|
||||
flash@0 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>,
|
||||
<4 0x00000000 0x04000000>;
|
||||
bank-width = <4>;
|
||||
};
|
||||
|
||||
ethernet@2,02000000 {
|
||||
ethernet@202000000 {
|
||||
compatible = "smsc,lan91c111";
|
||||
reg = <2 0x02000000 0x10000>;
|
||||
interrupts = <15>;
|
||||
|
@ -51,7 +51,7 @@
|
|||
clock-output-names = "v2m:refclk32khz";
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -745,7 +745,7 @@
|
|||
};
|
||||
|
||||
qspi: spi@66470200 {
|
||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi";
|
||||
compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
|
||||
reg = <0x66470200 0x184>,
|
||||
<0x66470000 0x124>,
|
||||
<0x67017408 0x004>,
|
||||
|
|
|
@ -157,6 +157,7 @@
|
|||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-enable-ramp-delay = <125>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo8_reg: LDO8 {
|
||||
|
|
|
@ -512,7 +512,7 @@
|
|||
ldo1_reg: LDO1 {
|
||||
regulator-name = "LDO1";
|
||||
regulator-min-microvolt = <1600000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
@ -687,7 +687,7 @@
|
|||
ldo1_reg: LDO1 {
|
||||
regulator-name = "LDO1";
|
||||
regulator-min-microvolt = <1600000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue