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ARM: shmobile: r8a7791: add MSTP10 support on DTSI 

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
hifive-unleashed-5.1
Kuninori Morimoto 2014-06-11 21:44:16 -07:00 committed by Simon Horman
parent 0d3dbde84a
commit ee9141522d
2 changed files with 59 additions and 0 deletions
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33
arch/arm/boot/dts/r8a7791.dtsi
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@ -865,6 +865,39 @@
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
"i2c1", "i2c0";
};
mstp10_clks: mstp10_clks@e6150998 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
clocks = <&p_clk>,
<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
<&p_clk>,
<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
#clock-cells = <1>;
clock-indices = <
R8A7791_CLK_SSI_ALL
R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
R8A7791_CLK_SCU_ALL
R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
>;
clock-output-names =
"ssi-all",
"ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
"ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
"scu-all",
"scu-dvc1", "scu-dvc0",
"scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
"scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
};
mstp11_clks: mstp11_clks@e615099c {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;

26
include/dt-bindings/clock/r8a7791-clock.h
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@ -107,6 +107,32 @@
#define R8A7791_CLK_I2C1 30
#define R8A7791_CLK_I2C0 31
/* MSTP10 */
#define R8A7791_CLK_SSI_ALL 5
#define R8A7791_CLK_SSI9 6
#define R8A7791_CLK_SSI8 7
#define R8A7791_CLK_SSI7 8
#define R8A7791_CLK_SSI6 9
#define R8A7791_CLK_SSI5 10
#define R8A7791_CLK_SSI4 11
#define R8A7791_CLK_SSI3 12
#define R8A7791_CLK_SSI2 13
#define R8A7791_CLK_SSI1 14
#define R8A7791_CLK_SSI0 15
#define R8A7791_CLK_SCU_ALL 17
#define R8A7791_CLK_SCU_DVC1 18
#define R8A7791_CLK_SCU_DVC0 19
#define R8A7791_CLK_SCU_SRC9 22
#define R8A7791_CLK_SCU_SRC8 23
#define R8A7791_CLK_SCU_SRC7 24
#define R8A7791_CLK_SCU_SRC6 25
#define R8A7791_CLK_SCU_SRC5 26
#define R8A7791_CLK_SCU_SRC4 27
#define R8A7791_CLK_SCU_SRC3 28
#define R8A7791_CLK_SCU_SRC2 29
#define R8A7791_CLK_SCU_SRC1 30
#define R8A7791_CLK_SCU_SRC0 31
/* MSTP11 */
#define R8A7791_CLK_SCIFA3 6
#define R8A7791_CLK_SCIFA4 7