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Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and 'clk-debugfs-simple' into clk-next 

* clk-imx7d:
  clk: imx7d: reset parent for mipi csi root
  clk: imx7d: fix mipi dphy div parent

* clk-hisi-stub:
  clk/driver/hisi: Consolidate the Kconfig for the CLOCK_STUB

* clk-mvebu:
  clk: mvebu: use correct bit for 98DX3236 NAND

* clk-imx6-epit:
  clk: imx6: add EPIT clock support

* clk-debugfs-simple:
  clk: Return void from debug_init op
  clk: remove clk_debugfs_add_file()
  clk: tegra: no need to check return value of debugfs_create functions
  clk: davinci: no need to check return value of debugfs_create functions
  clk: bcm2835: no need to check return value of debugfs_create functions
  clk: no need to check return value of debugfs_create functions
hifive-unleashed-5.1
Stephen Boyd 2018-06-04 12:32:28 -07:00
parent fff2e33717 b4f5e1ffcc 7b873e4b5a 00c5a926af b1569380a6 d75d50c016
commit ef1ae47094
11 changed files with 76 additions and 186 deletions
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2
Documentation/clk.txt
View File

@ -96,7 +96,7 @@ the operations defined in clk-provider.h::
int (*get_phase)(struct clk_hw *hw);
int (*set_phase)(struct clk_hw *hw, int degrees);
void (*init)(struct clk_hw *hw);
int (*debug_init)(struct clk_hw *hw,
void (*debug_init)(struct clk_hw *hw,
struct dentry *dentry);
};

29
drivers/clk/bcm/clk-bcm2835.c
View File

@ -394,25 +394,21 @@ out:
return count * 1000;
}
static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
static void bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
struct debugfs_reg32 *regs, size_t nregs,
struct dentry *dentry)
{
struct dentry *regdump;
struct debugfs_regset32 *regset;
regset = devm_kzalloc(cprman->dev, sizeof(*regset), GFP_KERNEL);
if (!regset)
return -ENOMEM;
return;
regset->regs = regs;
regset->nregs = nregs;
regset->base = cprman->regs + base;
regdump = debugfs_create_regset32("regdump", S_IRUGO, dentry,
regset);
return regdump ? 0 : -ENOMEM;
debugfs_create_regset32("regdump", S_IRUGO, dentry, regset);
}
struct bcm2835_pll_data {
@ -730,7 +726,7 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
return 0;
}
static int bcm2835_pll_debug_init(struct clk_hw *hw,
static void bcm2835_pll_debug_init(struct clk_hw *hw,
struct dentry *dentry)
{
struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
@ -740,7 +736,7 @@ static int bcm2835_pll_debug_init(struct clk_hw *hw,
regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
if (!regs)
return -ENOMEM;
return;
regs[0].name = "cm_ctrl";
regs[0].offset = data->cm_ctrl_reg;
@ -757,7 +753,7 @@ static int bcm2835_pll_debug_init(struct clk_hw *hw,
regs[6].name = "ana3";
regs[6].offset = data->ana_reg_base + 3 * 4;
return bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
}
static const struct clk_ops bcm2835_pll_clk_ops = {
@ -861,8 +857,8 @@ static int bcm2835_pll_divider_set_rate(struct clk_hw *hw,
return 0;
}
static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
struct dentry *dentry)
static void bcm2835_pll_divider_debug_init(struct clk_hw *hw,
struct dentry *dentry)
{
struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw);
struct bcm2835_cprman *cprman = divider->cprman;
@ -871,14 +867,14 @@ static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
if (!regs)
return -ENOMEM;
return;
regs[0].name = "cm";
regs[0].offset = data->cm_reg;
regs[1].name = "a2w";
regs[1].offset = data->a2w_reg;
return bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
}
static const struct clk_ops bcm2835_pll_divider_clk_ops = {
@ -1254,15 +1250,14 @@ static struct debugfs_reg32 bcm2835_debugfs_clock_reg32[] = {
},
};
static int bcm2835_clock_debug_init(struct clk_hw *hw,
static void bcm2835_clock_debug_init(struct clk_hw *hw,
struct dentry *dentry)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
return bcm2835_debugfs_regset(
cprman, data->ctl_reg,
bcm2835_debugfs_regset(cprman, data->ctl_reg,
bcm2835_debugfs_clock_reg32,
ARRAY_SIZE(bcm2835_debugfs_clock_reg32),
dentry);

142
drivers/clk/clk.c
View File

@ -2613,81 +2613,31 @@ static int possible_parents_show(struct seq_file *s, void *data)
}
DEFINE_SHOW_ATTRIBUTE(possible_parents);
static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
{
struct dentry *d;
int ret = -ENOMEM;
struct dentry *root;
if (!core || !pdentry) {
ret = -EINVAL;
goto out;
}
if (!core || !pdentry)
return;
d = debugfs_create_dir(core->name, pdentry);
if (!d)
goto out;
root = debugfs_create_dir(core->name, pdentry);
core->dentry = root;
core->dentry = d;
debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
debugfs_create_u32("clk_phase", 0444, root, &core->phase);
debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
d = debugfs_create_ulong("clk_rate", 0444, core->dentry, &core->rate);
if (!d)
goto err_out;
if (core->num_parents > 1)
debugfs_create_file("clk_possible_parents", 0444, root, core,
&possible_parents_fops);
d = debugfs_create_ulong("clk_accuracy", 0444, core->dentry,
&core->accuracy);
if (!d)
goto err_out;
d = debugfs_create_u32("clk_phase", 0444, core->dentry, &core->phase);
if (!d)
goto err_out;
d = debugfs_create_file("clk_flags", 0444, core->dentry, core,
&clk_flags_fops);
if (!d)
goto err_out;
d = debugfs_create_u32("clk_prepare_count", 0444, core->dentry,
&core->prepare_count);
if (!d)
goto err_out;
d = debugfs_create_u32("clk_enable_count", 0444, core->dentry,
&core->enable_count);
if (!d)
goto err_out;
d = debugfs_create_u32("clk_protect_count", 0444, core->dentry,
&core->protect_count);
if (!d)
goto err_out;
d = debugfs_create_u32("clk_notifier_count", 0444, core->dentry,
&core->notifier_count);
if (!d)
goto err_out;
if (core->num_parents > 1) {
d = debugfs_create_file("clk_possible_parents", 0444,
core->dentry, core, &possible_parents_fops);
if (!d)
goto err_out;
}
if (core->ops->debug_init) {
ret = core->ops->debug_init(core->hw, core->dentry);
if (ret)
goto err_out;
}
ret = 0;
goto out;
err_out:
debugfs_remove_recursive(core->dentry);
core->dentry = NULL;
out:
return ret;
if (core->ops->debug_init)
core->ops->debug_init(core->hw, core->dentry);
}
/**
@ -2698,17 +2648,13 @@ out:
* initialized. Otherwise it bails out early since the debugfs clk directory
* will be created lazily by clk_debug_init as part of a late_initcall.
*/
static int clk_debug_register(struct clk_core *core)
static void clk_debug_register(struct clk_core *core)
{
int ret = 0;
mutex_lock(&clk_debug_lock);
hlist_add_head(&core->debug_node, &clk_debug_list);
if (inited)
ret = clk_debug_create_one(core, rootdir);
clk_debug_create_one(core, rootdir);
mutex_unlock(&clk_debug_lock);
return ret;
}
/**
@ -2728,19 +2674,6 @@ static void clk_debug_unregister(struct clk_core *core)
mutex_unlock(&clk_debug_lock);
}
struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
void *data, const struct file_operations *fops)
{
struct dentry *d = NULL;
if (hw->core->dentry)
d = debugfs_create_file(name, mode, hw->core->dentry, data,
fops);
return d;
}
EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
/**
* clk_debug_init - lazily populate the debugfs clk directory
*
@ -2753,32 +2686,17 @@ EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
static int __init clk_debug_init(void)
{
struct clk_core *core;
struct dentry *d;
rootdir = debugfs_create_dir("clk", NULL);
if (!rootdir)
return -ENOMEM;
d = debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
&clk_summary_fops);
if (!d)
return -ENOMEM;
d = debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
&clk_dump_fops);
if (!d)
return -ENOMEM;
d = debugfs_create_file("clk_orphan_summary", 0444, rootdir,
&orphan_list, &clk_summary_fops);
if (!d)
return -ENOMEM;
d = debugfs_create_file("clk_orphan_dump", 0444, rootdir,
&orphan_list, &clk_dump_fops);
if (!d)
return -ENOMEM;
debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
&clk_summary_fops);
debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
&clk_dump_fops);
debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
&clk_summary_fops);
debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
&clk_dump_fops);
mutex_lock(&clk_debug_lock);
hlist_for_each_entry(core, &clk_debug_list, debug_node)
@ -2791,7 +2709,7 @@ static int __init clk_debug_init(void)
}
late_initcall(clk_debug_init);
#else
static inline int clk_debug_register(struct clk_core *core) { return 0; }
static inline void clk_debug_register(struct clk_core *core) { }
static inline void clk_debug_reparent(struct clk_core *core,
struct clk_core *new_parent)
{

15
drivers/clk/davinci/pll.c
View File

@ -190,7 +190,7 @@ static int davinci_pll_set_rate(struct clk_hw *hw, unsigned long rate,
}
#ifdef CONFIG_DEBUG_FS
static int davinci_pll_debug_init(struct clk_hw *hw, struct dentry *dentry);
static void davinci_pll_debug_init(struct clk_hw *hw, struct dentry *dentry);
#else
#define davinci_pll_debug_init NULL
#endif
@ -874,26 +874,19 @@ static const struct debugfs_reg32 davinci_pll_regs[] = {
DEBUG_REG(PLLDIV9),
};
static int davinci_pll_debug_init(struct clk_hw *hw, struct dentry *dentry)
static void davinci_pll_debug_init(struct clk_hw *hw, struct dentry *dentry)
{
struct davinci_pll_clk *pll = to_davinci_pll_clk(hw);
struct debugfs_regset32 *regset;
struct dentry *d;
regset = kzalloc(sizeof(*regset), GFP_KERNEL);
if (!regset)
return -ENOMEM;
return;
regset->regs = davinci_pll_regs;
regset->nregs = ARRAY_SIZE(davinci_pll_regs);
regset->base = pll->base;
d = debugfs_create_regset32("registers", 0400, dentry, regset);
if (IS_ERR(d)) {
kfree(regset);
return PTR_ERR(d);
}
return 0;
debugfs_create_regset32("registers", 0400, dentry, regset);
}
#endif

13
drivers/clk/hisilicon/Kconfig
View File

@ -44,14 +44,17 @@ config RESET_HISI
Build reset controller driver for HiSilicon device chipsets.
config STUB_CLK_HI6220
bool "Hi6220 Stub Clock Driver"
depends on COMMON_CLK_HI6220 && MAILBOX
default ARCH_HISI
bool "Hi6220 Stub Clock Driver" if EXPERT
depends on (COMMON_CLK_HI6220 || COMPILE_TEST)
depends on MAILBOX
default COMMON_CLK_HI6220
help
Build the Hisilicon Hi6220 stub clock driver.
config STUB_CLK_HI3660
bool "Hi3660 Stub Clock Driver"
depends on COMMON_CLK_HI3660 && MAILBOX
bool "Hi3660 Stub Clock Driver" if EXPERT
depends on (COMMON_CLK_HI3660 || COMPILE_TEST)
depends on MAILBOX
default COMMON_CLK_HI3660
help
Build the Hisilicon Hi3660 stub clock driver.

2
drivers/clk/imx/clk-imx6q.c
View File

@ -753,6 +753,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
else
clk[IMX6Q_CLK_ECSPI5] = imx_clk_gate2("ecspi5", "ecspi_root", base + 0x6c, 8);
clk[IMX6QDL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
clk[IMX6QDL_CLK_EPIT1] = imx_clk_gate2("epit1", "ipg", base + 0x6c, 12);
clk[IMX6QDL_CLK_EPIT2] = imx_clk_gate2("epit2", "ipg", base + 0x6c, 14);
clk[IMX6QDL_CLK_ESAI_EXTAL] = imx_clk_gate2_shared("esai_extal", "esai_podf", base + 0x6c, 16, &share_count_esai);
clk[IMX6QDL_CLK_ESAI_IPG] = imx_clk_gate2_shared("esai_ipg", "ahb", base + 0x6c, 16, &share_count_esai);
clk[IMX6QDL_CLK_ESAI_MEM] = imx_clk_gate2_shared("esai_mem", "ahb", base + 0x6c, 16, &share_count_esai);

4
drivers/clk/imx/clk-imx7d.c
View File

@ -731,7 +731,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
clks[IMX7D_LCDIF_PIXEL_ROOT_DIV] = imx_clk_divider2("lcdif_pixel_post_div", "lcdif_pixel_pre_div", base + 0xa300, 0, 6);
clks[IMX7D_MIPI_DSI_ROOT_DIV] = imx_clk_divider2("mipi_dsi_post_div", "mipi_dsi_pre_div", base + 0xa380, 0, 6);
clks[IMX7D_MIPI_CSI_ROOT_DIV] = imx_clk_divider2("mipi_csi_post_div", "mipi_csi_pre_div", base + 0xa400, 0, 6);
clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider2("mipi_dphy_post_div", "mipi_csi_dphy_div", base + 0xa480, 0, 6);
clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider2("mipi_dphy_post_div", "mipi_dphy_pre_div", base + 0xa480, 0, 6);
clks[IMX7D_SAI1_ROOT_DIV] = imx_clk_divider2("sai1_post_div", "sai1_pre_div", base + 0xa500, 0, 6);
clks[IMX7D_SAI2_ROOT_DIV] = imx_clk_divider2("sai2_post_div", "sai2_pre_div", base + 0xa580, 0, 6);
clks[IMX7D_SAI3_ROOT_DIV] = imx_clk_divider2("sai3_post_div", "sai3_pre_div", base + 0xa600, 0, 6);
@ -892,6 +892,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
clk_set_parent(clks[IMX7D_PLL_AUDIO_MAIN_BYPASS], clks[IMX7D_PLL_AUDIO_MAIN]);
clk_set_parent(clks[IMX7D_PLL_VIDEO_MAIN_BYPASS], clks[IMX7D_PLL_VIDEO_MAIN]);
clk_set_parent(clks[IMX7D_MIPI_CSI_ROOT_SRC], clks[IMX7D_PLL_SYS_PFD3_CLK]);
/* use old gpt clk setting, gpt1 root clk must be twice as gpt counter freq */
clk_set_parent(clks[IMX7D_GPT1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);

2
drivers/clk/mvebu/clk-corediv.c
View File

@ -72,7 +72,7 @@ static const struct clk_corediv_desc mvebu_corediv_desc[] = {
};
static const struct clk_corediv_desc mv98dx3236_corediv_desc[] = {
{ .mask = 0x0f, .offset = 6, .fieldbit = 26 }, /* NAND clock */
{ .mask = 0x0f, .offset = 6, .fieldbit = 27 }, /* NAND clock */
};
#define to_corediv_clk(p) container_of(p, struct clk_corediv, hw)

42
drivers/clk/tegra/clk-dfll.c
View File

@ -1196,42 +1196,24 @@ static const struct file_operations attr_registers_fops = {
.release = single_release,
};
static int dfll_debug_init(struct tegra_dfll *td)
static void dfll_debug_init(struct tegra_dfll *td)
{
int ret;
struct dentry *root;
if (!td || (td->mode == DFLL_UNINITIALIZED))
return 0;
return;
td->debugfs_dir = debugfs_create_dir("tegra_dfll_fcpu", NULL);
if (!td->debugfs_dir)
return -ENOMEM;
root = debugfs_create_dir("tegra_dfll_fcpu", NULL);
td->debugfs_dir = root;
ret = -ENOMEM;
if (!debugfs_create_file("enable", S_IRUGO | S_IWUSR,
td->debugfs_dir, td, &enable_fops))
goto err_out;
if (!debugfs_create_file("lock", S_IRUGO,
td->debugfs_dir, td, &lock_fops))
goto err_out;
if (!debugfs_create_file("rate", S_IRUGO,
td->debugfs_dir, td, &rate_fops))
goto err_out;
if (!debugfs_create_file("registers", S_IRUGO,
td->debugfs_dir, td, &attr_registers_fops))
goto err_out;
return 0;
err_out:
debugfs_remove_recursive(td->debugfs_dir);
return ret;
debugfs_create_file("enable", S_IRUGO | S_IWUSR, root, td, &enable_fops);
debugfs_create_file("lock", S_IRUGO, root, td, &lock_fops);
debugfs_create_file("rate", S_IRUGO, root, td, &rate_fops);
debugfs_create_file("registers", S_IRUGO, root, td, &attr_registers_fops);
}
#else
static void inline dfll_debug_init(struct tegra_dfll *td) { }
#endif /* CONFIG_DEBUG_FS */
/*
@ -1715,9 +1697,7 @@ int tegra_dfll_register(struct platform_device *pdev,
return ret;
}
#ifdef CONFIG_DEBUG_FS
dfll_debug_init(td);
#endif
return 0;
}

4
include/dt-bindings/clock/imx6qdl-clock.h
View File

@ -271,6 +271,8 @@
#define IMX6QDL_CLK_PRE_AXI 258
#define IMX6QDL_CLK_MLB_SEL 259
#define IMX6QDL_CLK_MLB_PODF 260
#define IMX6QDL_CLK_END 261
#define IMX6QDL_CLK_EPIT1 261
#define IMX6QDL_CLK_EPIT2 262
#define IMX6QDL_CLK_END 263
#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */

7
include/linux/clk-provider.h
View File

@ -219,7 +219,7 @@ struct clk_ops {
int (*get_phase)(struct clk_hw *hw);
int (*set_phase)(struct clk_hw *hw, int degrees);
void (*init)(struct clk_hw *hw);
int (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
void (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
};
/**
@ -982,10 +982,5 @@ static inline void clk_writel(u32 val, u32 __iomem *reg)
#endif /* platform dependent I/O accessors */
#ifdef CONFIG_DEBUG_FS
struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
void *data, const struct file_operations *fops);
#endif
#endif /* CONFIG_COMMON_CLK */
#endif /* CLK_PROVIDER_H */