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MFD: ti_tscadc: ADC Clock check not required 

ADC is ideally expected to work at a frequency of 3MHz.
The present code had a check, which returned error if the frequency
went below the threshold  value. But since AM335x supports various
working frequencies, this check is not required.
Now the code just uses the internal ADC clock divider to set the ADC
frequency w.r.t the sys clock.

Signed-off-by: Patil, Rachna <rachna@ti.com>
Signed-off-by: Zubair Lutfullah <zubair.lutfullah@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
hifive-unleashed-5.1
Patil, Rachna 2013-07-20 17:27:35 +01:00 committed by Samuel Ortiz
parent ebe38f80b2
commit efe3126afc
2 changed files with 1 additions and 6 deletions
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6
drivers/mfd/ti_am335x_tscadc.c
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@ -197,11 +197,7 @@ static int ti_tscadc_probe(struct platform_device *pdev)
clock_rate = clk_get_rate(clk);
clk_put(clk);
clk_value = clock_rate / ADC_CLK;
if (clk_value < MAX_CLK_DIV) {
dev_err(&pdev->dev, "clock input less than min clock requirement\n");
err = -EINVAL;
goto err_disable_clk;
}
/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
clk_value = clk_value - 1;
tscadc_writel(tscadc, REG_CLKDIV, clk_value);

1
include/linux/mfd/ti_am335x_tscadc.h
View File

@ -114,7 +114,6 @@
#define CNTRLREG_TSCENB BIT(7)
#define ADC_CLK 3000000
#define MAX_CLK_DIV 7
#define TOTAL_STEPS 16
#define TOTAL_CHANNELS 8