net: aquantia: Introduce new device ids and constants
New set of aquantia devices has an upgraded hardware (B1). The hardware interface is identical to B0. The difference will be in firmware which is incompatible with old one. Reorganized and removed duplicate speed and devid definitions Introduced explicit flow control configuration defines Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -65,7 +65,13 @@
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/*#define AQ_CFG_MAC_ADDR_PERMANENT {0x30, 0x0E, 0xE3, 0x12, 0x34, 0x56}*/
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#define AQ_CFG_FC_MODE 3U
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#define AQ_NIC_FC_OFF 0U
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#define AQ_NIC_FC_TX 1U
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#define AQ_NIC_FC_RX 2U
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#define AQ_NIC_FC_FULL 3U
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#define AQ_NIC_FC_AUTO 4U
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#define AQ_CFG_FC_MODE AQ_NIC_FC_FULL
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#define AQ_CFG_SPEED_MSK 0xFFFFU /* 0xFFFFU==auto_neg */
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@ -19,4 +19,38 @@
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#include "aq_cfg.h"
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#include "aq_utils.h"
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#define PCI_VENDOR_ID_AQUANTIA 0x1D6A
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#define AQ_DEVICE_ID_0001 0x0001
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#define AQ_DEVICE_ID_D100 0xD100
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#define AQ_DEVICE_ID_D107 0xD107
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#define AQ_DEVICE_ID_D108 0xD108
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#define AQ_DEVICE_ID_D109 0xD109
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#define AQ_DEVICE_ID_AQC100 0x00B1
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#define AQ_DEVICE_ID_AQC107 0x07B1
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#define AQ_DEVICE_ID_AQC108 0x08B1
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#define AQ_DEVICE_ID_AQC109 0x09B1
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#define AQ_DEVICE_ID_AQC111 0x11B1
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#define AQ_DEVICE_ID_AQC112 0x12B1
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#define AQ_DEVICE_ID_AQC100S 0x80B1
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#define AQ_DEVICE_ID_AQC107S 0x87B1
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#define AQ_DEVICE_ID_AQC108S 0x88B1
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#define AQ_DEVICE_ID_AQC109S 0x89B1
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#define AQ_DEVICE_ID_AQC111S 0x91B1
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#define AQ_DEVICE_ID_AQC112S 0x92B1
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#define AQ_DEVICE_ID_AQC111E 0x51B1
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#define AQ_DEVICE_ID_AQC112E 0x52B1
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#define HW_ATL_NIC_NAME "aQuantia AQtion 10Gbit Network Adapter"
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#define AQ_NIC_RATE_10G BIT(0)
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#define AQ_NIC_RATE_5G BIT(1)
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#define AQ_NIC_RATE_5GSR BIT(2)
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#define AQ_NIC_RATE_2GS BIT(3)
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#define AQ_NIC_RATE_1G BIT(4)
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#define AQ_NIC_RATE_100M BIT(5)
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#endif /* AQ_COMMON_H */
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@ -22,19 +22,6 @@ struct aq_hw_ops;
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struct aq_fw_s;
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struct aq_vec_s;
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#define AQ_NIC_FC_OFF 0U
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#define AQ_NIC_FC_TX 1U
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#define AQ_NIC_FC_RX 2U
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#define AQ_NIC_FC_FULL 3U
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#define AQ_NIC_FC_AUTO 4U
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#define AQ_NIC_RATE_10G BIT(0)
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#define AQ_NIC_RATE_5G BIT(1)
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#define AQ_NIC_RATE_5GSR BIT(2)
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#define AQ_NIC_RATE_2GS BIT(3)
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#define AQ_NIC_RATE_1G BIT(4)
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#define AQ_NIC_RATE_100M BIT(5)
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struct aq_nic_cfg_s {
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const struct aq_hw_caps_s *aq_hw_caps;
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u64 hw_features;
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@ -34,11 +34,29 @@ struct aq_pci_func_s {
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};
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static const struct pci_device_id aq_pci_tbl[] = {
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{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_0001), },
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{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D100), },
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{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D107), },
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{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D108), },
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{ PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D109), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_0001), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D100), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D107), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D108), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D109), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC100), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC107), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC108), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC109), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC100S), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC107S), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC108S), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC109S), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111S), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112S), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111E), },
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{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112E), },
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{}
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};
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@ -25,12 +25,12 @@ static int hw_atl_a0_get_hw_caps(struct aq_hw_s *self,
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{
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memcpy(aq_hw_caps, &hw_atl_a0_hw_caps_, sizeof(*aq_hw_caps));
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if (device == HW_ATL_DEVICE_ID_D108 && subsystem_device == 0x0001)
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aq_hw_caps->link_speed_msk &= ~HW_ATL_A0_RATE_10G;
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if (device == AQ_DEVICE_ID_D108 && subsystem_device == 0x0001)
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aq_hw_caps->link_speed_msk &= ~AQ_NIC_RATE_10G;
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if (device == HW_ATL_DEVICE_ID_D109 && subsystem_device == 0x0001) {
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aq_hw_caps->link_speed_msk &= ~HW_ATL_A0_RATE_10G;
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aq_hw_caps->link_speed_msk &= ~HW_ATL_A0_RATE_5G;
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if (device == AQ_DEVICE_ID_D109 && subsystem_device == 0x0001) {
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aq_hw_caps->link_speed_msk &= ~AQ_NIC_RATE_10G;
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aq_hw_caps->link_speed_msk &= ~AQ_NIC_RATE_5G;
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}
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return 0;
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@ -907,11 +907,11 @@ static const struct aq_hw_ops hw_atl_ops_ = {
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const struct aq_hw_ops *hw_atl_a0_get_ops_by_id(struct pci_dev *pdev)
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{
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bool is_vid_ok = (pdev->vendor == PCI_VENDOR_ID_AQUANTIA);
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bool is_did_ok = ((pdev->device == HW_ATL_DEVICE_ID_0001) ||
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(pdev->device == HW_ATL_DEVICE_ID_D100) ||
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(pdev->device == HW_ATL_DEVICE_ID_D107) ||
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(pdev->device == HW_ATL_DEVICE_ID_D108) ||
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(pdev->device == HW_ATL_DEVICE_ID_D109));
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bool is_did_ok = ((pdev->device == AQ_DEVICE_ID_0001) ||
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(pdev->device == AQ_DEVICE_ID_D100) ||
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(pdev->device == AQ_DEVICE_ID_D107) ||
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(pdev->device == AQ_DEVICE_ID_D108) ||
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(pdev->device == AQ_DEVICE_ID_D109));
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bool is_rev_ok = (pdev->revision == 1U);
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@ -16,19 +16,6 @@
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#include "../aq_common.h"
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#ifndef PCI_VENDOR_ID_AQUANTIA
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#define PCI_VENDOR_ID_AQUANTIA 0x1D6A
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#define HW_ATL_DEVICE_ID_0001 0x0001
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#define HW_ATL_DEVICE_ID_D100 0xD100
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#define HW_ATL_DEVICE_ID_D107 0xD107
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#define HW_ATL_DEVICE_ID_D108 0xD108
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#define HW_ATL_DEVICE_ID_D109 0xD109
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#define HW_ATL_NIC_NAME "aQuantia AQtion 5Gbit Network Adapter"
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#endif
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const struct aq_hw_ops *hw_atl_a0_get_ops_by_id(struct pci_dev *pdev);
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#endif /* HW_ATL_A0_H */
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@ -62,12 +62,6 @@
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#define HW_ATL_A0_MPI_SPEED_MSK 0xFFFFU
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#define HW_ATL_A0_MPI_SPEED_SHIFT 16U
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#define HW_ATL_A0_RATE_10G BIT(0)
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#define HW_ATL_A0_RATE_5G BIT(1)
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#define HW_ATL_A0_RATE_2G5 BIT(3)
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#define HW_ATL_A0_RATE_1G BIT(4)
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#define HW_ATL_A0_RATE_100M BIT(5)
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#define HW_ATL_A0_TXBUF_MAX 160U
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#define HW_ATL_A0_RXBUF_MAX 320U
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@ -111,11 +105,11 @@ static struct aq_hw_caps_s hw_atl_a0_hw_caps_ = {
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NETIF_F_SG |
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NETIF_F_TSO,
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.hw_priv_flags = IFF_UNICAST_FLT,
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.link_speed_msk = (HW_ATL_A0_RATE_10G |
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HW_ATL_A0_RATE_5G |
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HW_ATL_A0_RATE_2G5 |
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HW_ATL_A0_RATE_1G |
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HW_ATL_A0_RATE_100M),
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.link_speed_msk = (AQ_NIC_RATE_10G |
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AQ_NIC_RATE_5G |
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AQ_NIC_RATE_2GS |
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AQ_NIC_RATE_1G |
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AQ_NIC_RATE_100M),
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.flow_control = true,
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.mtu = HW_ATL_A0_MTU_JUMBO,
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.mac_regs_count = 88,
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@ -26,12 +26,12 @@ static int hw_atl_b0_get_hw_caps(struct aq_hw_s *self,
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{
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memcpy(aq_hw_caps, &hw_atl_b0_hw_caps_, sizeof(*aq_hw_caps));
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if (device == HW_ATL_DEVICE_ID_D108 && subsystem_device == 0x0001)
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aq_hw_caps->link_speed_msk &= ~HW_ATL_B0_RATE_10G;
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if (device == AQ_DEVICE_ID_D108 && subsystem_device == 0x0001)
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aq_hw_caps->link_speed_msk &= ~AQ_NIC_RATE_10G;
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if (device == HW_ATL_DEVICE_ID_D109 && subsystem_device == 0x0001) {
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aq_hw_caps->link_speed_msk &= ~HW_ATL_B0_RATE_10G;
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aq_hw_caps->link_speed_msk &= ~HW_ATL_B0_RATE_5G;
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if (device == AQ_DEVICE_ID_D109 && subsystem_device == 0x0001) {
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aq_hw_caps->link_speed_msk &= ~AQ_NIC_RATE_10G;
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aq_hw_caps->link_speed_msk &= ~AQ_NIC_RATE_5G;
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}
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return 0;
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@ -981,11 +981,11 @@ static const struct aq_hw_ops hw_atl_ops_ = {
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const struct aq_hw_ops *hw_atl_b0_get_ops_by_id(struct pci_dev *pdev)
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{
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bool is_vid_ok = (pdev->vendor == PCI_VENDOR_ID_AQUANTIA);
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bool is_did_ok = ((pdev->device == HW_ATL_DEVICE_ID_0001) ||
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(pdev->device == HW_ATL_DEVICE_ID_D100) ||
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(pdev->device == HW_ATL_DEVICE_ID_D107) ||
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(pdev->device == HW_ATL_DEVICE_ID_D108) ||
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(pdev->device == HW_ATL_DEVICE_ID_D109));
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bool is_did_ok = ((pdev->device == AQ_DEVICE_ID_0001) ||
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(pdev->device == AQ_DEVICE_ID_D100) ||
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(pdev->device == AQ_DEVICE_ID_D107) ||
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(pdev->device == AQ_DEVICE_ID_D108) ||
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(pdev->device == AQ_DEVICE_ID_D109));
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bool is_rev_ok = (pdev->revision == 2U);
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@ -16,19 +16,6 @@
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#include "../aq_common.h"
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#ifndef PCI_VENDOR_ID_AQUANTIA
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#define PCI_VENDOR_ID_AQUANTIA 0x1D6A
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#define HW_ATL_DEVICE_ID_0001 0x0001
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#define HW_ATL_DEVICE_ID_D100 0xD100
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#define HW_ATL_DEVICE_ID_D107 0xD107
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#define HW_ATL_DEVICE_ID_D108 0xD108
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#define HW_ATL_DEVICE_ID_D109 0xD109
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#define HW_ATL_NIC_NAME "aQuantia AQtion 5Gbit Network Adapter"
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#endif
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const struct aq_hw_ops *hw_atl_b0_get_ops_by_id(struct pci_dev *pdev);
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#endif /* HW_ATL_B0_H */
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@ -67,12 +67,6 @@
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#define HW_ATL_B0_MPI_SPEED_MSK 0xFFFFU
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#define HW_ATL_B0_MPI_SPEED_SHIFT 16U
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#define HW_ATL_B0_RATE_10G BIT(0)
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#define HW_ATL_B0_RATE_5G BIT(1)
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#define HW_ATL_B0_RATE_2G5 BIT(3)
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#define HW_ATL_B0_RATE_1G BIT(4)
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#define HW_ATL_B0_RATE_100M BIT(5)
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#define HW_ATL_B0_TXBUF_MAX 160U
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#define HW_ATL_B0_RXBUF_MAX 320U
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@ -166,11 +160,11 @@ static struct aq_hw_caps_s hw_atl_b0_hw_caps_ = {
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NETIF_F_TSO |
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NETIF_F_LRO,
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.hw_priv_flags = IFF_UNICAST_FLT,
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.link_speed_msk = (HW_ATL_B0_RATE_10G |
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HW_ATL_B0_RATE_5G |
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HW_ATL_B0_RATE_2G5 |
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HW_ATL_B0_RATE_1G |
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HW_ATL_B0_RATE_100M),
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.link_speed_msk = (AQ_NIC_RATE_10G |
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AQ_NIC_RATE_5G |
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AQ_NIC_RATE_2GS |
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AQ_NIC_RATE_1G |
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AQ_NIC_RATE_100M),
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.flow_control = true,
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.mtu = HW_ATL_B0_MTU_JUMBO,
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.mac_regs_count = 88,
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