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usb: gadget: Add UDC driver for Broadcom USB3.0 device controller IP BDC 

This patch adds a UDC driver for Broadcom's USB3.0 Peripheral core named BDC.
BDC supports control traffic on ep0 and bulk/Int/Isoch traffic on all other
endpoints.

[ balbi@ti.com : fix build error on randconfig due to lack of
	<linux/dmapool.h> ]

Signed-off-by: Ashwini Pahuja <ashwini.linux@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
hifive-unleashed-5.1
Ashwini Pahuja 2014-11-13 10:22:32 -08:00 committed by Felipe Balbi
parent 5ee80705a5
commit efed421a94
14 changed files with 4384 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/usb/gadget/udc/Kconfig
View File

@ -241,6 +241,8 @@ config USB_M66592
dynamically linked module called "m66592_udc" and force all
gadget drivers to also be dynamically linked.
source "drivers/usb/gadget/udc/bdc/Kconfig"
#
# Controllers available only in discrete form (and all PCI controllers)
#

1
drivers/usb/gadget/udc/Makefile
View File

@ -30,3 +30,4 @@ obj-$(CONFIG_USB_FOTG210_UDC) += fotg210-udc.o
obj-$(CONFIG_USB_MV_U3D) += mv_u3d_core.o
obj-$(CONFIG_USB_GR_UDC) += gr_udc.o
obj-$(CONFIG_USB_GADGET_XILINX) += udc-xilinx.o
obj-$(CONFIG_USB_BDC_UDC) += bdc/

21
drivers/usb/gadget/udc/bdc/Kconfig 100644
View File

@ -0,0 +1,21 @@
config USB_BDC_UDC
tristate "Broadcom USB3.0 device controller IP driver(BDC)"
depends on USB_GADGET && HAS_DMA
help
BDC is Broadcom's USB3.0 device controller IP. If your SOC has a BDC IP
then select this driver.
Say "y" here to link the driver statically, or "m" to build a dynamically
linked module called "bdc".
if USB_BDC_UDC
comment "Platform Support"
config USB_BDC_PCI
tristate "BDC support for PCIe based platforms"
depends on PCI
default USB_BDC_UDC
help
Enable support for platforms which have BDC connected through PCIe, such as Lego3 FPGA platform.
endif

8
drivers/usb/gadget/udc/bdc/Makefile 100644
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@ -0,0 +1,8 @@
obj-$(CONFIG_USB_BDC_UDC) += bdc.o
bdc-y := bdc_core.o bdc_cmd.o bdc_ep.o bdc_udc.o
ifneq ($(CONFIG_USB_GADGET_VERBOSE),)
bdc-y += bdc_dbg.o
endif
obj-$(CONFIG_USB_BDC_PCI) += bdc_pci.o

490
drivers/usb/gadget/udc/bdc/bdc.h 100644
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@ -0,0 +1,490 @@
/*
* bdc.h - header for the BRCM BDC USB3.0 device controller
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __LINUX_BDC_H__
#define __LINUX_BDC_H__
#include <linux/kernel.h>
#include <linux/usb.h>
#include <linux/device.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/debugfs.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <asm/unaligned.h>
#define BRCM_BDC_NAME "bdc_usb3"
#define BRCM_BDC_DESC "BDC device controller driver"
#define DMA_ADDR_INVALID (~(dma_addr_t)0)
/* BDC command operation timeout in usec*/
#define BDC_CMD_TIMEOUT 1000
/* BDC controller operation timeout in usec*/
#define BDC_COP_TIMEOUT 500
/*
* Maximum size of ep0 response buffer for ch9 requests,
* the set_sel request uses 6 so far, the max.
*/
#define EP0_RESPONSE_BUFF 6
/* Start with SS as default */
#define EP0_MAX_PKT_SIZE 512
/* 64 entries in a SRR */
#define NUM_SR_ENTRIES 64
/* Num of bds per table */
#define NUM_BDS_PER_TABLE 32
/* Num of tables in bd list for control,bulk and Int ep */
#define NUM_TABLES 2
/* Num of tables in bd list for Isoch ep */
#define NUM_TABLES_ISOCH 6
/* U1 Timeout default: 248usec */
#define U1_TIMEOUT 0xf8
/* Interrupt coalescence in usec */
#define INT_CLS 500
/* Register offsets */
/* Configuration and Capability registers */
#define BDC_BDCCFG0 0x00
#define BDC_BDCCFG1 0x04
#define BDC_BDCCAP0 0x08
#define BDC_BDCCAP1 0x0c
#define BDC_CMDPAR0 0x10
#define BDC_CMDPAR1 0x14
#define BDC_CMDPAR2 0x18
#define BDC_CMDSC 0x1c
#define BDC_USPC 0x20
#define BDC_USPPMS 0x28
#define BDC_USPPM2 0x2c
#define BDC_SPBBAL 0x38
#define BDC_SPBBAH 0x3c
#define BDC_BDCSC 0x40
#define BDC_XSFNTF 0x4c
#define BDC_DVCSA 0x50
#define BDC_DVCSB 0x54
#define BDC_EPSTS0(n) (0x60 + (n * 0x10))
#define BDC_EPSTS1(n) (0x64 + (n * 0x10))
#define BDC_EPSTS2(n) (0x68 + (n * 0x10))
#define BDC_EPSTS3(n) (0x6c + (n * 0x10))
#define BDC_EPSTS4(n) (0x70 + (n * 0x10))
#define BDC_EPSTS5(n) (0x74 + (n * 0x10))
#define BDC_EPSTS6(n) (0x78 + (n * 0x10))
#define BDC_EPSTS7(n) (0x7c + (n * 0x10))
#define BDC_SRRBAL(n) (0x200 + (n * 0x10))
#define BDC_SRRBAH(n) (0x204 + (n * 0x10))
#define BDC_SRRINT(n) (0x208 + (n * 0x10))
#define BDC_INTCTLS(n) (0x20c + (n * 0x10))
/* Extended capability regs */
#define BDC_FSCNOC 0xcd4
#define BDC_FSCNIC 0xce4
#define NUM_NCS(p) (p >> 28)
/* Register bit fields and Masks */
/* BDC Configuration 0 */
#define BDC_PGS(p) (((p) & (0x7 << 8)) >> 8)
#define BDC_SPB(p) (p & 0x7)
/* BDC Capability1 */
#define BDC_P64 (1 << 0)
/* BDC Command register */
#define BDC_CMD_FH 0xe
#define BDC_CMD_DNC 0x6
#define BDC_CMD_EPO 0x4
#define BDC_CMD_BLA 0x3
#define BDC_CMD_EPC 0x2
#define BDC_CMD_DVC 0x1
#define BDC_CMD_CWS (0x1 << 5)
#define BDC_CMD_CST(p) (((p) & (0xf << 6))>>6)
#define BDC_CMD_EPN(p) ((p & 0x1f) << 10)
#define BDC_SUB_CMD_ADD (0x1 << 17)
#define BDC_SUB_CMD_FWK (0x4 << 17)
/* Reset sequence number */
#define BDC_CMD_EPO_RST_SN (0x1 << 16)
#define BDC_CMD_EP0_XSD (0x1 << 16)
#define BDC_SUB_CMD_ADD_EP (0x1 << 17)
#define BDC_SUB_CMD_DRP_EP (0x2 << 17)
#define BDC_SUB_CMD_EP_STP (0x2 << 17)
#define BDC_SUB_CMD_EP_STL (0x4 << 17)
#define BDC_SUB_CMD_EP_RST (0x1 << 17)
#define BDC_CMD_SRD (1 << 27)
/* CMD completion status */
#define BDC_CMDS_SUCC 0x1
#define BDC_CMDS_PARA 0x3
#define BDC_CMDS_STAT 0x4
#define BDC_CMDS_FAIL 0x5
#define BDC_CMDS_INTL 0x6
#define BDC_CMDS_BUSY 0xf
/* CMDSC Param 2 shifts */
#define EPT_SHIFT 22
#define MP_SHIFT 10
#define MB_SHIFT 6
#define EPM_SHIFT 4
/* BDC USPSC */
#define BDC_VBC (1 << 31)
#define BDC_PRC (1 << 30)
#define BDC_PCE (1 << 29)
#define BDC_CFC (1 << 28)
#define BDC_PCC (1 << 27)
#define BDC_PSC (1 << 26)
#define BDC_VBS (1 << 25)
#define BDC_PRS (1 << 24)
#define BDC_PCS (1 << 23)
#define BDC_PSP(p) (((p) & (0x7 << 20))>>20)
#define BDC_SCN (1 << 8)
#define BDC_SDC (1 << 7)
#define BDC_SWS (1 << 4)
#define BDC_USPSC_RW (BDC_SCN|BDC_SDC|BDC_SWS|0xf)
#define BDC_PSP(p) (((p) & (0x7 << 20))>>20)
#define BDC_SPEED_FS 0x1
#define BDC_SPEED_LS 0x2
#define BDC_SPEED_HS 0x3
#define BDC_SPEED_SS 0x4
#define BDC_PST(p) (p & 0xf)
#define BDC_PST_MASK 0xf
/* USPPMS */
#define BDC_U2E (0x1 << 31)
#define BDC_U1E (0x1 << 30)
#define BDC_U2A (0x1 << 29)
#define BDC_PORT_W1S (0x1 << 17)
#define BDC_U1T(p) ((p) & 0xff)
#define BDC_U2T(p) (((p) & 0xff) << 8)
#define BDC_U1T_MASK 0xff
/* USBPM2 */
/* Hardware LPM Enable */
#define BDC_HLE (1 << 16)
/* BDC Status and Control */
#define BDC_COP_RST (1 << 29)
#define BDC_COP_RUN (2 << 29)
#define BDC_COP_STP (4 << 29)
#define BDC_COP_MASK (BDC_COP_RST|BDC_COP_RUN|BDC_COP_STP)
#define BDC_COS (1 << 28)
#define BDC_CSTS(p) (((p) & (0x7 << 20)) >> 20)
#define BDC_MASK_MCW (1 << 7)
#define BDC_GIE (1 << 1)
#define BDC_GIP (1 << 0)
#define BDC_HLT 1
#define BDC_NOR 2
#define BDC_OIP 7
/* Buffer descriptor and Status report bit fields and masks */
#define BD_TYPE_BITMASK (0xf)
#define BD_CHAIN 0xf
#define BD_TFS_SHIFT 4
#define BD_SOT (1 << 26)
#define BD_EOT (1 << 27)
#define BD_ISP (1 << 29)
#define BD_IOC (1 << 30)
#define BD_SBF (1 << 31)
#define BD_INTR_TARGET(p) (((p) & 0x1f) << 27)
#define BDC_SRR_RWS (1 << 4)
#define BDC_SRR_RST (1 << 3)
#define BDC_SRR_ISR (1 << 2)
#define BDC_SRR_IE (1 << 1)
#define BDC_SRR_IP (1 << 0)
#define BDC_SRR_EPI(p) (((p) & (0xff << 24)) >> 24)
#define BDC_SRR_DPI(p) (((p) & (0xff << 16)) >> 16)
#define BDC_SRR_DPI_MASK 0x00ff0000
#define MARK_CHAIN_BD (BD_CHAIN|BD_EOT|BD_SOT)
/* Control transfer BD specific fields */
#define BD_DIR_IN (1 << 25)
#define BDC_PTC_MASK 0xf0000000
/* status report defines */
#define SR_XSF 0
#define SR_USPC 4
#define SR_BD_LEN(p) (p & 0xffffff)
#define XSF_SUCC 0x1
#define XSF_SHORT 0x3
#define XSF_BABB 0x4
#define XSF_SETUP_RECV 0x6
#define XSF_DATA_START 0x7
#define XSF_STATUS_START 0x8
#define XSF_STS(p) (((p) >> 28) & 0xf)
/* Transfer BD fields */
#define BD_LEN(p) ((p) & 0x1ffff)
#define BD_LTF (1 << 25)
#define BD_TYPE_DS 0x1
#define BD_TYPE_SS 0x2
#define BDC_EP_ENABLED (1 << 0)
#define BDC_EP_STALL (1 << 1)
#define BDC_EP_STOP (1 << 2)
/* One BD can transfer max 65536 bytes */
#define BD_MAX_BUFF_SIZE (1 << 16)
/* Maximum bytes in one XFR, Refer to BDC spec */
#define MAX_XFR_LEN 16777215
/* defines for Force Header command */
#define DEV_NOTF_TYPE 6
#define FWK_SUBTYPE 1
#define TRA_PACKET 4
#define to_bdc_ep(e) container_of(e, struct bdc_ep, usb_ep)
#define to_bdc_req(r) container_of(r, struct bdc_req, usb_req)
#define gadget_to_bdc(g) container_of(g, struct bdc, gadget)
/* FUNCTION WAKE DEV NOTIFICATION interval, USB3 spec table 8.13 */
#define BDC_TNOTIFY 2500 /*in ms*/
/* Devstatus bitfields */
#define REMOTE_WAKEUP_ISSUED (1 << 16)
#define DEVICE_SUSPENDED (1 << 17)
#define FUNC_WAKE_ISSUED (1 << 18)
#define REMOTE_WAKE_ENABLE (1 << USB_DEVICE_REMOTE_WAKEUP)
/* On disconnect, preserve these bits and clear rest */
#define DEVSTATUS_CLEAR (1 << USB_DEVICE_SELF_POWERED)
/* Hardware and software Data structures */
/* Endpoint bd: buffer descriptor */
struct bdc_bd {
__le32 offset[4];
};
/* Status report in Status report ring(srr) */
struct bdc_sr {
__le32 offset[4];
};
/* bd_table: contigous bd's in a table */
struct bd_table {
struct bdc_bd *start_bd;
/* dma address of start bd of table*/
dma_addr_t dma;
};
/*
* Each endpoint has a bdl(buffer descriptor list), bdl consists of 1 or more bd
* table's chained to each other through a chain bd, every table has equal
* number of bds. the software uses bdi(bd index) to refer to particular bd in
* the list.
*/
struct bd_list {
/* Array of bd table pointers*/
struct bd_table **bd_table_array;
/* How many tables chained to each other */
int num_tabs;
/* Max_bdi = num_tabs * num_bds_table - 1 */
int max_bdi;
/* current enq bdi from sw point of view */
int eqp_bdi;
/* current deq bdi from sw point of view */
int hwd_bdi;
/* numbers of bds per table */
int num_bds_table;
};
struct bdc_req;
/* Representation of a transfer, one transfer can have multiple bd's */
struct bd_transfer {
struct bdc_req *req;
/* start bd index */
int start_bdi;
/* this will be the next hw dqp when this transfer completes */
int next_hwd_bdi;
/* number of bds in this transfer */
int num_bds;
};
/*
* Representation of a gadget request, every gadget request is contained
* by 1 bd_transfer.
*/
struct bdc_req {
struct usb_request usb_req;
struct list_head queue;
struct bdc_ep *ep;
/* only one Transfer per request */
struct bd_transfer bd_xfr;
int epnum;
};
/* scratchpad buffer needed by bdc hardware */
struct bdc_scratchpad {
dma_addr_t sp_dma;
void *buff;
u32 size;
};
/* endpoint representation */
struct bdc_ep {
struct usb_ep usb_ep;
struct list_head queue;
struct bdc *bdc;
u8 ep_type;
u8 dir;
u8 ep_num;
const struct usb_ss_ep_comp_descriptor *comp_desc;
const struct usb_endpoint_descriptor *desc;
unsigned int flags;
char name[20];
/* endpoint bd list*/
struct bd_list bd_list;
/*
* HW generates extra event for multi bd tranfers, this flag helps in
* ignoring the extra event
*/
bool ignore_next_sr;
};
/* bdc cmmand parameter structure */
struct bdc_cmd_params {
u32 param2;
u32 param1;
u32 param0;
};
/* status report ring(srr), currently one srr is supported for entire system */
struct srr {
struct bdc_sr *sr_bds;
u16 eqp_index;
u16 dqp_index;
dma_addr_t dma_addr;
};
/* EP0 states */
enum bdc_ep0_state {
WAIT_FOR_SETUP = 0,
WAIT_FOR_DATA_START,
WAIT_FOR_DATA_XMIT,
WAIT_FOR_STATUS_START,
WAIT_FOR_STATUS_XMIT,
STATUS_PENDING
};
/* Link states */
enum bdc_link_state {
BDC_LINK_STATE_U0 = 0x00,
BDC_LINK_STATE_U3 = 0x03,
BDC_LINK_STATE_RX_DET = 0x05,
BDC_LINK_STATE_RESUME = 0x0f
};
/* representation of bdc */
struct bdc {
struct usb_gadget gadget;
struct usb_gadget_driver *gadget_driver;
struct device *dev;
/* device lock */
spinlock_t lock;
/* num of endpoints for a particular instantiation of IP */
unsigned int num_eps;
/*
* Array of ep's, it uses the same index covention as bdc hw i.e.
* 1 for ep0, 2 for 1out,3 for 1in ....
*/
struct bdc_ep **bdc_ep_array;
void __iomem *regs;
struct bdc_scratchpad scratchpad;
u32 sp_buff_size;
/* current driver supports 1 status ring */
struct srr srr;
/* Last received setup packet */
struct usb_ctrlrequest setup_pkt;
struct bdc_req ep0_req;
struct bdc_req status_req;
enum bdc_ep0_state ep0_state;
bool delayed_status;
bool zlp_needed;
bool reinit;
bool pullup;
/* Bits 0-15 are standard and 16-31 for proprietary information */
u32 devstatus;
int irq;
void *mem;
u32 dev_addr;
/* DMA pools */
struct dma_pool *bd_table_pool;
u8 test_mode;
/* array of callbacks for various status report handlers */
void (*sr_handler[2])(struct bdc *, struct bdc_sr *);
/* ep0 callback handlers */
void (*sr_xsf_ep0[3])(struct bdc *, struct bdc_sr *);
/* ep0 response buffer for ch9 requests like GET_STATUS and SET_SEL */
unsigned char ep0_response_buff[EP0_RESPONSE_BUFF];
/*
* Timer to check if host resumed transfer after bdc sent Func wake
* notification packet after a remote wakeup. if not, then resend the
* Func Wake packet every 2.5 secs. Refer to USB3 spec section 8.5.6.4
*/
struct delayed_work func_wake_notify;
};
static inline u32 bdc_readl(void __iomem *base, u32 offset)
{
return readl(base + offset);
}
static inline void bdc_writel(void __iomem *base, u32 offset, u32 value)
{
writel(value, base + offset);
}
/* Buffer descriptor list operations */
void bdc_notify_xfr(struct bdc *, u32);
void bdc_softconn(struct bdc *);
void bdc_softdisconn(struct bdc *);
int bdc_run(struct bdc *);
int bdc_stop(struct bdc *);
int bdc_reset(struct bdc *);
int bdc_udc_init(struct bdc *);
void bdc_udc_exit(struct bdc *);
int bdc_reinit(struct bdc *);
/* Status report handlers */
/* Upstream port status change sr */
void bdc_sr_uspc(struct bdc *, struct bdc_sr *);
/* transfer sr */
void bdc_sr_xsf(struct bdc *, struct bdc_sr *);
/* EP0 XSF handlers */
void bdc_xsf_ep0_setup_recv(struct bdc *, struct bdc_sr *);
void bdc_xsf_ep0_data_start(struct bdc *, struct bdc_sr *);
void bdc_xsf_ep0_status_start(struct bdc *, struct bdc_sr *);
#endif /* __LINUX_BDC_H__ */

376
drivers/usb/gadget/udc/bdc/bdc_cmd.c 100644
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@ -0,0 +1,376 @@
/*
* bdc_cmd.c - BRCM BDC USB3.0 device controller
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include "bdc.h"
#include "bdc_cmd.h"
#include "bdc_dbg.h"
/* Issues a cmd to cmd processor and waits for cmd completion */
static int bdc_issue_cmd(struct bdc *bdc, u32 cmd_sc, u32 param0,
u32 param1, u32 param2)
{
u32 timeout = BDC_CMD_TIMEOUT;
u32 cmd_status;
u32 temp;
bdc_writel(bdc->regs, BDC_CMDPAR0, param0);
bdc_writel(bdc->regs, BDC_CMDPAR1, param1);
bdc_writel(bdc->regs, BDC_CMDPAR2, param2);
/* Issue the cmd */
/* Make sure the cmd params are written before asking HW to exec cmd */
wmb();
bdc_writel(bdc->regs, BDC_CMDSC, cmd_sc | BDC_CMD_CWS | BDC_CMD_SRD);
do {
temp = bdc_readl(bdc->regs, BDC_CMDSC);
dev_dbg_ratelimited(bdc->dev, "cmdsc=%x", temp);
cmd_status = BDC_CMD_CST(temp);
if (cmd_status != BDC_CMDS_BUSY) {
dev_dbg(bdc->dev,
"command completed cmd_sts:%x\n", cmd_status);
return cmd_status;
}
udelay(1);
} while (timeout--);
dev_err(bdc->dev,
"command operation timedout cmd_status=%d\n", cmd_status);
return cmd_status;
}
/* Submits cmd and analyze the return value of bdc_issue_cmd */
static int bdc_submit_cmd(struct bdc *bdc, u32 cmd_sc,
u32 param0, u32 param1, u32 param2)
{
u32 temp, cmd_status;
int reset_bdc = 0;
int ret;
temp = bdc_readl(bdc->regs, BDC_CMDSC);
dev_dbg(bdc->dev,
"%s:CMDSC:%08x cmdsc:%08x param0=%08x param1=%08x param2=%08x\n",
__func__, temp, cmd_sc, param0, param1, param2);
cmd_status = BDC_CMD_CST(temp);
if (cmd_status == BDC_CMDS_BUSY) {
dev_err(bdc->dev, "command processor busy: %x\n", cmd_status);
return -EBUSY;
}
ret = bdc_issue_cmd(bdc, cmd_sc, param0, param1, param2);
switch (ret) {
case BDC_CMDS_SUCC:
dev_dbg(bdc->dev, "command completed successfully\n");
ret = 0;
break;
case BDC_CMDS_PARA:
dev_err(bdc->dev, "command parameter error\n");
ret = -EINVAL;
break;
case BDC_CMDS_STAT:
dev_err(bdc->dev, "Invalid device/ep state\n");
ret = -EINVAL;
break;
case BDC_CMDS_FAIL:
dev_err(bdc->dev, "Command failed?\n");
ret = -EAGAIN;
break;
case BDC_CMDS_INTL:
dev_err(bdc->dev, "BDC Internal error\n");
reset_bdc = 1;
ret = -ECONNRESET;
break;
case BDC_CMDS_BUSY:
dev_err(bdc->dev,
"command timedout waited for %dusec\n",
BDC_CMD_TIMEOUT);
reset_bdc = 1;
ret = -ECONNRESET;
break;
default:
dev_dbg(bdc->dev, "Unknown command completion code:%x\n", ret);
}
return ret;
}
/* Deconfigure the endpoint from HW */
int bdc_dconfig_ep(struct bdc *bdc, struct bdc_ep *ep)
{
u32 cmd_sc;
cmd_sc = BDC_SUB_CMD_DRP_EP|BDC_CMD_EPN(ep->ep_num)|BDC_CMD_EPC;
dev_dbg(bdc->dev, "%s ep->ep_num =%d cmd_sc=%x\n", __func__,
ep->ep_num, cmd_sc);
return bdc_submit_cmd(bdc, cmd_sc, 0, 0, 0);
}
/* Reinitalize the bdlist after config ep command */
static void ep_bd_list_reinit(struct bdc_ep *ep)
{
struct bdc *bdc = ep->bdc;
struct bdc_bd *bd;
ep->bd_list.eqp_bdi = 0;
ep->bd_list.hwd_bdi = 0;
bd = ep->bd_list.bd_table_array[0]->start_bd;
dev_dbg(bdc->dev, "%s ep:%p bd:%p\n", __func__, ep, bd);
memset(bd, 0, sizeof(struct bdc_bd));
bd->offset[3] |= cpu_to_le32(BD_SBF);
}
/* Configure an endpoint */
int bdc_config_ep(struct bdc *bdc, struct bdc_ep *ep)
{
const struct usb_ss_ep_comp_descriptor *comp_desc;
const struct usb_endpoint_descriptor *desc;
u32 param0, param1, param2, cmd_sc;
u32 mps, mbs, mul, si;
int ret;
desc = ep->desc;
comp_desc = ep->comp_desc;
cmd_sc = mul = mbs = param2 = 0;
param0 = lower_32_bits(ep->bd_list.bd_table_array[0]->dma);
param1 = upper_32_bits(ep->bd_list.bd_table_array[0]->dma);
cpu_to_le32s(&param0);
cpu_to_le32s(&param1);
dev_dbg(bdc->dev, "%s: param0=%08x param1=%08x",
__func__, param0, param1);
si = desc->bInterval;
si = clamp_val(si, 1, 16) - 1;
mps = usb_endpoint_maxp(desc);
mps &= 0x7ff;
param2 |= mps << MP_SHIFT;
param2 |= usb_endpoint_type(desc) << EPT_SHIFT;
switch (bdc->gadget.speed) {
case USB_SPEED_SUPER:
if (usb_endpoint_xfer_int(desc) ||
usb_endpoint_xfer_isoc(desc)) {
param2 |= si;
if (usb_endpoint_xfer_isoc(desc) && comp_desc)
mul = comp_desc->bmAttributes;
}
param2 |= mul << EPM_SHIFT;
if (comp_desc)
mbs = comp_desc->bMaxBurst;
param2 |= mbs << MB_SHIFT;
break;
case USB_SPEED_HIGH:
if (usb_endpoint_xfer_isoc(desc) ||
usb_endpoint_xfer_int(desc)) {
param2 |= si;
mbs = (usb_endpoint_maxp(desc) & 0x1800) >> 11;
param2 |= mbs << MB_SHIFT;
}
break;
case USB_SPEED_FULL:
case USB_SPEED_LOW:
/* the hardware accepts SI in 125usec range */
if (usb_endpoint_xfer_isoc(desc))
si += 3;
/*
* FS Int endpoints can have si of 1-255ms but the controller
* accepts 2^bInterval*125usec, so convert ms to nearest power
* of 2
*/
if (usb_endpoint_xfer_int(desc))
si = fls(desc->bInterval * 8) - 1;
param2 |= si;
break;
default:
dev_err(bdc->dev, "UNKNOWN speed ERR\n");
return -EINVAL;
}
cmd_sc |= BDC_CMD_EPC|BDC_CMD_EPN(ep->ep_num)|BDC_SUB_CMD_ADD_EP;
dev_dbg(bdc->dev, "cmd_sc=%x param2=%08x\n", cmd_sc, param2);
ret = bdc_submit_cmd(bdc, cmd_sc, param0, param1, param2);
if (ret) {
dev_err(bdc->dev, "command failed :%x\n", ret);
return ret;
}
ep_bd_list_reinit(ep);
return ret;
}
/*
* Change the HW deq pointer, if this command is successful, HW will start
* fetching the next bd from address dma_addr.
*/
int bdc_ep_bla(struct bdc *bdc, struct bdc_ep *ep, dma_addr_t dma_addr)
{
u32 param0, param1;
u32 cmd_sc = 0;
dev_dbg(bdc->dev, "%s: add=%08llx\n", __func__,
(unsigned long long)(dma_addr));
param0 = lower_32_bits(dma_addr);
param1 = upper_32_bits(dma_addr);
cpu_to_le32s(&param0);
cpu_to_le32s(&param1);
cmd_sc |= BDC_CMD_EPN(ep->ep_num)|BDC_CMD_BLA;
dev_dbg(bdc->dev, "cmd_sc=%x\n", cmd_sc);
return bdc_submit_cmd(bdc, cmd_sc, param0, param1, 0);
}
/* Set the address sent bu Host in SET_ADD request */
int bdc_address_device(struct bdc *bdc, u32 add)
{
u32 cmd_sc = 0;
u32 param2;
dev_dbg(bdc->dev, "%s: add=%d\n", __func__, add);
cmd_sc |= BDC_SUB_CMD_ADD|BDC_CMD_DVC;
param2 = add & 0x7f;
return bdc_submit_cmd(bdc, cmd_sc, 0, 0, param2);
}
/* Send a Function Wake notification packet using FH command */
int bdc_function_wake_fh(struct bdc *bdc, u8 intf)
{
u32 param0, param1;
u32 cmd_sc = 0;
param0 = param1 = 0;
dev_dbg(bdc->dev, "%s intf=%d\n", __func__, intf);
cmd_sc |= BDC_CMD_FH;
param0 |= TRA_PACKET;
param0 |= (bdc->dev_addr << 25);
param1 |= DEV_NOTF_TYPE;
param1 |= (FWK_SUBTYPE<<4);
dev_dbg(bdc->dev, "param0=%08x param1=%08x\n", param0, param1);
return bdc_submit_cmd(bdc, cmd_sc, param0, param1, 0);
}
/* Send a Function Wake notification packet using DNC command */
int bdc_function_wake(struct bdc *bdc, u8 intf)
{
u32 cmd_sc = 0;
u32 param2 = 0;
dev_dbg(bdc->dev, "%s intf=%d", __func__, intf);
param2 |= intf;
cmd_sc |= BDC_SUB_CMD_FWK|BDC_CMD_DNC;
return bdc_submit_cmd(bdc, cmd_sc, 0, 0, param2);
}
/* Stall the endpoint */
int bdc_ep_set_stall(struct bdc *bdc, int epnum)
{
u32 cmd_sc = 0;
dev_dbg(bdc->dev, "%s epnum=%d\n", __func__, epnum);
/* issue a stall endpoint command */
cmd_sc |= BDC_SUB_CMD_EP_STL | BDC_CMD_EPN(epnum) | BDC_CMD_EPO;
return bdc_submit_cmd(bdc, cmd_sc, 0, 0, 0);
}
/* resets the endpoint, called when host sends CLEAR_FEATURE(HALT) */
int bdc_ep_clear_stall(struct bdc *bdc, int epnum)
{
struct bdc_ep *ep;
u32 cmd_sc = 0;
int ret;
dev_dbg(bdc->dev, "%s: epnum=%d\n", __func__, epnum);
ep = bdc->bdc_ep_array[epnum];
/*
* If we are not in stalled then stall Endpoint and issue clear stall,
* his will reset the seq number for non EP0.
*/
if (epnum != 1) {
/* if the endpoint it not stallled */
if (!(ep->flags & BDC_EP_STALL)) {
ret = bdc_ep_set_stall(bdc, epnum);
if (ret)
return ret;
}
}
/* Preserve the seq number for ep0 only */
if (epnum != 1)
cmd_sc |= BDC_CMD_EPO_RST_SN;
/* issue a reset endpoint command */
cmd_sc |= BDC_SUB_CMD_EP_RST | BDC_CMD_EPN(epnum) | BDC_CMD_EPO;
ret = bdc_submit_cmd(bdc, cmd_sc, 0, 0, 0);
if (ret) {
dev_err(bdc->dev, "command failed:%x\n", ret);
return ret;
}
bdc_notify_xfr(bdc, epnum);
return ret;
}
/* Stop the endpoint, called when software wants to dequeue some request */
int bdc_stop_ep(struct bdc *bdc, int epnum)
{
struct bdc_ep *ep;
u32 cmd_sc = 0;
int ret;
ep = bdc->bdc_ep_array[epnum];
dev_dbg(bdc->dev, "%s: ep:%s ep->flags:%08x\n", __func__,
ep->name, ep->flags);
/* Endpoint has to be in running state to execute stop ep command */
if (!(ep->flags & BDC_EP_ENABLED)) {
dev_err(bdc->dev, "stop endpoint called for disabled ep\n");
return -EINVAL;
}
if ((ep->flags & BDC_EP_STALL) || (ep->flags & BDC_EP_STOP))
return 0;
/* issue a stop endpoint command */
cmd_sc |= BDC_CMD_EP0_XSD | BDC_SUB_CMD_EP_STP
| BDC_CMD_EPN(epnum) | BDC_CMD_EPO;
ret = bdc_submit_cmd(bdc, cmd_sc, 0, 0, 0);
if (ret) {
dev_err(bdc->dev,
"stop endpoint command didn't complete:%d ep:%s\n",
ret, ep->name);
return ret;
}
ep->flags |= BDC_EP_STOP;
bdc_dump_epsts(bdc);
return ret;
}

29
drivers/usb/gadget/udc/bdc/bdc_cmd.h 100644
View File

@ -0,0 +1,29 @@
/*
* bdc_cmd.h - header for the BDC debug functions
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __LINUX_BDC_CMD_H__
#define __LINUX_BDC_CMD_H__
/* Command operations */
int bdc_address_device(struct bdc *, u32);
int bdc_config_ep(struct bdc *, struct bdc_ep *);
int bdc_dconfig_ep(struct bdc *, struct bdc_ep *);
int bdc_stop_ep(struct bdc *, int);
int bdc_ep_set_stall(struct bdc *, int);
int bdc_ep_clear_stall(struct bdc *, int);
int bdc_ep_set_halt(struct bdc_ep *, u32 , int);
int bdc_ep_bla(struct bdc *, struct bdc_ep *, dma_addr_t);
int bdc_function_wake(struct bdc*, u8);
int bdc_function_wake_fh(struct bdc*, u8);
#endif /* __LINUX_BDC_CMD_H__ */

533
drivers/usb/gadget/udc/bdc/bdc_core.c 100644
View File

@ -0,0 +1,533 @@
/*
* bdc_core.c - BRCM BDC USB3.0 device controller core operations
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/list.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
#include <linux/of.h>
#include <linux/moduleparam.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include "bdc.h"
#include "bdc_dbg.h"
/* Poll till controller status is not OIP */
static int poll_oip(struct bdc *bdc, int usec)
{
u32 status;
/* Poll till STS!= OIP */
while (usec) {
status = bdc_readl(bdc->regs, BDC_BDCSC);
if (BDC_CSTS(status) != BDC_OIP) {
dev_dbg(bdc->dev,
"poll_oip complete status=%d",
BDC_CSTS(status));
return 0;
}
udelay(10);
usec -= 10;
}
dev_err(bdc->dev, "Err: operation timedout BDCSC: 0x%08x\n", status);
return -ETIMEDOUT;
}
/* Stop the BDC controller */
int bdc_stop(struct bdc *bdc)
{
int ret;
u32 temp;
dev_dbg(bdc->dev, "%s ()\n\n", __func__);
temp = bdc_readl(bdc->regs, BDC_BDCSC);
/* Check if BDC is already halted */
if (BDC_CSTS(temp) == BDC_HLT) {
dev_vdbg(bdc->dev, "BDC already halted\n");
return 0;
}
temp &= ~BDC_COP_MASK;
temp |= BDC_COS|BDC_COP_STP;
bdc_writel(bdc->regs, BDC_BDCSC, temp);
ret = poll_oip(bdc, BDC_COP_TIMEOUT);
if (ret)
dev_err(bdc->dev, "bdc stop operation failed");
return ret;
}
/* Issue a reset to BDC controller */
int bdc_reset(struct bdc *bdc)
{
u32 temp;
int ret;
dev_dbg(bdc->dev, "%s ()\n", __func__);
/* First halt the controller */
ret = bdc_stop(bdc);
if (ret)
return ret;
temp = bdc_readl(bdc->regs, BDC_BDCSC);
temp &= ~BDC_COP_MASK;
temp |= BDC_COS|BDC_COP_RST;
bdc_writel(bdc->regs, BDC_BDCSC, temp);
ret = poll_oip(bdc, BDC_COP_TIMEOUT);
if (ret)
dev_err(bdc->dev, "bdc reset operation failed");
return ret;
}
/* Run the BDC controller */
int bdc_run(struct bdc *bdc)
{
u32 temp;
int ret;
dev_dbg(bdc->dev, "%s ()\n", __func__);
temp = bdc_readl(bdc->regs, BDC_BDCSC);
/* if BDC is already in running state then do not do anything */
if (BDC_CSTS(temp) == BDC_NOR) {
dev_warn(bdc->dev, "bdc is already in running state\n");
return 0;
}
temp &= ~BDC_COP_MASK;
temp |= BDC_COP_RUN;
temp |= BDC_COS;
bdc_writel(bdc->regs, BDC_BDCSC, temp);
ret = poll_oip(bdc, BDC_COP_TIMEOUT);
if (ret) {
dev_err(bdc->dev, "bdc run operation failed:%d", ret);
return ret;
}
temp = bdc_readl(bdc->regs, BDC_BDCSC);
if (BDC_CSTS(temp) != BDC_NOR) {
dev_err(bdc->dev, "bdc not in normal mode after RUN op :%d\n",
BDC_CSTS(temp));
return -ESHUTDOWN;
}
return 0;
}
/*
* Present the termination to the host, typically called from upstream port
* event with Vbus present =1
*/
void bdc_softconn(struct bdc *bdc)
{
u32 uspc;
uspc = bdc_readl(bdc->regs, BDC_USPC);
uspc &= ~BDC_PST_MASK;
uspc |= BDC_LINK_STATE_RX_DET;
uspc |= BDC_SWS;
dev_dbg(bdc->dev, "%s () uspc=%08x\n", __func__, uspc);
bdc_writel(bdc->regs, BDC_USPC, uspc);
}
/* Remove the termination */
void bdc_softdisconn(struct bdc *bdc)
{
u32 uspc;
uspc = bdc_readl(bdc->regs, BDC_USPC);
uspc |= BDC_SDC;
uspc &= ~BDC_SCN;
dev_dbg(bdc->dev, "%s () uspc=%x\n", __func__, uspc);
bdc_writel(bdc->regs, BDC_USPC, uspc);
}
/* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
static int scratchpad_setup(struct bdc *bdc)
{
int sp_buff_size;
u32 low32;
u32 upp32;
sp_buff_size = BDC_SPB(bdc_readl(bdc->regs, BDC_BDCCFG0));
dev_dbg(bdc->dev, "%s() sp_buff_size=%d\n", __func__, sp_buff_size);
if (!sp_buff_size) {
dev_dbg(bdc->dev, "Scratchpad buffer not needed\n");
return 0;
}
/* Refer to BDC spec, Table 4 for description of SPB */
sp_buff_size = 1 << (sp_buff_size + 5);
dev_dbg(bdc->dev, "Allocating %d bytes for scratchpad\n", sp_buff_size);
bdc->scratchpad.buff = dma_zalloc_coherent(bdc->dev, sp_buff_size,
&bdc->scratchpad.sp_dma, GFP_KERNEL);
if (!bdc->scratchpad.buff)
goto fail;
bdc->sp_buff_size = sp_buff_size;
bdc->scratchpad.size = sp_buff_size;
low32 = lower_32_bits(bdc->scratchpad.sp_dma);
upp32 = upper_32_bits(bdc->scratchpad.sp_dma);
cpu_to_le32s(&low32);
cpu_to_le32s(&upp32);
bdc_writel(bdc->regs, BDC_SPBBAL, low32);
bdc_writel(bdc->regs, BDC_SPBBAH, upp32);
return 0;
fail:
bdc->scratchpad.buff = NULL;
return -ENOMEM;
}
/* Allocate the status report ring */
static int setup_srr(struct bdc *bdc, int interrupter)
{
dev_dbg(bdc->dev, "%s() NUM_SR_ENTRIES:%d\n", __func__, NUM_SR_ENTRIES);
/* Reset the SRR */
bdc_writel(bdc->regs, BDC_SRRINT(0), BDC_SRR_RWS | BDC_SRR_RST);
bdc->srr.dqp_index = 0;
/* allocate the status report descriptors */
bdc->srr.sr_bds = dma_zalloc_coherent(
bdc->dev,
NUM_SR_ENTRIES * sizeof(struct bdc_bd),
&bdc->srr.dma_addr,
GFP_KERNEL);
if (!bdc->srr.sr_bds)
return -ENOMEM;
return 0;
}
/* Initialize the HW regs and internal data structures */
static void bdc_mem_init(struct bdc *bdc, bool reinit)
{
u8 size = 0;
u32 usb2_pm;
u32 low32;
u32 upp32;
u32 temp;
dev_dbg(bdc->dev, "%s ()\n", __func__);
bdc->ep0_state = WAIT_FOR_SETUP;
bdc->dev_addr = 0;
bdc->srr.eqp_index = 0;
bdc->srr.dqp_index = 0;
bdc->zlp_needed = false;
bdc->delayed_status = false;
bdc_writel(bdc->regs, BDC_SPBBAL, bdc->scratchpad.sp_dma);
/* Init the SRR */
temp = BDC_SRR_RWS | BDC_SRR_RST;
/* Reset the SRR */
bdc_writel(bdc->regs, BDC_SRRINT(0), temp);
dev_dbg(bdc->dev, "bdc->srr.sr_bds =%p\n", bdc->srr.sr_bds);
temp = lower_32_bits(bdc->srr.dma_addr);
size = fls(NUM_SR_ENTRIES) - 2;
temp |= size;
dev_dbg(bdc->dev, "SRRBAL[0]=%08x NUM_SR_ENTRIES:%d size:%d\n",
temp, NUM_SR_ENTRIES, size);
low32 = lower_32_bits(temp);
upp32 = upper_32_bits(bdc->srr.dma_addr);
cpu_to_le32s(&low32);
cpu_to_le32s(&upp32);
/* Write the dma addresses into regs*/
bdc_writel(bdc->regs, BDC_SRRBAL(0), low32);
bdc_writel(bdc->regs, BDC_SRRBAH(0), upp32);
temp = bdc_readl(bdc->regs, BDC_SRRINT(0));
temp |= BDC_SRR_IE;
temp &= ~(BDC_SRR_RST | BDC_SRR_RWS);
bdc_writel(bdc->regs, BDC_SRRINT(0), temp);
/* Set the Interrupt Coalescence ~500 usec */
temp = bdc_readl(bdc->regs, BDC_INTCTLS(0));
temp &= ~0xffff;
temp |= INT_CLS;
bdc_writel(bdc->regs, BDC_INTCTLS(0), temp);
usb2_pm = bdc_readl(bdc->regs, BDC_USPPM2);
dev_dbg(bdc->dev, "usb2_pm=%08x", usb2_pm);
/* Enable hardware LPM Enable */
usb2_pm |= BDC_HLE;
bdc_writel(bdc->regs, BDC_USPPM2, usb2_pm);
/* readback for debug */
usb2_pm = bdc_readl(bdc->regs, BDC_USPPM2);
dev_dbg(bdc->dev, "usb2_pm=%08x\n", usb2_pm);
/* Disable any unwanted SR's on SRR */
temp = bdc_readl(bdc->regs, BDC_BDCSC);
/* We don't want Microframe counter wrap SR */
temp |= BDC_MASK_MCW;
bdc_writel(bdc->regs, BDC_BDCSC, temp);
/*
* In some error cases, driver has to reset the entire BDC controller
* in that case reinit is passed as 1
*/
if (reinit) {
/* Enable interrupts */
temp = bdc_readl(bdc->regs, BDC_BDCSC);
temp |= BDC_GIE;
bdc_writel(bdc->regs, BDC_BDCSC, temp);
/* Init scratchpad to 0 */
memset(bdc->scratchpad.buff, 0, bdc->sp_buff_size);
/* Initialize SRR to 0 */
memset(bdc->srr.sr_bds, 0,
NUM_SR_ENTRIES * sizeof(struct bdc_bd));
} else {
/* One time initiaization only */
/* Enable status report function pointers */
bdc->sr_handler[0] = bdc_sr_xsf;
bdc->sr_handler[1] = bdc_sr_uspc;
/* EP0 status report function pointers */
bdc->sr_xsf_ep0[0] = bdc_xsf_ep0_setup_recv;
bdc->sr_xsf_ep0[1] = bdc_xsf_ep0_data_start;
bdc->sr_xsf_ep0[2] = bdc_xsf_ep0_status_start;
}
}
/* Free the dynamic memory */
static void bdc_mem_free(struct bdc *bdc)
{
dev_dbg(bdc->dev, "%s\n", __func__);
/* Free SRR */
if (bdc->srr.sr_bds)
dma_free_coherent(bdc->dev,
NUM_SR_ENTRIES * sizeof(struct bdc_bd),
bdc->srr.sr_bds, bdc->srr.dma_addr);
/* Free scratchpad */
if (bdc->scratchpad.buff)
dma_free_coherent(bdc->dev, bdc->sp_buff_size,
bdc->scratchpad.buff, bdc->scratchpad.sp_dma);
/* Destroy the dma pools */
if (bdc->bd_table_pool)
dma_pool_destroy(bdc->bd_table_pool);
/* Free the bdc_ep array */
kfree(bdc->bdc_ep_array);
bdc->srr.sr_bds = NULL;
bdc->scratchpad.buff = NULL;
bdc->bd_table_pool = NULL;
bdc->bdc_ep_array = NULL;
}
/*
* bdc reinit gives a controller reset and reinitialize the registers,
* called from disconnect/bus reset scenario's, to ensure proper HW cleanup
*/
int bdc_reinit(struct bdc *bdc)
{
int ret;
dev_dbg(bdc->dev, "%s\n", __func__);
ret = bdc_stop(bdc);
if (ret)
goto out;
ret = bdc_reset(bdc);
if (ret)
goto out;
/* the reinit flag is 1 */
bdc_mem_init(bdc, true);
ret = bdc_run(bdc);
out:
bdc->reinit = false;
return ret;
}
/* Allocate all the dyanmic memory */
static int bdc_mem_alloc(struct bdc *bdc)
{
u32 page_size;
unsigned int num_ieps, num_oeps;
dev_dbg(bdc->dev,
"%s() NUM_BDS_PER_TABLE:%d\n", __func__,
NUM_BDS_PER_TABLE);
page_size = BDC_PGS(bdc_readl(bdc->regs, BDC_BDCCFG0));
/* page size is 2^pgs KB */
page_size = 1 << page_size;
/* KB */
page_size <<= 10;
dev_dbg(bdc->dev, "page_size=%d\n", page_size);
/* Create a pool of bd tables */
bdc->bd_table_pool =
dma_pool_create("BDC BD tables", bdc->dev, NUM_BDS_PER_TABLE * 16,
16, page_size);
if (!bdc->bd_table_pool)
goto fail;
if (scratchpad_setup(bdc))
goto fail;
/* read from regs */
num_ieps = NUM_NCS(bdc_readl(bdc->regs, BDC_FSCNIC));
num_oeps = NUM_NCS(bdc_readl(bdc->regs, BDC_FSCNOC));
/* +2: 1 for ep0 and the other is rsvd i.e. bdc_ep[0] is rsvd */
bdc->num_eps = num_ieps + num_oeps + 2;
dev_dbg(bdc->dev,
"ieps:%d eops:%d num_eps:%d\n",
num_ieps, num_oeps, bdc->num_eps);
/* allocate array of ep pointers */
bdc->bdc_ep_array = kcalloc(bdc->num_eps, sizeof(struct bdc_ep *),
GFP_KERNEL);
if (!bdc->bdc_ep_array)
goto fail;
dev_dbg(bdc->dev, "Allocating sr report0\n");
if (setup_srr(bdc, 0))
goto fail;
return 0;
fail:
dev_warn(bdc->dev, "Couldn't initialize memory\n");
bdc_mem_free(bdc);
return -ENOMEM;
}
/* opposite to bdc_hw_init */
static void bdc_hw_exit(struct bdc *bdc)
{
dev_dbg(bdc->dev, "%s ()\n", __func__);
bdc_mem_free(bdc);
}
/* Initialize the bdc HW and memory */
static int bdc_hw_init(struct bdc *bdc)
{
int ret;
dev_dbg(bdc->dev, "%s ()\n", __func__);
ret = bdc_reset(bdc);
if (ret) {
dev_err(bdc->dev, "err resetting bdc abort bdc init%d\n", ret);
return ret;
}
ret = bdc_mem_alloc(bdc);
if (ret) {
dev_err(bdc->dev, "Mem alloc failed, aborting\n");
return -ENOMEM;
}
bdc_mem_init(bdc, 0);
bdc_dbg_regs(bdc);
dev_dbg(bdc->dev, "HW Init done\n");
return 0;
}
static int bdc_probe(struct platform_device *pdev)
{
struct bdc *bdc;
struct resource *res;
int ret = -ENOMEM;
int irq;
u32 temp;
struct device *dev = &pdev->dev;
dev_dbg(dev, "%s()\n", __func__);
bdc = devm_kzalloc(dev, sizeof(*bdc), GFP_KERNEL);
if (!bdc)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
bdc->regs = devm_ioremap_resource(dev, res);
if (IS_ERR(bdc->regs)) {
dev_err(dev, "ioremap error\n");
return -ENOMEM;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "platform_get_irq failed:%d\n", irq);
return irq;
}
spin_lock_init(&bdc->lock);
platform_set_drvdata(pdev, bdc);
bdc->irq = irq;
bdc->dev = dev;
dev_dbg(bdc->dev, "bdc->regs: %p irq=%d\n", bdc->regs, bdc->irq);
temp = bdc_readl(bdc->regs, BDC_BDCSC);
if ((temp & BDC_P64) &&
!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) {
dev_dbg(bdc->dev, "Using 64-bit address\n");
} else {
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (ret) {
dev_err(bdc->dev, "No suitable DMA config available, abort\n");
return -ENOTSUPP;
}
dev_dbg(bdc->dev, "Using 32-bit address\n");
}
ret = bdc_hw_init(bdc);
if (ret) {
dev_err(bdc->dev, "BDC init failure:%d\n", ret);
return ret;
}
ret = bdc_udc_init(bdc);
if (ret) {
dev_err(bdc->dev, "BDC Gadget init failure:%d\n", ret);
goto cleanup;
}
return 0;
cleanup:
bdc_hw_exit(bdc);
return ret;
}
static int bdc_remove(struct platform_device *pdev)
{
struct bdc *bdc;
bdc = platform_get_drvdata(pdev);
dev_dbg(bdc->dev, "%s ()\n", __func__);
bdc_udc_exit(bdc);
bdc_hw_exit(bdc);
return 0;
}
static struct platform_driver bdc_driver = {
.driver = {
.name = BRCM_BDC_NAME,
.owner = THIS_MODULE
},
.probe = bdc_probe,
.remove = bdc_remove,
};
module_platform_driver(bdc_driver);
MODULE_AUTHOR("Ashwini Pahuja <ashwini.linux@gmail.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION(BRCM_BDC_DESC);

123
drivers/usb/gadget/udc/bdc/bdc_dbg.c 100644
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@ -0,0 +1,123 @@
/*
* bdc_dbg.c - BRCM BDC USB3.0 device controller debug functions
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include "bdc.h"
#include "bdc_dbg.h"
void bdc_dbg_regs(struct bdc *bdc)
{
u32 temp;
dev_vdbg(bdc->dev, "bdc->regs:%p\n", bdc->regs);
temp = bdc_readl(bdc->regs, BDC_BDCCFG0);
dev_vdbg(bdc->dev, "bdccfg0:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_BDCCFG1);
dev_vdbg(bdc->dev, "bdccfg1:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_BDCCAP0);
dev_vdbg(bdc->dev, "bdccap0:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_BDCCAP1);
dev_vdbg(bdc->dev, "bdccap1:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_USPC);
dev_vdbg(bdc->dev, "uspc:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_DVCSA);
dev_vdbg(bdc->dev, "dvcsa:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_DVCSB);
dev_vdbg(bdc->dev, "dvcsb:0x%x08\n", temp);
}
void bdc_dump_epsts(struct bdc *bdc)
{
u32 temp;
temp = bdc_readl(bdc->regs, BDC_EPSTS0(0));
dev_vdbg(bdc->dev, "BDC_EPSTS0:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS1(0));
dev_vdbg(bdc->dev, "BDC_EPSTS1:0x%x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS2(0));
dev_vdbg(bdc->dev, "BDC_EPSTS2:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS3(0));
dev_vdbg(bdc->dev, "BDC_EPSTS3:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS4(0));
dev_vdbg(bdc->dev, "BDC_EPSTS4:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS5(0));
dev_vdbg(bdc->dev, "BDC_EPSTS5:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS6(0));
dev_vdbg(bdc->dev, "BDC_EPSTS6:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS7(0));
dev_vdbg(bdc->dev, "BDC_EPSTS7:0x%08x\n", temp);
}
void bdc_dbg_srr(struct bdc *bdc, u32 srr_num)
{
struct bdc_sr *sr;
dma_addr_t addr;
int i;
sr = bdc->srr.sr_bds;
addr = bdc->srr.dma_addr;
dev_vdbg(bdc->dev, "bdc_dbg_srr sr:%p dqp_index:%d\n",
sr, bdc->srr.dqp_index);
for (i = 0; i < NUM_SR_ENTRIES; i++) {
sr = &bdc->srr.sr_bds[i];
dev_vdbg(bdc->dev, "%llx %08x %08x %08x %08x\n",
(unsigned long long)addr,
le32_to_cpu(sr->offset[0]),
le32_to_cpu(sr->offset[1]),
le32_to_cpu(sr->offset[2]),
le32_to_cpu(sr->offset[3]));
addr += sizeof(*sr);
}
}
void bdc_dbg_bd_list(struct bdc *bdc, struct bdc_ep *ep)
{
struct bd_list *bd_list = &ep->bd_list;
struct bd_table *bd_table;
struct bdc_bd *bd;
int tbi, bdi, gbdi;
dma_addr_t dma;
gbdi = 0;
dev_vdbg(bdc->dev,
"Dump bd list for %s epnum:%d\n",
ep->name, ep->ep_num);
dev_vdbg(bdc->dev,
"tabs:%d max_bdi:%d eqp_bdi:%d hwd_bdi:%d num_bds_table:%d\n",
bd_list->num_tabs, bd_list->max_bdi, bd_list->eqp_bdi,
bd_list->hwd_bdi, bd_list->num_bds_table);
for (tbi = 0; tbi < bd_list->num_tabs; tbi++) {
bd_table = bd_list->bd_table_array[tbi];
for (bdi = 0; bdi < bd_list->num_bds_table; bdi++) {
bd = bd_table->start_bd + bdi;
dma = bd_table->dma + (sizeof(struct bdc_bd) * bdi);
dev_vdbg(bdc->dev,
"tbi:%2d bdi:%2d gbdi:%2d virt:%p phys:%llx %08x %08x %08x %08x\n",
tbi, bdi, gbdi++, bd, (unsigned long long)dma,
le32_to_cpu(bd->offset[0]),
le32_to_cpu(bd->offset[1]),
le32_to_cpu(bd->offset[2]),
le32_to_cpu(bd->offset[3]));
}
dev_vdbg(bdc->dev, "\n\n");
}
}

37
drivers/usb/gadget/udc/bdc/bdc_dbg.h 100644
View File

@ -0,0 +1,37 @@
/*
* bdc_dbg.h - header for the BDC debug functions
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __LINUX_BDC_DBG_H__
#define __LINUX_BDC_DBG_H__
#include "bdc.h"
#ifdef CONFIG_USB_GADGET_VERBOSE
void bdc_dbg_bd_list(struct bdc *, struct bdc_ep*);
void bdc_dbg_srr(struct bdc *, u32);
void bdc_dbg_regs(struct bdc *);
void bdc_dump_epsts(struct bdc *);
#else
static inline void bdc_dbg_regs(struct bdc *bdc)
{ }
static inline void bdc_dbg_srr(struct bdc *bdc, u32 srr_num)
{ }
static inline void bdc_dbg_bd_list(struct bdc *bdc, struct bdc_ep *ep)
{ }
static inline void bdc_dump_epsts(struct bdc *bdc)
{ }
#endif /* CONFIG_USB_GADGET_VERBOSE */
#endif /* __LINUX_BDC_DBG_H__ */

2023
drivers/usb/gadget/udc/bdc/bdc_ep.c 100644
View File

File diff suppressed because it is too large Load Diff

22
drivers/usb/gadget/udc/bdc/bdc_ep.h 100644
View File

@ -0,0 +1,22 @@
/*
* bdc_ep.h - header for the BDC debug functions
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __LINUX_BDC_EP_H__
#define __LINUX_BDC_EP_H__
int bdc_init_ep(struct bdc *);
int bdc_ep_disable(struct bdc_ep *);
int bdc_ep_enable(struct bdc_ep *);
void bdc_free_ep(struct bdc *);
#endif /* __LINUX_BDC_EP_H__ */

132
drivers/usb/gadget/udc/bdc/bdc_pci.c 100644
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@ -0,0 +1,132 @@
/*
* bdc_pci.c - BRCM BDC USB3.0 device controller PCI interface file.
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* Based on drivers under drivers/usb/
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/platform_device.h>
#include "bdc.h"
#define BDC_PCI_PID 0x1570
struct bdc_pci {
struct device *dev;
struct platform_device *bdc;
};
static int bdc_setup_msi(struct pci_dev *pci)
{
int ret;
ret = pci_enable_msi(pci);
if (ret) {
pr_err("failed to allocate MSI entry\n");
return ret;
}
return ret;
}
static int bdc_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
{
struct resource res[2];
struct platform_device *bdc;
struct bdc_pci *glue;
int ret = -ENOMEM;
glue = devm_kzalloc(&pci->dev, sizeof(*glue), GFP_KERNEL);
if (!glue)
return -ENOMEM;
glue->dev = &pci->dev;
ret = pci_enable_device(pci);
if (ret) {
dev_err(&pci->dev, "failed to enable pci device\n");
return -ENODEV;
}
pci_set_master(pci);
bdc = platform_device_alloc(BRCM_BDC_NAME, PLATFORM_DEVID_AUTO);
if (!bdc)
return -ENOMEM;
memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
bdc_setup_msi(pci);
res[0].start = pci_resource_start(pci, 0);
res[0].end = pci_resource_end(pci, 0);
res[0].name = BRCM_BDC_NAME;
res[0].flags = IORESOURCE_MEM;
res[1].start = pci->irq;
res[1].name = BRCM_BDC_NAME;
res[1].flags = IORESOURCE_IRQ;
ret = platform_device_add_resources(bdc, res, ARRAY_SIZE(res));
if (ret) {
dev_err(&pci->dev,
"couldn't add resources to bdc device\n");
return ret;
}
pci_set_drvdata(pci, glue);
dma_set_coherent_mask(&bdc->dev, pci->dev.coherent_dma_mask);
bdc->dev.dma_mask = pci->dev.dma_mask;
bdc->dev.dma_parms = pci->dev.dma_parms;
bdc->dev.parent = &pci->dev;
glue->bdc = bdc;
ret = platform_device_add(bdc);
if (ret) {
dev_err(&pci->dev, "failed to register bdc device\n");
platform_device_put(bdc);
return ret;
}
return 0;
}
static void bdc_pci_remove(struct pci_dev *pci)
{
struct bdc_pci *glue = pci_get_drvdata(pci);
platform_device_unregister(glue->bdc);
pci_disable_msi(pci);
}
static struct pci_device_id bdc_pci_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BDC_PCI_PID), },
{} /* Terminating Entry */
};
MODULE_DEVICE_TABLE(pci, bdc_pci_id_table);
static struct pci_driver bdc_pci_driver = {
.name = "bdc-pci",
.id_table = bdc_pci_id_table,
.probe = bdc_pci_probe,
.remove = bdc_pci_remove,
};
MODULE_AUTHOR("Ashwini Pahuja <ashwini.linux@gmail.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("BRCM BDC USB3 PCI Glue layer");
module_pci_driver(bdc_pci_driver);

587
drivers/usb/gadget/udc/bdc/bdc_udc.c 100644
View File

@ -0,0 +1,587 @@
/*
* bdc_udc.c - BRCM BDC USB3.0 device controller gagdet ops
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*
* Based on drivers under drivers/usb/gadget/udc/
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/timer.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/otg.h>
#include <linux/pm.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <asm/unaligned.h>
#include <linux/platform_device.h>
#include "bdc.h"
#include "bdc_ep.h"
#include "bdc_cmd.h"
#include "bdc_dbg.h"
static const struct usb_gadget_ops bdc_gadget_ops;
static const char * const conn_speed_str[] = {
"Not connected",
"Full Speed",
"Low Speed",
"High Speed",
"Super Speed",
};
/* EP0 initial descripror */
static struct usb_endpoint_descriptor bdc_gadget_ep0_desc = {
.bLength = USB_DT_ENDPOINT_SIZE,
.bDescriptorType = USB_DT_ENDPOINT,
.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
.bEndpointAddress = 0,
.wMaxPacketSize = cpu_to_le16(EP0_MAX_PKT_SIZE),
};
/* Advance the srr dqp maintained by SW */
static void srr_dqp_index_advc(struct bdc *bdc, u32 srr_num)
{
struct srr *srr;
srr = &bdc->srr;
dev_dbg_ratelimited(bdc->dev, "srr->dqp_index:%d\n", srr->dqp_index);
srr->dqp_index++;
/* rollback to 0 if we are past the last */
if (srr->dqp_index == NUM_SR_ENTRIES)
srr->dqp_index = 0;
}
/* connect sr */
static void bdc_uspc_connected(struct bdc *bdc)
{
u32 speed, temp;
u32 usppms;
int ret;
temp = bdc_readl(bdc->regs, BDC_USPC);
speed = BDC_PSP(temp);
dev_dbg(bdc->dev, "%s speed=%x\n", __func__, speed);
switch (speed) {
case BDC_SPEED_SS:
bdc_gadget_ep0_desc.wMaxPacketSize =
cpu_to_le16(EP0_MAX_PKT_SIZE);
bdc->gadget.ep0->maxpacket = EP0_MAX_PKT_SIZE;
bdc->gadget.speed = USB_SPEED_SUPER;
/* Enable U1T in SS mode */
usppms = bdc_readl(bdc->regs, BDC_USPPMS);
usppms &= ~BDC_U1T(0xff);
usppms |= BDC_U1T(U1_TIMEOUT);
usppms |= BDC_PORT_W1S;
bdc_writel(bdc->regs, BDC_USPPMS, usppms);
break;
case BDC_SPEED_HS:
bdc_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
bdc->gadget.ep0->maxpacket = 64;
bdc->gadget.speed = USB_SPEED_HIGH;
break;
case BDC_SPEED_FS:
bdc_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
bdc->gadget.ep0->maxpacket = 64;
bdc->gadget.speed = USB_SPEED_FULL;
break;
case BDC_SPEED_LS:
bdc_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
bdc->gadget.ep0->maxpacket = 8;
bdc->gadget.speed = USB_SPEED_LOW;
break;
default:
dev_err(bdc->dev, "UNDEFINED SPEED\n");
return;
}
dev_dbg(bdc->dev, "connected at %s\n", conn_speed_str[speed]);
/* Now we know the speed, configure ep0 */
bdc->bdc_ep_array[1]->desc = &bdc_gadget_ep0_desc;
ret = bdc_config_ep(bdc, bdc->bdc_ep_array[1]);
if (ret)
dev_err(bdc->dev, "EP0 config failed\n");
bdc->bdc_ep_array[1]->usb_ep.desc = &bdc_gadget_ep0_desc;
bdc->bdc_ep_array[1]->flags |= BDC_EP_ENABLED;
usb_gadget_set_state(&bdc->gadget, USB_STATE_DEFAULT);
}
/* device got disconnected */
static void bdc_uspc_disconnected(struct bdc *bdc, bool reinit)
{
struct bdc_ep *ep;
dev_dbg(bdc->dev, "%s\n", __func__);
/*
* Only stop ep0 from here, rest of the endpoints will be disabled
* from gadget_disconnect
*/
ep = bdc->bdc_ep_array[1];
if (ep && (ep->flags & BDC_EP_ENABLED))
/* if enabled then stop and remove requests */
bdc_ep_disable(ep);
if (bdc->gadget_driver && bdc->gadget_driver->disconnect) {
spin_unlock(&bdc->lock);
bdc->gadget_driver->disconnect(&bdc->gadget);
spin_lock(&bdc->lock);
}
/* Set Unknown speed */
bdc->gadget.speed = USB_SPEED_UNKNOWN;
bdc->devstatus &= DEVSTATUS_CLEAR;
bdc->delayed_status = false;
bdc->reinit = reinit;
bdc->test_mode = false;
}
/* TNotify wkaeup timer */
static void bdc_func_wake_timer(struct work_struct *work)
{
struct bdc *bdc = container_of(work, struct bdc, func_wake_notify.work);
unsigned long flags;
dev_dbg(bdc->dev, "%s\n", __func__);
spin_lock_irqsave(&bdc->lock, flags);
/*
* Check if host has started transferring on endpoints
* FUNC_WAKE_ISSUED is cleared when transfer has started after resume
*/
if (bdc->devstatus & FUNC_WAKE_ISSUED) {
dev_dbg(bdc->dev, "FUNC_WAKE_ISSUED FLAG IS STILL SET\n");
/* flag is still set, so again send func wake */
bdc_function_wake_fh(bdc, 0);
schedule_delayed_work(&bdc->func_wake_notify,
msecs_to_jiffies(BDC_TNOTIFY));
}
spin_unlock_irqrestore(&bdc->lock, flags);
}
/* handler for Link state change condition */
static void handle_link_state_change(struct bdc *bdc, u32 uspc)
{
u32 link_state;
dev_dbg(bdc->dev, "Link state change");
link_state = BDC_PST(uspc);
switch (link_state) {
case BDC_LINK_STATE_U3:
if ((bdc->gadget.speed != USB_SPEED_UNKNOWN) &&
bdc->gadget_driver->suspend) {
dev_dbg(bdc->dev, "Entered Suspend mode\n");
spin_unlock(&bdc->lock);
bdc->devstatus |= DEVICE_SUSPENDED;
bdc->gadget_driver->suspend(&bdc->gadget);
spin_lock(&bdc->lock);
}
break;
case BDC_LINK_STATE_U0:
if (bdc->devstatus & REMOTE_WAKEUP_ISSUED) {
bdc->devstatus &= ~REMOTE_WAKEUP_ISSUED;
if (bdc->gadget.speed == USB_SPEED_SUPER) {
bdc_function_wake_fh(bdc, 0);
bdc->devstatus |= FUNC_WAKE_ISSUED;
/*
* Start a Notification timer and check if the
* Host transferred anything on any of the EPs,
* if not then send function wake again every
* TNotification secs until host initiates
* transfer to BDC, USB3 spec Table 8.13
*/
schedule_delayed_work(
&bdc->func_wake_notify,
msecs_to_jiffies(BDC_TNOTIFY));
dev_dbg(bdc->dev, "sched func_wake_notify\n");
}
}
break;
case BDC_LINK_STATE_RESUME:
dev_dbg(bdc->dev, "Resumed from Suspend\n");
if (bdc->devstatus & DEVICE_SUSPENDED) {
bdc->gadget_driver->resume(&bdc->gadget);
bdc->devstatus &= ~DEVICE_SUSPENDED;
}
break;
default:
dev_dbg(bdc->dev, "link state:%d\n", link_state);
}
}
/* something changes on upstream port, handle it here */
void bdc_sr_uspc(struct bdc *bdc, struct bdc_sr *sreport)
{
u32 clear_flags = 0;
u32 uspc;
bool connected = false;
bool disconn = false;
uspc = bdc_readl(bdc->regs, BDC_USPC);
dev_dbg(bdc->dev, "%s uspc=0x%08x\n", __func__, uspc);
/* Port connect changed */
if (uspc & BDC_PCC) {
/* Vbus not present, and not connected to Downstream port */
if ((uspc & BDC_VBC) && !(uspc & BDC_VBS) && !(uspc & BDC_PCS))
disconn = true;
else if ((uspc & BDC_PCS) && !BDC_PST(uspc))
connected = true;
}
/* Change in VBus and VBus is present */
if ((uspc & BDC_VBC) && (uspc & BDC_VBS)) {
if (bdc->pullup) {
dev_dbg(bdc->dev, "Do a softconnect\n");
/* Attached state, do a softconnect */
bdc_softconn(bdc);
usb_gadget_set_state(&bdc->gadget, USB_STATE_POWERED);
}
clear_flags = BDC_VBC;
} else if ((uspc & BDC_PRS) || (uspc & BDC_PRC) || disconn) {
/* Hot reset, warm reset, 2.0 bus reset or disconn */
dev_dbg(bdc->dev, "Port reset or disconn\n");
bdc_uspc_disconnected(bdc, disconn);
clear_flags = BDC_PCC|BDC_PCS|BDC_PRS|BDC_PRC;
} else if ((uspc & BDC_PSC) && (uspc & BDC_PCS)) {
/* Change in Link state */
handle_link_state_change(bdc, uspc);
clear_flags = BDC_PSC|BDC_PCS;
}
/*
* In SS we might not have PRC bit set before connection, but in 2.0
* the PRC bit is set before connection, so moving this condition out
* of bus reset to handle both SS/2.0 speeds.
*/
if (connected) {
/* This is the connect event for U0/L0 */
dev_dbg(bdc->dev, "Connected\n");
bdc_uspc_connected(bdc);
bdc->devstatus &= ~(DEVICE_SUSPENDED);
}
uspc = bdc_readl(bdc->regs, BDC_USPC);
uspc &= (~BDC_USPSC_RW);
dev_dbg(bdc->dev, "uspc=%x\n", uspc);
bdc_writel(bdc->regs, BDC_USPC, clear_flags);
}
/* Main interrupt handler for bdc */
static irqreturn_t bdc_udc_interrupt(int irq, void *_bdc)
{
u32 eqp_index, dqp_index, sr_type, srr_int;
struct bdc_sr *sreport;
struct bdc *bdc = _bdc;
u32 status;
int ret;
spin_lock(&bdc->lock);
status = bdc_readl(bdc->regs, BDC_BDCSC);
if (!(status & BDC_GIP)) {
spin_unlock(&bdc->lock);
return IRQ_NONE;
}
srr_int = bdc_readl(bdc->regs, BDC_SRRINT(0));
/* Check if the SRR IP bit it set? */
if (!(srr_int & BDC_SRR_IP)) {
dev_warn(bdc->dev, "Global irq pending but SRR IP is 0\n");
spin_unlock(&bdc->lock);
return IRQ_NONE;
}
eqp_index = BDC_SRR_EPI(srr_int);
dqp_index = BDC_SRR_DPI(srr_int);
dev_dbg(bdc->dev,
"%s eqp_index=%d dqp_index=%d srr.dqp_index=%d\n\n",
__func__, eqp_index, dqp_index, bdc->srr.dqp_index);
/* check for ring empty condition */
if (eqp_index == dqp_index) {
dev_dbg(bdc->dev, "SRR empty?\n");
spin_unlock(&bdc->lock);
return IRQ_HANDLED;
}
while (bdc->srr.dqp_index != eqp_index) {
sreport = &bdc->srr.sr_bds[bdc->srr.dqp_index];
/* sreport is read before using it */
rmb();
sr_type = le32_to_cpu(sreport->offset[3]) & BD_TYPE_BITMASK;
dev_dbg_ratelimited(bdc->dev, "sr_type=%d\n", sr_type);
switch (sr_type) {
case SR_XSF:
bdc->sr_handler[0](bdc, sreport);
break;
case SR_USPC:
bdc->sr_handler[1](bdc, sreport);
break;
default:
dev_warn(bdc->dev, "SR:%d not handled\n", sr_type);
}
/* Advance the srr dqp index */
srr_dqp_index_advc(bdc, 0);
}
/* update the hw dequeue pointer */
srr_int = bdc_readl(bdc->regs, BDC_SRRINT(0));
srr_int &= ~BDC_SRR_DPI_MASK;
srr_int &= ~(BDC_SRR_RWS|BDC_SRR_RST|BDC_SRR_ISR);
srr_int |= ((bdc->srr.dqp_index) << 16);
srr_int |= BDC_SRR_IP;
bdc_writel(bdc->regs, BDC_SRRINT(0), srr_int);
srr_int = bdc_readl(bdc->regs, BDC_SRRINT(0));
if (bdc->reinit) {
ret = bdc_reinit(bdc);
if (ret)
dev_err(bdc->dev, "err in bdc reinit\n");
}
spin_unlock(&bdc->lock);
return IRQ_HANDLED;
}
/* Gadget ops */
static int bdc_udc_start(struct usb_gadget *gadget,
struct usb_gadget_driver *driver)
{
struct bdc *bdc = gadget_to_bdc(gadget);
unsigned long flags;
int ret = 0;
dev_dbg(bdc->dev, "%s()\n", __func__);
spin_lock_irqsave(&bdc->lock, flags);
if (bdc->gadget_driver) {
dev_err(bdc->dev, "%s is already bound to %s\n",
bdc->gadget.name,
bdc->gadget_driver->driver.name);
ret = -EBUSY;
goto err;
}
/*
* Run the controller from here and when BDC is connected to
* Host then driver will receive a USPC SR with VBUS present
* and then driver will do a softconnect.
*/
ret = bdc_run(bdc);
if (ret) {
dev_err(bdc->dev, "%s bdc run fail\n", __func__);
goto err;
}
bdc->gadget_driver = driver;
bdc->gadget.dev.driver = &driver->driver;
err:
spin_unlock_irqrestore(&bdc->lock, flags);
return ret;
}
static int bdc_udc_stop(struct usb_gadget *gadget)
{
struct bdc *bdc = gadget_to_bdc(gadget);
unsigned long flags;
dev_dbg(bdc->dev, "%s()\n", __func__);
spin_lock_irqsave(&bdc->lock, flags);
bdc_stop(bdc);
bdc->gadget_driver = NULL;
bdc->gadget.dev.driver = NULL;
spin_unlock_irqrestore(&bdc->lock, flags);
return 0;
}
static int bdc_udc_pullup(struct usb_gadget *gadget, int is_on)
{
struct bdc *bdc = gadget_to_bdc(gadget);
unsigned long flags;
u32 uspc;
dev_dbg(bdc->dev, "%s() is_on:%d\n", __func__, is_on);
if (!gadget)
return -EINVAL;
spin_lock_irqsave(&bdc->lock, flags);
if (!is_on) {
bdc_softdisconn(bdc);
bdc->pullup = false;
} else {
/*
* For a self powered device, we need to wait till we receive
* a VBUS change and Vbus present event, then if pullup flag
* is set, then only we present the Termintation.
*/
bdc->pullup = true;
/*
* Check if BDC is already connected to Host i.e Vbus=1,
* if yes, then present TERM now, this is typical for bus
* powered devices.
*/
uspc = bdc_readl(bdc->regs, BDC_USPC);
if (uspc & BDC_VBS)
bdc_softconn(bdc);
}
spin_unlock_irqrestore(&bdc->lock, flags);
return 0;
}
static int bdc_udc_set_selfpowered(struct usb_gadget *gadget,
int is_self)
{
struct bdc *bdc = gadget_to_bdc(gadget);
unsigned long flags;
dev_dbg(bdc->dev, "%s()\n", __func__);
spin_lock_irqsave(&bdc->lock, flags);
if (!is_self)
bdc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
else
bdc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
spin_unlock_irqrestore(&bdc->lock, flags);
return 0;
}
static int bdc_udc_wakeup(struct usb_gadget *gadget)
{
struct bdc *bdc = gadget_to_bdc(gadget);
unsigned long flags;
u8 link_state;
u32 uspc;
int ret = 0;
dev_dbg(bdc->dev,
"%s() bdc->devstatus=%08x\n",
__func__, bdc->devstatus);
if (!(bdc->devstatus & REMOTE_WAKE_ENABLE))
return -EOPNOTSUPP;
spin_lock_irqsave(&bdc->lock, flags);
uspc = bdc_readl(bdc->regs, BDC_USPC);
link_state = BDC_PST(uspc);
dev_dbg(bdc->dev, "link_state =%d portsc=%x", link_state, uspc);
if (link_state != BDC_LINK_STATE_U3) {
dev_warn(bdc->dev,
"can't wakeup from link state %d\n",
link_state);
ret = -EINVAL;
goto out;
}
if (bdc->gadget.speed == USB_SPEED_SUPER)
bdc->devstatus |= REMOTE_WAKEUP_ISSUED;
uspc &= ~BDC_PST_MASK;
uspc &= (~BDC_USPSC_RW);
uspc |= BDC_PST(BDC_LINK_STATE_U0);
uspc |= BDC_SWS;
bdc_writel(bdc->regs, BDC_USPC, uspc);
uspc = bdc_readl(bdc->regs, BDC_USPC);
link_state = BDC_PST(uspc);
dev_dbg(bdc->dev, "link_state =%d portsc=%x", link_state, uspc);
out:
spin_unlock_irqrestore(&bdc->lock, flags);
return ret;
}
static const struct usb_gadget_ops bdc_gadget_ops = {
.wakeup = bdc_udc_wakeup,
.set_selfpowered = bdc_udc_set_selfpowered,
.pullup = bdc_udc_pullup,
.udc_start = bdc_udc_start,
.udc_stop = bdc_udc_stop,
};
/* Init the gadget interface and register the udc */
int bdc_udc_init(struct bdc *bdc)
{
u32 temp;
int ret;
dev_dbg(bdc->dev, "%s()\n", __func__);
bdc->gadget.ops = &bdc_gadget_ops;
bdc->gadget.max_speed = USB_SPEED_SUPER;
bdc->gadget.speed = USB_SPEED_UNKNOWN;
bdc->gadget.dev.parent = bdc->dev;
bdc->gadget.sg_supported = false;
bdc->gadget.name = BRCM_BDC_NAME;
ret = devm_request_irq(bdc->dev, bdc->irq, bdc_udc_interrupt,
IRQF_SHARED , BRCM_BDC_NAME, bdc);
if (ret) {
dev_err(bdc->dev,
"failed to request irq #%d %d\n",
bdc->irq, ret);
return ret;
}
ret = bdc_init_ep(bdc);
if (ret) {
dev_err(bdc->dev, "bdc init ep fail: %d\n", ret);
return ret;
}
ret = usb_add_gadget_udc(bdc->dev, &bdc->gadget);
if (ret) {
dev_err(bdc->dev, "failed to register udc\n");
goto err0;
}
usb_gadget_set_state(&bdc->gadget, USB_STATE_NOTATTACHED);
bdc->bdc_ep_array[1]->desc = &bdc_gadget_ep0_desc;
/*
* Allocate bd list for ep0 only, ep0 will be enabled on connect
* status report when the speed is known
*/
ret = bdc_ep_enable(bdc->bdc_ep_array[1]);
if (ret) {
dev_err(bdc->dev, "fail to enable %s\n",
bdc->bdc_ep_array[1]->name);
goto err1;
}
INIT_DELAYED_WORK(&bdc->func_wake_notify, bdc_func_wake_timer);
/* Enable Interrupts */
temp = bdc_readl(bdc->regs, BDC_BDCSC);
temp |= BDC_GIE;
bdc_writel(bdc->regs, BDC_BDCSC, temp);
return 0;
err1:
usb_del_gadget_udc(&bdc->gadget);
err0:
bdc_free_ep(bdc);
return ret;
}
void bdc_udc_exit(struct bdc *bdc)
{
dev_dbg(bdc->dev, "%s()\n", __func__);
bdc_ep_disable(bdc->bdc_ep_array[1]);
usb_del_gadget_udc(&bdc->gadget);
bdc_free_ep(bdc);
}