Ability to save and restore the power-domain quality of service
settings that get lost and reset on power-domain power cycles. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJXIom/AAoJEPOmecmc0R2BB7cH/RYBFTgvgI5PKJ+JuRyJrDh6 KDVTznZ5g+F99v+0PKtkA9qpToct+4Fo08CeLZPrtLR5vp2icQtbnNgHfV6K+JZu T1NcNHPhI7yufHIBdlvLQlH/o4uLvSYeYuoJA3LwrkI1OYrxElD46PNZEwbGkLiE oggmef8WtsUnZIeDIM4YVzmJabw8EbSTX+L1TUxMwlOJpR/tcct0RwFDdrBf5uKn ionob7GblnJaKg045KhjP9bSpoZrltxwjcPqAZSOF9f2waPBqBPZCiFCNUfMLru6 RzzkCm799/6eFFB7wS87S1/6vnal54BnvfZYXIgnq5yStSHYY2VZX0FDkJhEKro= =hluQ -----END PGP SIGNATURE----- Merge tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers Merge "Rockchip driver updates for v4.7 - part2" from Heiko Stübner: Ability to save and restore the power-domain quality of service settings that get lost and reset on power-domain power cycles. * tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: power-domain: support qos save and restore dt-bindings: modify document of Rockchip power domains
This commit is contained in:
commit
f0653f6768
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@ -20,6 +20,15 @@ Required properties for power domain sub nodes:
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"include/dt-bindings/power/rk3399-power.h" - for RK3399 type power domain.
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- clocks (optional): phandles to clocks which need to be enabled while power domain
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switches state.
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- pm_qos (optional): phandles to qos blocks which need to be saved and restored
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while power domain switches state.
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Qos Example:
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qos_gpu: qos_gpu@ffaf0000 {
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compatible ="syscon";
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reg = <0x0 0xffaf0000 0x0 0x20>;
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};
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Example:
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@ -32,6 +41,7 @@ Example:
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pd_gpu {
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reg = <RK3288_PD_GPU>;
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clocks = <&cru ACLK_GPU>;
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pm_qos = <&qos_gpu>;
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};
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};
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@ -46,10 +46,20 @@ struct rockchip_pmu_info {
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const struct rockchip_domain_info *domain_info;
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};
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#define MAX_QOS_REGS_NUM 5
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#define QOS_PRIORITY 0x08
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#define QOS_MODE 0x0c
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#define QOS_BANDWIDTH 0x10
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#define QOS_SATURATION 0x14
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#define QOS_EXTCONTROL 0x18
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struct rockchip_pm_domain {
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struct generic_pm_domain genpd;
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const struct rockchip_domain_info *info;
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struct rockchip_pmu *pmu;
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int num_qos;
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struct regmap **qos_regmap;
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u32 *qos_save_regs[MAX_QOS_REGS_NUM];
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int num_clks;
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struct clk *clks[];
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};
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@ -118,6 +128,55 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
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return 0;
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}
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static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
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{
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int i;
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for (i = 0; i < pd->num_qos; i++) {
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regmap_read(pd->qos_regmap[i],
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QOS_PRIORITY,
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&pd->qos_save_regs[0][i]);
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regmap_read(pd->qos_regmap[i],
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QOS_MODE,
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&pd->qos_save_regs[1][i]);
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regmap_read(pd->qos_regmap[i],
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QOS_BANDWIDTH,
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&pd->qos_save_regs[2][i]);
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regmap_read(pd->qos_regmap[i],
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QOS_SATURATION,
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&pd->qos_save_regs[3][i]);
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regmap_read(pd->qos_regmap[i],
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QOS_EXTCONTROL,
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&pd->qos_save_regs[4][i]);
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}
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return 0;
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}
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static int rockchip_pmu_restore_qos(struct rockchip_pm_domain *pd)
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{
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int i;
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for (i = 0; i < pd->num_qos; i++) {
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regmap_write(pd->qos_regmap[i],
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QOS_PRIORITY,
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pd->qos_save_regs[0][i]);
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regmap_write(pd->qos_regmap[i],
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QOS_MODE,
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pd->qos_save_regs[1][i]);
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regmap_write(pd->qos_regmap[i],
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QOS_BANDWIDTH,
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pd->qos_save_regs[2][i]);
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regmap_write(pd->qos_regmap[i],
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QOS_SATURATION,
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pd->qos_save_regs[3][i]);
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regmap_write(pd->qos_regmap[i],
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QOS_EXTCONTROL,
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pd->qos_save_regs[4][i]);
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}
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return 0;
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}
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static bool rockchip_pmu_domain_is_on(struct rockchip_pm_domain *pd)
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{
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struct rockchip_pmu *pmu = pd->pmu;
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@ -161,7 +220,7 @@ static int rockchip_pd_power(struct rockchip_pm_domain *pd, bool power_on)
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clk_enable(pd->clks[i]);
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if (!power_on) {
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/* FIXME: add code to save AXI_QOS */
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rockchip_pmu_save_qos(pd);
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/* if powering down, idle request to NIU first */
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rockchip_pmu_set_idle_request(pd, true);
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@ -173,7 +232,7 @@ static int rockchip_pd_power(struct rockchip_pm_domain *pd, bool power_on)
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/* if powering up, leave idle mode */
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rockchip_pmu_set_idle_request(pd, false);
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/* FIXME: add code to restore AXI_QOS */
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rockchip_pmu_restore_qos(pd);
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}
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for (i = pd->num_clks - 1; i >= 0; i--)
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@ -241,9 +300,10 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu,
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{
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const struct rockchip_domain_info *pd_info;
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struct rockchip_pm_domain *pd;
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struct device_node *qos_node;
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struct clk *clk;
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int clk_cnt;
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int i;
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int i, j;
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u32 id;
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int error;
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@ -303,6 +363,45 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu,
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clk, node->name);
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}
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pd->num_qos = of_count_phandle_with_args(node, "pm_qos",
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NULL);
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if (pd->num_qos > 0) {
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pd->qos_regmap = devm_kcalloc(pmu->dev, pd->num_qos,
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sizeof(*pd->qos_regmap),
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GFP_KERNEL);
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if (!pd->qos_regmap) {
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error = -ENOMEM;
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goto err_out;
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}
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for (j = 0; j < MAX_QOS_REGS_NUM; j++) {
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pd->qos_save_regs[j] = devm_kcalloc(pmu->dev,
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pd->num_qos,
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sizeof(u32),
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GFP_KERNEL);
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if (!pd->qos_save_regs[j]) {
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error = -ENOMEM;
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goto err_out;
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}
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}
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for (j = 0; j < pd->num_qos; j++) {
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qos_node = of_parse_phandle(node, "pm_qos", j);
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if (!qos_node) {
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error = -ENODEV;
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goto err_out;
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}
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pd->qos_regmap[j] = syscon_node_to_regmap(qos_node);
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if (IS_ERR(pd->qos_regmap[j])) {
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error = -ENODEV;
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of_node_put(qos_node);
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goto err_out;
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}
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of_node_put(qos_node);
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}
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}
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error = rockchip_pd_power(pd, true);
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if (error) {
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dev_err(pmu->dev,
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