MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpes
The mips_cps_boot_vpes function previously included code to retrieve pointers to the core & VPE boot configuration structs. These structures were used both by mips_cps_boot_vpes and by its mips_cps_core_entry callsite. In preparation for skipping the call to mips_cps_boot_vpes on some invocations of mips_cps_core_entry, pull the calculation of those pointers out into a separate function such that it can continue to be shared. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Niklas Cassel <niklas.cassel@axis.com> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12337/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>hifive-unleashed-5.1
Paul Burton
Ralf Baechle
parent
3dbc997161
commit
f12401d721
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@ -29,7 +29,7 @@ extern struct core_boot_config *mips_cps_core_bootcfg;
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extern void mips_cps_core_entry(void);
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extern void mips_cps_core_init(void);
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extern struct vpe_boot_config *mips_cps_boot_vpes(void);
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extern void mips_cps_boot_vpes(struct core_boot_config *cfg, unsigned vpe);
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extern void mips_cps_pm_save(void);
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extern void mips_cps_pm_restore(void);
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@ -60,6 +60,17 @@
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nop
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.endm
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/* Calculate an uncached address for the CM GCRs */
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.macro cmgcrb dest
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.set push
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.set noat
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MFC0 $1, CP0_CMGCRBASE
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PTR_SLL $1, $1, 4
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PTR_LI \dest, UNCAC_BASE
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PTR_ADDU \dest, \dest, $1
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.set pop
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.endm
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.section .text.cps-vec
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.balign 0x1000
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@ -102,13 +113,8 @@ not_nmi:
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mtc0 t0, CP0_CONFIG
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ehb
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/* Calculate an uncached address for the CM GCRs */
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MFC0 v1, CP0_CMGCRBASE
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PTR_SLL v1, v1, 4
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PTR_LI t0, UNCAC_BASE
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PTR_ADDU v1, v1, t0
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/* Enter the coherent domain */
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cmgcrb v1
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li t0, 0xff
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sw t0, GCR_CL_COHERENCE_OFS(v1)
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ehb
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@ -128,17 +134,22 @@ not_nmi:
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/* Do any EVA initialization if necessary */
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eva_init
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/* Retrieve boot configuration pointers */
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jal mips_cps_get_bootcfg
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nop
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/*
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* Boot any other VPEs within this core that should be online, and
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* deactivate this VPE if it should be offline.
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*/
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move a1, t9
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jal mips_cps_boot_vpes
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nop
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move a0, v0
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/* Off we go! */
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PTR_L t1, VPEBOOTCFG_PC(v0)
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PTR_L gp, VPEBOOTCFG_GP(v0)
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PTR_L sp, VPEBOOTCFG_SP(v0)
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PTR_L t1, VPEBOOTCFG_PC(v1)
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PTR_L gp, VPEBOOTCFG_GP(v1)
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PTR_L sp, VPEBOOTCFG_SP(v1)
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jr t1
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nop
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END(mips_cps_core_entry)
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@ -258,18 +269,21 @@ LEAF(mips_cps_core_init)
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nop
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END(mips_cps_core_init)
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LEAF(mips_cps_boot_vpes)
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/* Retrieve CM base address */
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PTR_LA t0, mips_cm_base
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PTR_L t0, 0(t0)
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/**
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* mips_cps_get_bootcfg() - retrieve boot configuration pointers
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*
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* Returns: pointer to struct core_boot_config in v0, pointer to
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* struct vpe_boot_config in v1, VPE ID in t9
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*/
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LEAF(mips_cps_get_bootcfg)
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/* Calculate a pointer to this cores struct core_boot_config */
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cmgcrb t0
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lw t0, GCR_CL_ID_OFS(t0)
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li t1, COREBOOTCFG_SIZE
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mul t0, t0, t1
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PTR_LA t1, mips_cps_core_bootcfg
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PTR_L t1, 0(t1)
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PTR_ADDU t0, t0, t1
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PTR_ADDU v0, t0, t1
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/* Calculate this VPEs ID. If the core doesn't support MT use 0 */
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li t9, 0
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@ -297,22 +311,27 @@ LEAF(mips_cps_boot_vpes)
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1: /* Calculate a pointer to this VPEs struct vpe_boot_config */
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li t1, VPEBOOTCFG_SIZE
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mul v0, t9, t1
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PTR_L ta3, COREBOOTCFG_VPECONFIG(t0)
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PTR_ADDU v0, v0, ta3
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mul v1, t9, t1
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PTR_L ta3, COREBOOTCFG_VPECONFIG(v0)
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PTR_ADDU v1, v1, ta3
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#ifdef CONFIG_MIPS_MT_SMP
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/* If the core doesn't support MT then return */
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bnez ta2, 1f
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nop
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jr ra
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nop
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END(mips_cps_get_bootcfg)
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LEAF(mips_cps_boot_vpes)
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PTR_L ta2, COREBOOTCFG_VPEMASK(a0)
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PTR_L ta3, COREBOOTCFG_VPECONFIG(a0)
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#ifdef CONFIG_MIPS_MT
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.set push
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.set mt
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1: /* Enter VPE configuration state */
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/* If the core doesn't support MT then return */
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has_mt t0, 5f
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/* Enter VPE configuration state */
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dvpe
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PTR_LA t1, 1f
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jr.hb t1
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@ -323,7 +342,6 @@ LEAF(mips_cps_boot_vpes)
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ehb
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/* Loop through each VPE */
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PTR_L ta2, COREBOOTCFG_VPEMASK(t0)
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move t8, ta2
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li ta1, 0
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@ -400,7 +418,7 @@ LEAF(mips_cps_boot_vpes)
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/* Check whether this VPE is meant to be running */
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li t0, 1
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sll t0, t0, t9
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sll t0, t0, a1
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and t0, t0, t8
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bnez t0, 2f
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nop
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@ -417,7 +435,7 @@ LEAF(mips_cps_boot_vpes)
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#endif /* CONFIG_MIPS_MT_SMP */
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/* Return */
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jr ra
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5: jr ra
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nop
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END(mips_cps_boot_vpes)
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@ -250,7 +250,10 @@ static void boot_core(unsigned core)
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static void remote_vpe_boot(void *dummy)
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{
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mips_cps_boot_vpes();
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unsigned core = current_cpu_data.core;
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struct core_boot_config *core_cfg = &mips_cps_core_bootcfg[core];
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mips_cps_boot_vpes(core_cfg, cpu_vpe_id(¤t_cpu_data));
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}
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static void cps_boot_secondary(int cpu, struct task_struct *idle)
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@ -296,7 +299,7 @@ static void cps_boot_secondary(int cpu, struct task_struct *idle)
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BUG_ON(!cpu_has_mipsmt);
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/* Boot a VPE on this core */
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mips_cps_boot_vpes();
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mips_cps_boot_vpes(core_cfg, vpe_id);
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out:
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preempt_enable();
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}
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