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ASoC: wm9081: Fix reading wrong register for setting VMID 2*240k 

VMID Divider Enable and Select is controlled by BIT[2:1] of WM9081_VMID_CONTROL
register (04h).
Current code reads wrong register (WM9081_BIAS_CONTROL_1) for setting
VMID 2*240k.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
hifive-unleashed-5.1
Axel Lin 2011-11-05 14:47:19 +08:00 committed by Mark Brown
parent 1dd6c0770d
commit f1e10354fc
1 changed files with 1 additions and 1 deletions
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2
sound/soc/codecs/wm9081.c
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@ -818,7 +818,7 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
}
/* VMID 2*240k */
reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
reg = snd_soc_read(codec, WM9081_VMID_CONTROL);
reg &= ~WM9081_VMID_SEL_MASK;
reg |= 0x04;
snd_soc_write(codec, WM9081_VMID_CONTROL, reg);