ASoC: Refactor WM8958 DSP to support additional algorithms
In preparation for the addition of additional WM8958 algorithms reorganise the code to make it easier to add such support later. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@ti.com>
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fbbf592002
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@ -189,7 +189,7 @@ ok:
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return ret;
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}
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static void wm8958_mbc_apply(struct snd_soc_codec *codec, int mbc, int start)
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static void wm8958_dsp_start_mbc(struct snd_soc_codec *codec, int path)
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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struct wm8994_pdata *pdata = wm8994->pdata;
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@ -237,9 +237,9 @@ static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
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int ena, reg, aif, i;
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int ena, reg, aif;
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switch (mbc) {
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switch (path) {
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case 0:
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pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
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aif = 0;
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@ -257,64 +257,34 @@ static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
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return;
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}
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/* We can only enable the MBC if the AIF is enabled and we
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* want it to be enabled. */
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ena = pwr_reg && wm8994->mbc_ena[mbc];
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/* Do we have both an active AIF and an active algorithm? */
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ena = wm8994->mbc_ena[path];
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if (!pwr_reg)
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ena = 0;
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reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
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dev_dbg(codec->dev, "MBC %d startup: %d, power: %x, DSP: %x\n",
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mbc, start, pwr_reg, reg);
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dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
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path, wm8994->dsp_active, start, pwr_reg, reg);
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if (start && ena) {
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/* If the DSP is already running then noop */
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if (reg & WM8958_DSP2_ENA)
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return;
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/* If neither AIFnCLK is not yet enabled postpone */
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/* If either AIFnCLK is not yet enabled postpone */
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if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
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& WM8994_AIF1CLK_ENA_MASK) &&
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!(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
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& WM8994_AIF2CLK_ENA_MASK))
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return;
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/* If we have MBC firmware download it */
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if (wm8994->mbc && wm8994->mbc_ena[mbc])
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wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
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/* Switch the clock over to the appropriate AIF */
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snd_soc_update_bits(codec, WM8994_CLOCKING_1,
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WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
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aif << WM8958_DSP2CLK_SRC_SHIFT |
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WM8958_DSP2CLK_ENA);
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snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
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WM8958_DSP2_ENA, WM8958_DSP2_ENA);
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if (wm8994->mbc_ena[path])
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wm8958_dsp_start_mbc(codec, path);
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/* If we've got user supplied MBC settings use them */
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if (pdata && pdata->num_mbc_cfgs) {
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struct wm8958_mbc_cfg *cfg
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= &pdata->mbc_cfgs[wm8994->mbc_cfg];
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for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
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snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
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cfg->coeff_regs[i]);
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for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
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snd_soc_write(codec,
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i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
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cfg->cutoff_regs[i]);
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}
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/* Run the DSP */
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snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
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WM8958_DSP2_RUNR);
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/* And we're off! */
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snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
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WM8958_MBC_ENA | WM8958_MBC_SEL_MASK,
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mbc << WM8958_MBC_SEL_SHIFT |
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WM8958_MBC_ENA);
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dev_dbg(codec->dev, "DSP running\n");
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} else {
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/* If the DSP is already stopped then noop */
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if (!(reg & WM8958_DSP2_ENA))
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@ -322,10 +292,16 @@ static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
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snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
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WM8958_MBC_ENA, 0);
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snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
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WM8958_DSP2_STOP);
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snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
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WM8958_DSP2_ENA, 0);
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snd_soc_update_bits(codec, WM8994_CLOCKING_1,
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WM8958_DSP2CLK_ENA, 0);
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wm8994->dsp_active = -1;
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dev_dbg(codec->dev, "DSP stopped\n");
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}
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}
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@ -339,18 +315,33 @@ int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMU:
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case SND_SOC_DAPM_PRE_PMU:
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for (i = 0; i < 3; i++)
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wm8958_mbc_apply(codec, i, 1);
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wm8958_dsp_apply(codec, i, 1);
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break;
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case SND_SOC_DAPM_POST_PMD:
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case SND_SOC_DAPM_PRE_PMD:
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for (i = 0; i < 3; i++)
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wm8958_mbc_apply(codec, i, 0);
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wm8958_dsp_apply(codec, i, 0);
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break;
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}
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return 0;
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}
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/* Check if DSP2 is in use on another AIF */
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static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
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if (i == aif)
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continue;
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if (wm8994->mbc_ena[i])
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return 1;
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}
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return 0;
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}
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static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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@ -410,23 +401,20 @@ static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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int mbc = kcontrol->private_value;
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int i;
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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if (ucontrol->value.integer.value[0] > 1)
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
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if (mbc != i && wm8994->mbc_ena[i]) {
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dev_dbg(codec->dev, "MBC %d active already\n", mbc);
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return -EBUSY;
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}
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if (wm8958_dsp2_busy(wm8994, mbc)) {
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dev_dbg(codec->dev, "DSP2 active on %d already\n", mbc);
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return -EBUSY;
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}
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wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
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wm8958_mbc_apply(codec, mbc, wm8994->mbc_ena[mbc]);
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wm8958_dsp_apply(codec, mbc, wm8994->mbc_ena[mbc]);
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return 0;
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}
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@ -462,10 +450,12 @@ void wm8958_dsp2_init(struct snd_soc_codec *codec)
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struct wm8994_pdata *pdata = wm8994->pdata;
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int ret, i;
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wm8994->dsp_active = -1;
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snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
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ARRAY_SIZE(wm8958_mbc_snd_controls));
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/* We don't require firmware and don't want to delay boot */
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/* We don't *require* firmware and don't want to delay boot */
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request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
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"wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
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codec, wm8958_mbc_loaded);
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@ -116,6 +116,7 @@ struct wm8994_priv {
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unsigned int aif1clk_disable:1;
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unsigned int aif2clk_disable:1;
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int dsp_active;
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const struct firmware *cur_fw;
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const struct firmware *mbc;
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};
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