riscv: Add STACKPROTECTOR supported
The -fstack-protector & -fstack-protector-strong features are from gcc. The patch only add basic kernel support to stack-protector feature and some arch could have its own solution such as ARM64_PTR_AUTH. After enabling STACKPROTECTOR and STACKPROTECTOR_STRONG, the .text size is expanded from 0x7de066 to 0x81fb32 (only 5%) to add canary checking code. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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@ -66,6 +66,7 @@ config RISCV
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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select HAVE_PERF_USER_STACK_DUMP
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select HAVE_STACKPROTECTOR
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select HAVE_SYSCALL_TRACEPOINTS
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select IRQ_DOMAIN
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select MODULES_USE_ELF_RELA if MODULES
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33
arch/riscv/include/asm/stackprotector.h
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33
arch/riscv/include/asm/stackprotector.h
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@ -0,0 +1,33 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_RISCV_STACKPROTECTOR_H
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#define _ASM_RISCV_STACKPROTECTOR_H
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#include <linux/random.h>
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#include <linux/version.h>
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#include <asm/timex.h>
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extern unsigned long __stack_chk_guard;
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/*
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* Initialize the stackprotector canary value.
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*
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* NOTE: this must only be called from functions that never return,
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* and it must always be inlined.
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*/
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static __always_inline void boot_init_stack_canary(void)
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{
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unsigned long canary;
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unsigned long tsc;
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/* Try to get a semi random initial value. */
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get_random_bytes(&canary, sizeof(canary));
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tsc = get_cycles();
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canary += tsc + (tsc << BITS_PER_LONG/2);
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canary ^= LINUX_VERSION_CODE;
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canary &= CANARY_MASK;
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current->stack_canary = canary;
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__stack_chk_guard = current->stack_canary;
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}
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#endif /* _ASM_RISCV_STACKPROTECTOR_H */
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@ -24,6 +24,12 @@
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register unsigned long gp_in_global __asm__("gp");
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#ifdef CONFIG_STACKPROTECTOR
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#include <linux/stackprotector.h>
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unsigned long __stack_chk_guard __read_mostly;
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EXPORT_SYMBOL(__stack_chk_guard);
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#endif
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extern asmlinkage void ret_from_fork(void);
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extern asmlinkage void ret_from_kernel_thread(void);
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