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Blackfin: fix detection of cached L2 SRAM

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Make sure our bfin_addr_dcachable() function flags cached L2 SRAM properly
else memory easily goes unflushed when working with DMA.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2009-05-19 12:58:13 +00:00
parent c8f36dc3c1
commit f339f46b05
1 changed files with 5 additions and 0 deletions
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5
arch/blackfin/include/asm/cacheflush.h
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@ -108,6 +108,11 @@ static inline int bfin_addr_dcachable(unsigned long addr)
addr >= _ramend && addr < physical_mem_end)
return 1;
#ifndef CONFIG_BFIN_L2_NOT_CACHED
if (addr >= L2_START && addr < L2_START + L2_LENGTH)
return 1;
#endif
return 0;
}