sh: hwblk index rework
Rework the sh7722/sh7723/sh7724 hwblk code to use the hwblk id as index in the mstp clock array. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -59,7 +59,7 @@ void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
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/* allow clocks to enable and disable hardware blocks */
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#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \
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{ \
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[_hwblk] = { \
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.name = _name, \
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.id = _id, \
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.parent = _parent, \
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@ -146,6 +146,11 @@ int __init sh_hwblk_clk_register(struct clk *clks, int nr)
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for (k = 0; !ret && (k < nr); k++) {
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clkp = clks + k;
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/* skip over clocks using hwblk 0 (HWBLK_UNKNOWN) */
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if (!clkp->arch_flags)
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continue;
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clkp->ops = &sh_hwblk_clk_ops;
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ret |= clk_register(clkp);
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}
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@ -157,7 +157,7 @@ struct clk div6_clks[] = {
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#define B_CLK &div4_clks[DIV4_B]
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#define U_CLK &div4_clks[DIV4_U]
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static struct clk mstp_clks[] = {
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static struct clk mstp_clks[HWBLK_NR] = {
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SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("tmu_fck", -1, P_CLK, HWBLK_TMU, 0),
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@ -213,7 +213,7 @@ int __init arch_clk_init(void)
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ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
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if (!ret)
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ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
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ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
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return ret;
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}
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@ -218,32 +218,32 @@ static struct clk_lookup lookups[] = {
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/* TMU0 */
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.dev_id = "sh_tmu.0",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[11], /* tmu012_fck */
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.clk = &mstp_clks[HWBLK_TMU0],
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}, {
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/* TMU1 */
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.dev_id = "sh_tmu.1",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[11],
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.clk = &mstp_clks[HWBLK_TMU0],
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}, {
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/* TMU2 */
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.dev_id = "sh_tmu.2",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[11],
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.clk = &mstp_clks[HWBLK_TMU0],
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}, {
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/* TMU3 */
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.dev_id = "sh_tmu.3",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[15], /* tmu345_fck */
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.clk = &mstp_clks[HWBLK_TMU1],
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}, {
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/* TMU4 */
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.dev_id = "sh_tmu.4",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[15],
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.clk = &mstp_clks[HWBLK_TMU1],
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}, {
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/* TMU5 */
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.dev_id = "sh_tmu.5",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[15],
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.clk = &mstp_clks[HWBLK_TMU1],
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},
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};
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@ -277,7 +277,7 @@ int __init arch_clk_init(void)
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ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
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if (!ret)
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ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
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ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
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return ret;
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}
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@ -178,7 +178,7 @@ struct clk div6_clks[] = {
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#define I_CLK (&div4_clks[DIV4_I])
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#define SH_CLK (&div4_clks[DIV4_SH])
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static struct clk mstp_clks[] = {
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static struct clk mstp_clks[HWBLK_NR] = {
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SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
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@ -240,32 +240,32 @@ static struct clk_lookup lookups[] = {
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/* TMU0 */
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.dev_id = "sh_tmu.0",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[12], /* tmu012_fck */
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.clk = &mstp_clks[HWBLK_TMU0],
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}, {
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/* TMU1 */
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.dev_id = "sh_tmu.1",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[12],
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.clk = &mstp_clks[HWBLK_TMU0],
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}, {
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/* TMU2 */
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.dev_id = "sh_tmu.2",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[12],
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.clk = &mstp_clks[HWBLK_TMU0],
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}, {
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/* TMU3 */
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.dev_id = "sh_tmu.3",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[16], /* tmu345_fck */
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.clk = &mstp_clks[HWBLK_TMU1],
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}, {
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/* TMU4 */
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.dev_id = "sh_tmu.4",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[16],
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.clk = &mstp_clks[HWBLK_TMU1],
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}, {
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/* TMU5 */
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.dev_id = "sh_tmu.5",
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.con_id = "tmu_fck",
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.clk = &mstp_clks[16],
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.clk = &mstp_clks[HWBLK_TMU1],
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},
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};
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@ -291,7 +291,7 @@ int __init arch_clk_init(void)
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ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
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if (!ret)
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ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
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ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
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return ret;
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}
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