redonkable/alistair23-linux
redonkable/alistair23-linux
1
0
Fork 0
Code Releases Activity

sh: hwblk index rework

Browse source 
Rework the sh7722/sh7723/sh7724 hwblk code to use the
hwblk id as index in the mstp clock array.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm 2010-05-10 14:01:02 +00:00 committed by Paul Mundt
parent 9b7a37853a
commit f3d51e13fe
5 changed files with 23 additions and 18 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/sh/include/asm/hwblk.h
View file

@ -59,7 +59,7 @@ void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
/* allow clocks to enable and disable hardware blocks */
#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \
{ \
[_hwblk] = { \
.name = _name, \
.id = _id, \
.parent = _parent, \

5
arch/sh/kernel/cpu/hwblk.c
View file

@ -146,6 +146,11 @@ int __init sh_hwblk_clk_register(struct clk *clks, int nr)
for (k = 0; !ret && (k < nr); k++) {
clkp = clks + k;
/* skip over clocks using hwblk 0 (HWBLK_UNKNOWN) */
if (!clkp->arch_flags)
continue;
clkp->ops = &sh_hwblk_clk_ops;
ret |= clk_register(clkp);
}

4
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View file

@ -157,7 +157,7 @@ struct clk div6_clks[] = {
#define B_CLK &div4_clks[DIV4_B]
#define U_CLK &div4_clks[DIV4_U]
static struct clk mstp_clks[] = {
static struct clk mstp_clks[HWBLK_NR] = {
SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("tmu_fck", -1, P_CLK, HWBLK_TMU, 0),
@ -213,7 +213,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
return ret;
}

14
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
View file

@ -218,32 +218,32 @@ static struct clk_lookup lookups[] = {
/* TMU0 */
.dev_id = "sh_tmu.0",
.con_id = "tmu_fck",
.clk = &mstp_clks[11], /* tmu012_fck */
.clk = &mstp_clks[HWBLK_TMU0],
}, {
/* TMU1 */
.dev_id = "sh_tmu.1",
.con_id = "tmu_fck",
.clk = &mstp_clks[11],
.clk = &mstp_clks[HWBLK_TMU0],
}, {
/* TMU2 */
.dev_id = "sh_tmu.2",
.con_id = "tmu_fck",
.clk = &mstp_clks[11],
.clk = &mstp_clks[HWBLK_TMU0],
}, {
/* TMU3 */
.dev_id = "sh_tmu.3",
.con_id = "tmu_fck",
.clk = &mstp_clks[15], /* tmu345_fck */
.clk = &mstp_clks[HWBLK_TMU1],
}, {
/* TMU4 */
.dev_id = "sh_tmu.4",
.con_id = "tmu_fck",
.clk = &mstp_clks[15],
.clk = &mstp_clks[HWBLK_TMU1],
}, {
/* TMU5 */
.dev_id = "sh_tmu.5",
.con_id = "tmu_fck",
.clk = &mstp_clks[15],
.clk = &mstp_clks[HWBLK_TMU1],
},
};
@ -277,7 +277,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
return ret;
}

16
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View file

@ -178,7 +178,7 @@ struct clk div6_clks[] = {
#define I_CLK (&div4_clks[DIV4_I])
#define SH_CLK (&div4_clks[DIV4_SH])
static struct clk mstp_clks[] = {
static struct clk mstp_clks[HWBLK_NR] = {
SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
@ -240,32 +240,32 @@ static struct clk_lookup lookups[] = {
/* TMU0 */
.dev_id = "sh_tmu.0",
.con_id = "tmu_fck",
.clk = &mstp_clks[12], /* tmu012_fck */
.clk = &mstp_clks[HWBLK_TMU0],
}, {
/* TMU1 */
.dev_id = "sh_tmu.1",
.con_id = "tmu_fck",
.clk = &mstp_clks[12],
.clk = &mstp_clks[HWBLK_TMU0],
}, {
/* TMU2 */
.dev_id = "sh_tmu.2",
.con_id = "tmu_fck",
.clk = &mstp_clks[12],
.clk = &mstp_clks[HWBLK_TMU0],
}, {
/* TMU3 */
.dev_id = "sh_tmu.3",
.con_id = "tmu_fck",
.clk = &mstp_clks[16], /* tmu345_fck */
.clk = &mstp_clks[HWBLK_TMU1],
}, {
/* TMU4 */
.dev_id = "sh_tmu.4",
.con_id = "tmu_fck",
.clk = &mstp_clks[16],
.clk = &mstp_clks[HWBLK_TMU1],
}, {
/* TMU5 */
.dev_id = "sh_tmu.5",
.con_id = "tmu_fck",
.clk = &mstp_clks[16],
.clk = &mstp_clks[HWBLK_TMU1],
},
};
@ -291,7 +291,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
return ret;
}