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ARM: dts: imx: add cooling-cells for cpufreq cooling device 

Add #cooling-cells for i.MX6/7 SoCs for cpufreq cooling device usage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bastian Stender <bst@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
hifive-unleashed-5.1
Anson Huang 2018-06-08 11:06:40 +02:00 committed by Shawn Guo
parent 328bd82526
commit f3d80deb08
6 changed files with 6 additions and 0 deletions
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1
arch/arm/boot/dts/imx6dl.dtsi
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@ -33,6 +33,7 @@
396000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6QDL_CLK_ARM>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
<&clks IMX6QDL_CLK_STEP>,

1
arch/arm/boot/dts/imx6q.dtsi
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@ -38,6 +38,7 @@
396000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6QDL_CLK_ARM>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
<&clks IMX6QDL_CLK_STEP>,

1
arch/arm/boot/dts/imx6sl.dtsi
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@ -60,6 +60,7 @@
396000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
<&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
<&clks IMX6SL_CLK_PLL1_SYS>;

1
arch/arm/boot/dts/imx6sx.dtsi
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@ -79,6 +79,7 @@
198000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6SX_CLK_ARM>,
<&clks IMX6SX_CLK_PLL2_PFD2>,
<&clks IMX6SX_CLK_STEP>,

1
arch/arm/boot/dts/imx6ul.dtsi
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@ -62,6 +62,7 @@
device_type = "cpu";
reg = <0>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
operating-points = <
/* kHz uV */
696000 1275000

1
arch/arm/boot/dts/imx7d.dtsi
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@ -11,6 +11,7 @@
cpu0: cpu@0 {
clock-frequency = <996000000>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {