From f41b17fc3f124729e0778f64ba2039f4b71b0fc6 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Sun, 17 Jan 2016 20:04:31 +0200 Subject: [PATCH] staging: sm750fb: change definition of POWER_MODE_CTRL multi-bit field Use more straight-forward definitions for multi-bit field of POWER_MODE_CTRL register and use open-coded implementation for register manipulations. Signed-off-by: Mike Rapoport Signed-off-by: Greg Kroah-Hartman --- drivers/staging/sm750fb/ddk750_power.c | 13 +++++-------- drivers/staging/sm750fb/ddk750_reg.h | 8 ++++---- 2 files changed, 9 insertions(+), 12 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/ddk750_power.c index 4959482cbeb5..c85dfc509b04 100644 --- a/drivers/staging/sm750fb/ddk750_power.c +++ b/drivers/staging/sm750fb/ddk750_power.c @@ -21,7 +21,7 @@ static unsigned int getPowerMode(void) { if (getChipType() == SM750LE) return 0; - return FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE); + return PEEK32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK; } @@ -33,25 +33,22 @@ void setPowerMode(unsigned int powerMode) { unsigned int control_value = 0; - control_value = PEEK32(POWER_MODE_CTRL); + control_value = PEEK32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK; if (getChipType() == SM750LE) return; switch (powerMode) { case POWER_MODE_CTRL_MODE_MODE0: - control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, - MODE0); + control_value |= POWER_MODE_CTRL_MODE_MODE0; break; case POWER_MODE_CTRL_MODE_MODE1: - control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, - MODE1); + control_value |= POWER_MODE_CTRL_MODE_MODE1; break; case POWER_MODE_CTRL_MODE_SLEEP: - control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, - SLEEP); + control_value |= POWER_MODE_CTRL_MODE_SLEEP; break; default: diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h index bc49b44c611d..a90b56f55f1e 100644 --- a/drivers/staging/sm750fb/ddk750_reg.h +++ b/drivers/staging/sm750fb/ddk750_reg.h @@ -501,10 +501,10 @@ #endif #define POWER_MODE_CTRL_OSC_INPUT BIT(3) #define POWER_MODE_CTRL_ACPI BIT(2) -#define POWER_MODE_CTRL_MODE 1:0 -#define POWER_MODE_CTRL_MODE_MODE0 0 -#define POWER_MODE_CTRL_MODE_MODE1 1 -#define POWER_MODE_CTRL_MODE_SLEEP 2 +#define POWER_MODE_CTRL_MODE_MASK (0x3 << 0) +#define POWER_MODE_CTRL_MODE_MODE0 (0x0 << 0) +#define POWER_MODE_CTRL_MODE_MODE1 (0x1 << 0) +#define POWER_MODE_CTRL_MODE_SLEEP (0x2 << 0) #define PCI_MASTER_BASE 0x000050 #define PCI_MASTER_BASE_ADDRESS 7:0