ARM: 6617/1: mmc, Add zboot from MMC support for SuperH Mobile ARM
This allows a ROM-able zImage to be written to MMC and for SuperH Mobile ARM to boot directly from the MMCIF hardware block. This is achieved by the MaskROM loading the first portion of the image into MERAM and then jumping to it. This portion contains loader code which copies the entire image to SDRAM and jumps to it. From there the zImage boot code proceeds as normal, uncompressing the image into its final location and then jumping to it. Cc: Magnus Damm <magnus.damm@gmail.com> Russell, please consider merging this for 2.6.38. This patch depends on: * "mmc, sh: Move MMCIF_PROGRESS_* into sh_mmcif.h" which will be merged though Paul Mundt's rmobile sh-2.6. The absence of this patch will break the build if the (new) CONFIG_ZBOOT_ROM_MMCIF option is set. There are no subtle side-effects. v2: Addressed comments by Magnus Damm * Fix copyright in vrl4.c * Fix use of #define CONFIG_ZBOOT_ROM_MMCIF in mmcif-sh7372.c * Initialise LED GPIO lines in head-ap4evb.txt instead of mmcif-sh7372.c as this is considered board-specific. v3: Addressed comments made in person by Magnus Damm * Move mmcif_loader to be earlier in the image and reduce the number of blocks of boot program loaded by the MaskRom from 40 to 8 accordingly. * Move LED GPIO initialisation into mmcif_progress_init - This leaves the partner jet script unbloated Other * inline mmcif_update_progress so it is a static inline in a header file v4: * Use htole16() and htole32() in v4rl.c to ensure that the output is little endian v5: Addressed comments by Russell King * Simplify assembly code * Jump to code rather than an address <- bug fix * Use (void __iomem *) as appropriate Roll in mackerel support * This was previously a separate patch, only because of the order in which this code was developed Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>hifive-unleashed-5.1
Simon Horman
Russell King
parent
1bae4ce27c
commit
f45b114991
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@ -0,0 +1,8 @@
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BIN := vrl4
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.PHONY: all
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all: $(BIN)
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.PHONY: clean
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clean:
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rm -f *.o $(BIN)
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@ -0,0 +1,169 @@
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/*
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* vrl4 format generator
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*
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* Copyright (C) 2010 Simon Horman
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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/*
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* usage: vrl4 < zImage > out
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* dd if=out of=/dev/sdx bs=512 seek=1 # Write the image to sector 1
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*
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* Reads a zImage from stdin and writes a vrl4 image to stdout.
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* In practice this means writing a padded vrl4 header to stdout followed
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* by the zImage.
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*
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* The padding places the zImage at ALIGN bytes into the output.
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* The vrl4 uses ALIGN + START_BASE as the start_address.
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* This is where the mask ROM will jump to after verifying the header.
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*
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* The header sets copy_size to min(sizeof(zImage), MAX_BOOT_PROG_LEN) + ALIGN.
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* That is, the mask ROM will load the padded header (ALIGN bytes)
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* And then MAX_BOOT_PROG_LEN bytes of the image, or the entire image,
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* whichever is smaller.
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*
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* The zImage is not modified in any way.
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*/
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#define _BSD_SOURCE
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#include <endian.h>
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#include <unistd.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <errno.h>
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struct hdr {
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uint32_t magic1;
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uint32_t reserved1;
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uint32_t magic2;
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uint32_t reserved2;
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uint16_t copy_size;
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uint16_t boot_options;
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uint32_t reserved3;
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uint32_t start_address;
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uint32_t reserved4;
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uint32_t reserved5;
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char reserved6[308];
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};
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#define DECLARE_HDR(h) \
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struct hdr (h) = { \
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.magic1 = htole32(0xea000000), \
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.reserved1 = htole32(0x56), \
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.magic2 = htole32(0xe59ff008), \
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.reserved3 = htole16(0x1) }
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/* Align to 512 bytes, the MMCIF sector size */
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#define ALIGN_BITS 9
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#define ALIGN (1 << ALIGN_BITS)
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#define START_BASE 0xe55b0000
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/*
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* With an alignment of 512 the header uses the first sector.
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* There is a 128 sector (64kbyte) limit on the data loaded by the mask ROM.
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* So there are 127 sectors left for the boot programme. But in practice
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* Only a small portion of a zImage is needed, 16 sectors should be more
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* than enough.
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*
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* Note that this sets how much of the zImage is copied by the mask ROM.
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* The entire zImage is present after the header and is loaded
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* by the code in the boot program (which is the first portion of the zImage).
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*/
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#define MAX_BOOT_PROG_LEN (16 * 512)
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#define ROUND_UP(x) ((x + ALIGN - 1) & ~(ALIGN - 1))
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ssize_t do_read(int fd, void *buf, size_t count)
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{
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size_t offset = 0;
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ssize_t l;
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while (offset < count) {
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l = read(fd, buf + offset, count - offset);
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if (!l)
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break;
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if (l < 0) {
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if (errno == EAGAIN || errno == EWOULDBLOCK)
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continue;
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perror("read");
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return -1;
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}
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offset += l;
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}
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return offset;
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}
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ssize_t do_write(int fd, const void *buf, size_t count)
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{
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size_t offset = 0;
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ssize_t l;
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while (offset < count) {
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l = write(fd, buf + offset, count - offset);
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if (l < 0) {
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if (errno == EAGAIN || errno == EWOULDBLOCK)
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continue;
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perror("write");
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return -1;
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}
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offset += l;
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}
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return offset;
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}
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ssize_t write_zero(int fd, size_t len)
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{
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size_t i = len;
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while (i--) {
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const char x = 0;
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if (do_write(fd, &x, 1) < 0)
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return -1;
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}
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return len;
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}
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int main(void)
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{
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DECLARE_HDR(hdr);
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char boot_program[MAX_BOOT_PROG_LEN];
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size_t aligned_hdr_len, alligned_prog_len;
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ssize_t prog_len;
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prog_len = do_read(0, boot_program, sizeof(boot_program));
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if (prog_len <= 0)
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return -1;
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aligned_hdr_len = ROUND_UP(sizeof(hdr));
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hdr.start_address = htole32(START_BASE + aligned_hdr_len);
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alligned_prog_len = ROUND_UP(prog_len);
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hdr.copy_size = htole16(aligned_hdr_len + alligned_prog_len);
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if (do_write(1, &hdr, sizeof(hdr)) < 0)
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return -1;
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if (write_zero(1, aligned_hdr_len - sizeof(hdr)) < 0)
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return -1;
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if (do_write(1, boot_program, prog_len) < 0)
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return 1;
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/* Write out the rest of the kernel */
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while (1) {
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prog_len = do_read(0, boot_program, sizeof(boot_program));
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if (prog_len < 0)
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return 1;
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if (prog_len == 0)
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break;
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if (do_write(1, boot_program, prog_len) < 0)
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return 1;
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}
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return 0;
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}
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@ -0,0 +1,29 @@
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ROM-able zImage boot from MMC
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-----------------------------
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An ROM-able zImage compiled with ZBOOT_ROM_MMCIF may be written to MMC and
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SuperH Mobile ARM will to boot directly from the MMCIF hardware block.
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This is achieved by the mask ROM loading the first portion of the image into
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MERAM and then jumping to it. This portion contains loader code which
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copies the entire image to SDRAM and jumps to it. From there the zImage
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boot code proceeds as normal, uncompressing the image into its final
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location and then jumping to it.
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This code has been tested on an AP4EB board using the developer 1A eMMC
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boot mode which is configured using the following jumper settings.
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The board used for testing required a patched mask ROM in order for
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this mode to function.
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8 7 6 5 4 3 2 1
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x|x|x|x|x| |x|
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S4 -+-+-+-+-+-+-+-
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| | | | |x| |x on
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The zImage must be written to the MMC card at sector 1 (512 bytes) in
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vrl4 format. A utility vrl4 is supplied to accomplish this.
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e.g.
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vrl4 < zImage | dd of=/dev/sdX bs=512 seek=1
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A dual-voltage MMC 4.0 card was used for testing.
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@ -1619,6 +1619,18 @@ config ZBOOT_ROM
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Say Y here if you intend to execute your compressed kernel image
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(zImage) directly from ROM or flash. If unsure, say N.
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config ZBOOT_ROM_MMCIF
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bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
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depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
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help
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Say Y here to include experimental MMCIF loading code in the
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ROM-able zImage. With this enabled it is possible to write the
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the ROM-able zImage kernel image to an MMC card and boot the
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kernel straight from the reset vector. At reset the processor
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Mask ROM will load the first part of the the ROM-able zImage
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which in turn loads the rest the kernel image to RAM using the
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MMCIF hardware block.
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config CMDLINE
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string "Default kernel command string"
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default ""
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@ -4,9 +4,20 @@
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# create a compressed vmlinuz image from the original vmlinux
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#
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OBJS =
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# Ensure that mmcif loader code appears early in the image
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# to minimise that number of bocks that have to be read in
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# order to load it.
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ifeq ($(CONFIG_ZBOOT_ROM_MMCIF),y)
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ifeq ($(CONFIG_ARCH_SH7372),y)
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OBJS += mmcif-sh7372.o
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endif
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endif
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AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
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HEAD = head.o
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OBJS = misc.o decompress.o
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OBJS += misc.o decompress.o
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FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c
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#
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@ -25,6 +25,36 @@
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/* load board-specific initialization code */
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#include <mach/zboot.h>
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#ifdef CONFIG_ZBOOT_ROM_MMCIF
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/* Load image from MMC */
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adr sp, __tmp_stack + 128
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ldr r0, __image_start
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ldr r1, __image_end
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subs r1, r1, r0
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ldr r0, __load_base
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bl mmcif_loader
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/* Jump to loaded code */
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ldr r0, __loaded
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ldr r1, __image_start
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sub r0, r0, r1
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ldr r1, __load_base
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add pc, r0, r1
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__image_start:
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.long _start
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__image_end:
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.long _got_end
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__load_base:
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.long CONFIG_MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
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__loaded:
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.long __continue
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.align
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__tmp_stack:
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.space 128
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__continue:
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#endif /* CONFIG_ZBOOT_ROM_MMCIF */
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b 1f
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__atags:@ tag #1
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.long 12 @ tag->hdr.size = tag_size(tag_core);
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@ -0,0 +1,87 @@
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/*
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* sh7372 MMCIF loader
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2010 Simon Horman
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/mmc/sh_mmcif.h>
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#include <mach/mmcif.h>
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#define MMCIF_BASE (void __iomem *)0xe6bd0000
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#define PORT84CR (void __iomem *)0xe6050054
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#define PORT85CR (void __iomem *)0xe6050055
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#define PORT86CR (void __iomem *)0xe6050056
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#define PORT87CR (void __iomem *)0xe6050057
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#define PORT88CR (void __iomem *)0xe6050058
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#define PORT89CR (void __iomem *)0xe6050059
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#define PORT90CR (void __iomem *)0xe605005a
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#define PORT91CR (void __iomem *)0xe605005b
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#define PORT92CR (void __iomem *)0xe605005c
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#define PORT99CR (void __iomem *)0xe6050063
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#define SMSTPCR3 (void __iomem *)0xe615013c
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/* SH7372 specific MMCIF loader
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*
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* loads the zImage from an MMC card starting from block 1.
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*
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* The image must be start with a vrl4 header and
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* the zImage must start at offset 512 of the image. That is,
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* at block 2 (=byte 1024) on the media
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*
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* Use the following line to write the vrl4 formated zImage
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* to an MMC card
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* # dd if=vrl4.out of=/dev/sdx bs=512 seek=1
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*/
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asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
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{
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mmcif_init_progress();
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mmcif_update_progress(MMCIF_PROGRESS_ENTER);
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/* Initialise MMC
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* registers: PORT84CR-PORT92CR
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* (MMCD0_0-MMCD0_7,MMCCMD0 Control)
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* value: 0x04 - select function 4
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*/
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__raw_writeb(0x04, PORT84CR);
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__raw_writeb(0x04, PORT85CR);
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__raw_writeb(0x04, PORT86CR);
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__raw_writeb(0x04, PORT87CR);
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__raw_writeb(0x04, PORT88CR);
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__raw_writeb(0x04, PORT89CR);
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__raw_writeb(0x04, PORT90CR);
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__raw_writeb(0x04, PORT91CR);
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__raw_writeb(0x04, PORT92CR);
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/* Initialise MMC
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* registers: PORT99CR (MMCCLK0 Control)
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* value: 0x10 | 0x04 - enable output | select function 4
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*/
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__raw_writeb(0x14, PORT99CR);
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/* Enable clock to MMC hardware block */
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__raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);
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mmcif_update_progress(MMCIF_PROGRESS_INIT);
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/* setup MMCIF hardware */
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sh_mmcif_boot_init(MMCIF_BASE);
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mmcif_update_progress(MMCIF_PROGRESS_LOAD);
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/* load kernel via MMCIF interface */
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sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */
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(len + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, buf);
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/* Disable clock to MMC hardware block */
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__raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);
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mmcif_update_progress(MMCIF_PROGRESS_DONE);
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}
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@ -0,0 +1,29 @@
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#ifndef MMCIF_AP4EB_H
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#define MMCIF_AP4EB_H
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#define PORT185CR (void __iomem *)0xe60520b9
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#define PORT186CR (void __iomem *)0xe60520ba
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#define PORT187CR (void __iomem *)0xe60520bb
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#define PORT188CR (void __iomem *)0xe60520bc
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#define PORTR191_160DR (void __iomem *)0xe6056014
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static inline void mmcif_init_progress(void)
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{
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/* Initialise LEDS1-4
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* registers: PORT185CR-PORT188CR (LED1-LED4 Control)
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* value: 0x10 - enable output
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*/
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__raw_writeb(0x10, PORT185CR);
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__raw_writeb(0x10, PORT186CR);
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__raw_writeb(0x10, PORT187CR);
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__raw_writeb(0x10, PORT188CR);
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}
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static inline void mmcif_update_progress(int n)
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{
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__raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) |
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(1 << (25 + n)), PORTR191_160DR);
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}
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#endif /* MMCIF_AP4EB_H */
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@ -0,0 +1,39 @@
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#ifndef MMCIF_MACKEREL_H
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#define MMCIF_MACKEREL_H
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#define PORT0CR (void __iomem *)0xe6051000
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#define PORT1CR (void __iomem *)0xe6051001
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#define PORT2CR (void __iomem *)0xe6051002
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#define PORT159CR (void __iomem *)0xe605009f
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#define PORTR031_000DR (void __iomem *)0xe6055000
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#define PORTL159_128DR (void __iomem *)0xe6054010
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static inline void mmcif_init_progress(void)
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{
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/* Initialise LEDS0-3
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* registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control)
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* value: 0x10 - enable output
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*/
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__raw_writeb(0x10, PORT0CR);
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__raw_writeb(0x10, PORT1CR);
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__raw_writeb(0x10, PORT2CR);
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__raw_writeb(0x10, PORT159CR);
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}
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static inline void mmcif_update_progress(int n)
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{
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unsigned a = 0, b = 0;
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if (n < 3)
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a = 1 << n;
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else
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b = 1 << 31;
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|
||||
__raw_writel((__raw_readl(PORTR031_000DR) & ~0x7) | a,
|
||||
PORTR031_000DR);
|
||||
__raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b,
|
||||
PORTL159_128DR);
|
||||
}
|
||||
|
||||
#endif /* MMCIF_MACKEREL_H */
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
#ifndef MMCIF_H
|
||||
#define MMCIF_H
|
||||
|
||||
/**************************************************
|
||||
*
|
||||
* board specific settings
|
||||
*
|
||||
**************************************************/
|
||||
|
||||
#ifdef CONFIG_MACH_AP4EVB
|
||||
#include "mach/mmcif-ap4eb.h"
|
||||
#elif CONFIG_MACH_MACKEREL
|
||||
#include "mach/mmcif-mackerel.h"
|
||||
#else
|
||||
#error "unsupported board."
|
||||
#endif
|
||||
|
||||
#endif /* MMCIF_H */
|
||||
Loading…
Reference in New Issue