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mtd: nand: xway: Avoid messing up with IO_ADDR_W in ->cmd_ctrl() 

The ->cmd_ctrl() function is adjusting the ->IO_ADDR_W value depending
on the command type each time NAND_CTRL_CHANGE is passed. This is not
only useless but can lead to an ->IO_ADDR_W corruption.

Get rid of this logic and rely on the NAND_CLE and NAND_ALE flags to
deduce the iomem address to write the cmd argument to.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
hifive-unleashed-5.1
John Crispin 2016-06-20 23:32:09 +02:00 committed by Boris Brezillon
parent 024366750c
commit f45eb7b522
1 changed files with 11 additions and 15 deletions
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26
drivers/mtd/nand/xway_nand.c
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@ -107,22 +107,18 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
unsigned long flags;
if (ctrl & NAND_CTRL_CHANGE) {
nandaddr &= ~(NAND_WRITE_CMD | NAND_WRITE_ADDR);
if (ctrl & NAND_CLE)
nandaddr |= NAND_WRITE_CMD;
else
nandaddr |= NAND_WRITE_ADDR;
this->IO_ADDR_W = (void __iomem *) nandaddr;
}
if (cmd == NAND_CMD_NONE)
return;
if (cmd != NAND_CMD_NONE) {
spin_lock_irqsave(&ebu_lock, flags);
writeb(cmd, this->IO_ADDR_W);
while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
;
spin_unlock_irqrestore(&ebu_lock, flags);
}
spin_lock_irqsave(&ebu_lock, flags);
if (ctrl & NAND_CLE)
writeb(cmd, (void __iomem *) (nandaddr | NAND_WRITE_CMD));
else if (ctrl & NAND_ALE)
writeb(cmd, (void __iomem *) (nandaddr | NAND_WRITE_ADDR));
while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
;
spin_unlock_irqrestore(&ebu_lock, flags);
}
static int xway_dev_ready(struct mtd_info *mtd)