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MIPS: SEAD3: Enable LL/SC.

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All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2013-03-12 16:06:07 +01:00
parent 631b0af98c
commit f4cdb6a00c
1 changed files with 1 additions and 1 deletions
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2
arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
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@ -28,7 +28,7 @@
/* #define cpu_has_prefetch ? */ /* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1 #define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */ /* #define cpu_has_ejtag ? */
#define cpu_has_llsc 0 #define cpu_has_llsc 1
/* #define cpu_has_vtag_icache ? */ /* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */ /* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */ /* #define cpu_has_ic_fills_f_dc ? */