ARM: clk: imx: update pllv3 to support imx7
Add type IMX_PLLV3_ENET_IMX7 Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -24,12 +24,14 @@
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#define BM_PLL_POWER (0x1 << 12)
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#define BM_PLL_LOCK (0x1 << 31)
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#define IMX7_ENET_PLL_POWER (0x1 << 5)
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/**
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* struct clk_pllv3 - IMX PLL clock version 3
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* @clk_hw: clock source
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* @base: base address of PLL registers
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* @powerup_set: set POWER bit to power up the PLL
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* @powerdown: pll powerdown offset bit
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* @div_mask: mask of divider bits
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* @div_shift: shift of divider bits
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*
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@ -40,6 +42,7 @@ struct clk_pllv3 {
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struct clk_hw hw;
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void __iomem *base;
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bool powerup_set;
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u32 powerdown;
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u32 div_mask;
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u32 div_shift;
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};
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@ -49,7 +52,7 @@ struct clk_pllv3 {
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static int clk_pllv3_wait_lock(struct clk_pllv3 *pll)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(10);
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u32 val = readl_relaxed(pll->base) & BM_PLL_POWER;
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u32 val = readl_relaxed(pll->base) & pll->powerdown;
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/* No need to wait for lock when pll is not powered up */
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if ((pll->powerup_set && !val) || (!pll->powerup_set && val))
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@ -293,6 +296,8 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
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if (!pll)
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return ERR_PTR(-ENOMEM);
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pll->powerdown = BM_PLL_POWER;
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switch (type) {
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case IMX_PLLV3_SYS:
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ops = &clk_pllv3_sys_ops;
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@ -306,6 +311,8 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
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case IMX_PLLV3_AV:
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ops = &clk_pllv3_av_ops;
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break;
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case IMX_PLLV3_ENET_IMX7:
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pll->powerdown = IMX7_ENET_PLL_POWER;
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case IMX_PLLV3_ENET:
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ops = &clk_pllv3_enet_ops;
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break;
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@ -39,6 +39,7 @@ enum imx_pllv3_type {
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IMX_PLLV3_USB_VF610,
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IMX_PLLV3_AV,
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IMX_PLLV3_ENET,
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IMX_PLLV3_ENET_IMX7,
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};
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struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
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