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serial: sccnxp: Reset break and overrun bits in RX handler

This patch adds a hardware reset the break and overflow bits for
these events. Without resetting the bits they will be reported to
the core every time, when once occur.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Alexander Shiyan 2013-01-21 19:38:56 +04:00 committed by Greg Kroah-Hartman
parent c098020d03
commit f548b96de6
1 changed files with 6 additions and 1 deletions

View File

@ -305,14 +305,19 @@ static void sccnxp_handle_rx(struct uart_port *port)
if (unlikely(sr)) {
if (sr & SR_BRK) {
port->icount.brk++;
sccnxp_port_write(port, SCCNXP_CR_REG,
CR_CMD_BREAK_RESET);
if (uart_handle_break(port))
continue;
} else if (sr & SR_PE)
port->icount.parity++;
else if (sr & SR_FE)
port->icount.frame++;
else if (sr & SR_OVR)
else if (sr & SR_OVR) {
port->icount.overrun++;
sccnxp_port_write(port, SCCNXP_CR_REG,
CR_CMD_STATUS_RESET);
}
sr &= port->read_status_mask;
if (sr & SR_BRK)