MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt in dev_2_dev
Do not enable interrupt in dev_2_dev with cyclic case, since in such case no any interrupt needed. Otherwise many interrupt will come in every 64 words transfered in ASRC case, which cause heavy system loading. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> (cherry picked from commit f0a3172e1ceb04c46377160486ad7dc6ee022850)5.4-rM2-2.2.x-imx-squashed
parent
5b2c91a75e
commit
f55fd6f075
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@ -560,6 +560,7 @@ static struct dma_async_tx_descriptor *fsl_edma3_prep_dma_cyclic(
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int sg_len, i;
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u32 src_addr, dst_addr, last_sg, nbytes;
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u16 soff, doff, iter;
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bool major_int = true;
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sg_len = buf_len / period_len;
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fsl_desc = fsl_edma3_alloc_desc(fsl_chan, sg_len);
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@ -600,11 +601,12 @@ static struct dma_async_tx_descriptor *fsl_edma3_prep_dma_cyclic(
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dst_addr = fsl_chan->fsc.dev_addr;
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soff = 0;
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doff = 0;
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major_int = false;
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}
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fsl_edma3_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr,
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dst_addr, fsl_chan->fsc.attr, soff, nbytes, 0,
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iter, iter, doff, last_sg, true, false, true);
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iter, iter, doff, last_sg, major_int, false, true);
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dma_buf_next += period_len;
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}
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