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MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt in dev_2_dev

Do not enable interrupt in dev_2_dev with cyclic case, since in such
case no any interrupt needed. Otherwise many interrupt will come in
every 64 words transfered in ASRC case, which cause heavy system
loading.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f0a3172e1ceb04c46377160486ad7dc6ee022850)
5.4-rM2-2.2.x-imx-squashed
Robin Gong 2019-10-23 00:33:42 +08:00 committed by Dong Aisheng
parent 5b2c91a75e
commit f55fd6f075
1 changed files with 3 additions and 1 deletions

View File

@ -560,6 +560,7 @@ static struct dma_async_tx_descriptor *fsl_edma3_prep_dma_cyclic(
int sg_len, i;
u32 src_addr, dst_addr, last_sg, nbytes;
u16 soff, doff, iter;
bool major_int = true;
sg_len = buf_len / period_len;
fsl_desc = fsl_edma3_alloc_desc(fsl_chan, sg_len);
@ -600,11 +601,12 @@ static struct dma_async_tx_descriptor *fsl_edma3_prep_dma_cyclic(
dst_addr = fsl_chan->fsc.dev_addr;
soff = 0;
doff = 0;
major_int = false;
}
fsl_edma3_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr,
dst_addr, fsl_chan->fsc.attr, soff, nbytes, 0,
iter, iter, doff, last_sg, true, false, true);
iter, iter, doff, last_sg, major_int, false, true);
dma_buf_next += period_len;
}