ASoC: tlv320dac33: FIFO caused delay reporting
Delay reporting for the three implemented DAC33 FIFO modes. DAC33 has FIFO depth status register(s), but it can not be used, since inside of pcm_pointer we can not send I2C commands. Timestamp based estimation need to be used. The method of calculating the delay depends on the active FIFO mode. Bypass mode: FIFO is bypassed, report 0 as delay Mode1: nSample fill mode. In this mode I need to use two timestamp ts1: taken when the interrupt has been received ts2: taken before writing to nSample register. Interrupts are coming when DAC33 FIFO depth goes under alarm threshold. Phase1: when we received the alarm threshold, but our workqueue has not been executed (safeguard phase). Just count the played out samples since ts1 and subtract it from the alarm threshold value. Phase2: During nSample burst (after writing to nSample register), count the played out samples since ts1, count the samples received since ts2 (in a burst). Estimate the FIFO depth using these and alarm threshold value. Phase3: Draining phase (after the burst read), count the played out samples since ts1. Estimate the FIFO depth using the nSample configuration and the alarm threshold value. Mode7: Threshold based fill mode. In this mode one timestamp is enough. ts1: taken when the interrupt has been received Interrupts are coming when DAC33 FIFO depth reaches upper threshold. Phase1: Draining phase (after the burst), counting the played out samples since ts1, and subtract it from the upper threshold value. Phase2: During burst operation. Using the pre calculated time needed to play out samples from the buffer during the drain period (from upper to lower threshold), move the time window to cover the estimated time from the burst start to the current time. Calculate the samples played out since lower threshold and also the samples received during the same time. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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@ -55,6 +55,13 @@
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#define BURST_BASEFREQ_HZ 49152000
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#define SAMPLES_TO_US(rate, samples) \
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(1000000000 / ((rate * 1000) / samples))
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#define US_TO_SAMPLES(rate, us) \
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(rate / (1000000 / us))
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static struct snd_soc_codec *tlv320dac33_codec;
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enum dac33_state {
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@ -101,6 +108,14 @@ struct tlv320dac33_priv {
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int keep_bclk; /* Keep the BCLK continuously running
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* in FIFO modes */
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spinlock_t lock;
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unsigned long long t_stamp1; /* Time stamp for FIFO modes to */
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unsigned long long t_stamp2; /* calculate the FIFO caused delay */
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unsigned int mode1_us_burst; /* Time to burst read n number of
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* samples */
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unsigned int mode7_us_to_lthr; /* Time to reach lthr from uthr */
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enum dac33_state state;
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};
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@ -390,10 +405,14 @@ static int dac33_set_nsample(struct snd_kcontrol *kcontrol,
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return 0;
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if (ucontrol->value.integer.value[0] < dac33->nsample_min ||
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ucontrol->value.integer.value[0] > dac33->nsample_max)
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ucontrol->value.integer.value[0] > dac33->nsample_max) {
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ret = -EINVAL;
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else
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} else {
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dac33->nsample = ucontrol->value.integer.value[0];
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/* Re calculate the burst time */
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dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
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dac33->nsample);
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}
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return ret;
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}
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@ -564,6 +583,13 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
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case DAC33_FIFO_MODE1:
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dac33_write16(codec, DAC33_NSAMPLE_MSB,
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DAC33_THRREG(dac33->nsample + dac33->alarm_threshold));
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/* Take the timestamps */
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spin_lock_irq(&dac33->lock);
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dac33->t_stamp2 = ktime_to_us(ktime_get());
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dac33->t_stamp1 = dac33->t_stamp2;
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spin_unlock_irq(&dac33->lock);
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dac33_write16(codec, DAC33_PREFILL_MSB,
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DAC33_THRREG(dac33->alarm_threshold));
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/* Enable Alarm Threshold IRQ with a delay */
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@ -572,8 +598,18 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
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dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
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break;
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case DAC33_FIFO_MODE7:
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/* Take the timestamp */
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spin_lock_irq(&dac33->lock);
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dac33->t_stamp1 = ktime_to_us(ktime_get());
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/* Move back the timestamp with drain time */
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dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
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spin_unlock_irq(&dac33->lock);
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dac33_write16(codec, DAC33_PREFILL_MSB,
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DAC33_THRREG(MODE7_LTHR));
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/* Enable Upper Threshold IRQ */
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dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
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break;
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default:
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dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
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@ -590,6 +626,11 @@ static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
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switch (dac33->fifo_mode) {
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case DAC33_FIFO_MODE1:
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/* Take the timestamp */
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spin_lock_irq(&dac33->lock);
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dac33->t_stamp2 = ktime_to_us(ktime_get());
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spin_unlock_irq(&dac33->lock);
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dac33_write16(codec, DAC33_NSAMPLE_MSB,
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DAC33_THRREG(dac33->nsample));
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break;
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@ -642,7 +683,13 @@ static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
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struct snd_soc_codec *codec = dev;
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struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
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queue_work(dac33->dac33_wq, &dac33->work);
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spin_lock(&dac33->lock);
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dac33->t_stamp1 = ktime_to_us(ktime_get());
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spin_unlock(&dac33->lock);
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/* Do not schedule the workqueue in Mode7 */
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if (dac33->fifo_mode != DAC33_FIFO_MODE7)
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queue_work(dac33->dac33_wq, &dac33->work);
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return IRQ_HANDLED;
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}
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@ -794,8 +841,8 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
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DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
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break;
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case DAC33_FIFO_MODE7:
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/* Disable all interrupts */
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dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
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dac33_write(codec, DAC33_FIFO_IRQ_MODE_A,
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DAC33_UTM(DAC33_FIFO_IRQ_MODE_LEVEL));
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break;
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default:
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/* in FIFO bypass mode, the interrupts are not used */
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@ -930,6 +977,24 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream)
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if (dac33->nsample > dac33->nsample_max)
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dac33->nsample = dac33->nsample_max;
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switch (dac33->fifo_mode) {
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case DAC33_FIFO_MODE1:
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dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
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dac33->nsample);
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dac33->t_stamp1 = 0;
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dac33->t_stamp2 = 0;
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break;
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case DAC33_FIFO_MODE7:
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dac33->mode7_us_to_lthr =
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SAMPLES_TO_US(substream->runtime->rate,
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MODE7_UTHR - MODE7_LTHR + 1);
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dac33->t_stamp1 = 0;
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break;
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default:
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break;
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}
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}
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static int dac33_pcm_prepare(struct snd_pcm_substream *substream,
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@ -974,6 +1039,151 @@ static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
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return ret;
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}
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static snd_pcm_sframes_t dac33_dai_delay(
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struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_device *socdev = rtd->socdev;
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struct snd_soc_codec *codec = socdev->card->codec;
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struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
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unsigned long long t0, t1, t_now;
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unsigned int time_delta;
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int samples_out, samples_in, samples;
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snd_pcm_sframes_t delay = 0;
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switch (dac33->fifo_mode) {
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case DAC33_FIFO_BYPASS:
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break;
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case DAC33_FIFO_MODE1:
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spin_lock(&dac33->lock);
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t0 = dac33->t_stamp1;
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t1 = dac33->t_stamp2;
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spin_unlock(&dac33->lock);
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t_now = ktime_to_us(ktime_get());
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/* We have not started to fill the FIFO yet, delay is 0 */
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if (!t1)
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goto out;
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if (t0 > t1) {
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/*
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* Phase 1:
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* After Alarm threshold, and before nSample write
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*/
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time_delta = t_now - t0;
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samples_out = time_delta ? US_TO_SAMPLES(
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substream->runtime->rate,
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time_delta) : 0;
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if (likely(dac33->alarm_threshold > samples_out))
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delay = dac33->alarm_threshold - samples_out;
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else
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delay = 0;
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} else if ((t_now - t1) <= dac33->mode1_us_burst) {
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/*
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* Phase 2:
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* After nSample write (during burst operation)
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*/
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time_delta = t_now - t0;
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samples_out = time_delta ? US_TO_SAMPLES(
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substream->runtime->rate,
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time_delta) : 0;
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time_delta = t_now - t1;
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samples_in = time_delta ? US_TO_SAMPLES(
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dac33->burst_rate,
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time_delta) : 0;
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samples = dac33->alarm_threshold;
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samples += (samples_in - samples_out);
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if (likely(samples > 0))
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delay = samples;
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else
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delay = 0;
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} else {
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/*
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* Phase 3:
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* After burst operation, before next alarm threshold
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*/
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time_delta = t_now - t0;
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samples_out = time_delta ? US_TO_SAMPLES(
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substream->runtime->rate,
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time_delta) : 0;
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samples_in = dac33->nsample;
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samples = dac33->alarm_threshold;
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samples += (samples_in - samples_out);
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if (likely(samples > 0))
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delay = samples > DAC33_BUFFER_SIZE_SAMPLES ?
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DAC33_BUFFER_SIZE_SAMPLES : samples;
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else
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delay = 0;
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}
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break;
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case DAC33_FIFO_MODE7:
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spin_lock(&dac33->lock);
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t0 = dac33->t_stamp1;
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spin_unlock(&dac33->lock);
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t_now = ktime_to_us(ktime_get());
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/* We have not started to fill the FIFO yet, delay is 0 */
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if (!t0)
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goto out;
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if (t_now <= t0) {
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/*
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* Either the timestamps are messed or equal. Report
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* maximum delay
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*/
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delay = MODE7_UTHR;
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goto out;
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}
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time_delta = t_now - t0;
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if (time_delta <= dac33->mode7_us_to_lthr) {
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/*
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* Phase 1:
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* After burst (draining phase)
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*/
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samples_out = US_TO_SAMPLES(
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substream->runtime->rate,
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time_delta);
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if (likely(MODE7_UTHR > samples_out))
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delay = MODE7_UTHR - samples_out;
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else
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delay = 0;
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} else {
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/*
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* Phase 2:
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* During burst operation
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*/
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time_delta = time_delta - dac33->mode7_us_to_lthr;
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samples_out = US_TO_SAMPLES(
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substream->runtime->rate,
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time_delta);
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samples_in = US_TO_SAMPLES(
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dac33->burst_rate,
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time_delta);
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delay = MODE7_LTHR + samples_in - samples_out;
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if (unlikely(delay > MODE7_UTHR))
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delay = MODE7_UTHR;
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}
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break;
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default:
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dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
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dac33->fifo_mode);
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break;
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}
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out:
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return delay;
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}
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static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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.hw_params = dac33_hw_params,
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.prepare = dac33_pcm_prepare,
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.trigger = dac33_pcm_trigger,
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.delay = dac33_dai_delay,
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.set_sysclk = dac33_set_dai_sysclk,
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.set_fmt = dac33_set_dai_fmt,
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};
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@ -1225,6 +1436,7 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
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mutex_init(&codec->mutex);
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mutex_init(&dac33->mutex);
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spin_lock_init(&dac33->lock);
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INIT_LIST_HEAD(&codec->dapm_widgets);
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INIT_LIST_HEAD(&codec->dapm_paths);
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