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dt-bindings: misc: Add Tegra186 MISC registers bindings 

The MISC register block found on Tegra186 SoCs contains registers that
can be used to identify a given chip and various strapping options.

Signed-off-by: Thierry Reding <treding@nvidia.com>
hifive-unleashed-5.1
Thierry Reding 2017-06-26 17:33:12 +02:00
parent 4fbd8d194f
commit f580fd3f9d
1 changed files with 12 additions and 0 deletions
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Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt 100644
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NVIDIA Tegra186 MISC register block
The MISC register block found on Tegra186 SoCs contains registers that can be
used to identify a given chip and various strapping options.
Required properties:
- compatible: Must be:
- Tegra186: "nvidia,tegra186-misc"
- reg: Should contain 2 entries: The first entry gives the physical address
and length of the register region which contains revision and debug
features. The second entry specifies the physical address and length
of the register region indicating the strapping options.