ath9k_hw: Remove BTCOEX initvals
The MAX_TXPWR table for BTCOEX is not needed for AR9462. Programming these values to the HW results in undesirable behavior - for example, large number of delimiter/data underruns are seen in AES-CCMP mode. Also, registers like AR_PCU_MISC_MODE2 return 0xdeadbeef after the BTCOEX_MAX power table is programmed to the HW, and frames being transmitted end up being looped back to the RX engine, an example being beacon frames in IBSS mode. Remove this table for now - this fixes CCMP performance and general IBSS usage. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -305,11 +305,6 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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ar9462_common_rx_gain_table_2p0,
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ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
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INIT_INI_ARRAY(&ah->ini_BTCOEX_MAX_TXPWR,
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ar9462_2p0_BTCOEX_MAX_TXPWR_table,
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ARRAY_SIZE(ar9462_2p0_BTCOEX_MAX_TXPWR_table),
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2);
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/* Awake -> Sleep Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdes,
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PCIE_PLL_ON_CREQ_DIS_L1_2P0,
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@ -683,9 +683,6 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
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REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites);
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if (AR_SREV_9462(ah))
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ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
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if (chan->channel == 2484)
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ar9003_hw_prog_ini(ah, &ah->ini_japan2484, 1);
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@ -1448,16 +1448,4 @@ static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
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{0x0000b1fc, 0x00000196},
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};
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static const u32 ar9462_2p0_BTCOEX_MAX_TXPWR_table[][2] = {
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/* Addr allmodes */
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{0x000018c0, 0x10101010},
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{0x000018c4, 0x10101010},
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{0x000018c8, 0x10101010},
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{0x000018cc, 0x10101010},
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{0x000018d0, 0x10101010},
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{0x000018d4, 0x10101010},
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{0x000018d8, 0x10101010},
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{0x000018dc, 0x10101010},
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};
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#endif /* INITVALS_9462_2P0_H */
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