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ARM64: dts: meson-gx: use stable UART bindings with correct gate clock 

This patch switches to the stable UART bindings but also add the correct
gate clock to the non-AO UART nodes for GXBB and GXL SoCs.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
hifive-unleashed-5.1
Helmut Klein 2017-06-21 16:42:11 +02:00 committed by Kevin Hilman
parent 12ada0513d
commit f72d6f6037
3 changed files with 55 additions and 7 deletions
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12
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
View File

@ -225,7 +225,7 @@
};
uart_A: serial@84c0 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
reg = <0x0 0x84c0 0x0 0x14>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
@ -233,7 +233,7 @@
};
uart_B: serial@84dc {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
reg = <0x0 0x84dc 0x0 0x14>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
@ -279,7 +279,7 @@
};
uart_C: serial@8700 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
reg = <0x0 0x8700 0x0 0x14>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
@ -381,18 +381,16 @@
};
uart_AO: serial@4c0 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
reg = <0x0 0x004c0 0x0 0x14>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};
uart_AO_B: serial@4e0 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
reg = <0x0 0x004e0 0x0 0x14>;
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};

25
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
View File

@ -682,6 +682,31 @@
clocks = <&clkc CLKID_SPI>;
};
&uart_A {
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO {
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO_B {
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "core", "baud";
};
&uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "core", "baud";
};
&vpu {
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
};

25
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
View File

@ -623,6 +623,31 @@
clocks = <&clkc CLKID_SPI>;
};
&uart_A {
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
clock-names = "xtal", "core", "baud";
};
&uart_AO {
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO_B {
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "core", "baud";
};
&uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "core", "baud";
};
&vpu {
compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
};