ASoC: Intel: Skylake: Add module configuration helpers
To configure a module, driver needs to send input and output PCM params for a module in DSP. The FE PCM params come from hw_params ie from user, for a BE they also come from hw_params but from BE-link fixups. So based on PCM params required driver has to find a converter module (src/updown/format) and then do the conversion and calculate PCM params in these pipelines In this patch we add the helper modules which allow driver to do these calculations. Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -27,6 +27,10 @@
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#include "skl.h"
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#include "skl-tplg-interface.h"
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#define SKL_CH_FIXUP_MASK (1 << 0)
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#define SKL_RATE_FIXUP_MASK (1 << 1)
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#define SKL_FMT_FIXUP_MASK (1 << 2)
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/*
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* SKL DSP driver modelling uses only few DAPM widgets so for rest we will
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* ignore. This helpers checks if the SKL driver handles this widget type
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@ -119,6 +123,137 @@ skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
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skl->resource.mem -= mconfig->pipe->memory_pages;
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}
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static void skl_dump_mconfig(struct skl_sst *ctx,
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struct skl_module_cfg *mcfg)
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{
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dev_dbg(ctx->dev, "Dumping config\n");
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dev_dbg(ctx->dev, "Input Format:\n");
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dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt.channels);
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dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt.s_freq);
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dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt.ch_cfg);
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dev_dbg(ctx->dev, "valid bit depth = %d\n",
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mcfg->in_fmt.valid_bit_depth);
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dev_dbg(ctx->dev, "Output Format:\n");
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dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt.channels);
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dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt.s_freq);
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dev_dbg(ctx->dev, "valid bit depth = %d\n",
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mcfg->out_fmt.valid_bit_depth);
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dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt.ch_cfg);
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}
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static void skl_tplg_update_params(struct skl_module_fmt *fmt,
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struct skl_pipe_params *params, int fixup)
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{
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if (fixup & SKL_RATE_FIXUP_MASK)
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fmt->s_freq = params->s_freq;
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if (fixup & SKL_CH_FIXUP_MASK)
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fmt->channels = params->ch;
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if (fixup & SKL_FMT_FIXUP_MASK)
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fmt->valid_bit_depth = params->s_fmt;
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}
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/*
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* A pipeline may have modules which impact the pcm parameters, like SRC,
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* channel converter, format converter.
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* We need to calculate the output params by applying the 'fixup'
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* Topology will tell driver which type of fixup is to be applied by
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* supplying the fixup mask, so based on that we calculate the output
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*
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* Now In FE the pcm hw_params is source/target format. Same is applicable
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* for BE with its hw_params invoked.
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* here based on FE, BE pipeline and direction we calculate the input and
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* outfix and then apply that for a module
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*/
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static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
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struct skl_pipe_params *params, bool is_fe)
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{
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int in_fixup, out_fixup;
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struct skl_module_fmt *in_fmt, *out_fmt;
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in_fmt = &m_cfg->in_fmt;
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out_fmt = &m_cfg->out_fmt;
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if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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if (is_fe) {
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in_fixup = m_cfg->params_fixup;
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out_fixup = (~m_cfg->converter) &
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m_cfg->params_fixup;
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} else {
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out_fixup = m_cfg->params_fixup;
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in_fixup = (~m_cfg->converter) &
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m_cfg->params_fixup;
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}
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} else {
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if (is_fe) {
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out_fixup = m_cfg->params_fixup;
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in_fixup = (~m_cfg->converter) &
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m_cfg->params_fixup;
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} else {
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in_fixup = m_cfg->params_fixup;
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out_fixup = (~m_cfg->converter) &
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m_cfg->params_fixup;
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}
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}
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skl_tplg_update_params(in_fmt, params, in_fixup);
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skl_tplg_update_params(out_fmt, params, out_fixup);
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}
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/*
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* A module needs input and output buffers, which are dependent upon pcm
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* params, so once we have calculate params, we need buffer calculation as
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* well.
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*/
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static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
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struct skl_module_cfg *mcfg)
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{
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int multiplier = 1;
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if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
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multiplier = 5;
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mcfg->ibs = (mcfg->in_fmt.s_freq / 1000) *
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(mcfg->in_fmt.channels) *
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(mcfg->in_fmt.bit_depth >> 3) *
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multiplier;
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mcfg->obs = (mcfg->out_fmt.s_freq / 1000) *
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(mcfg->out_fmt.channels) *
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(mcfg->out_fmt.bit_depth >> 3) *
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multiplier;
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}
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static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
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struct skl_sst *ctx)
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{
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struct skl_module_cfg *m_cfg = w->priv;
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struct skl_pipe_params *params = m_cfg->pipe->p_params;
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int p_conn_type = m_cfg->pipe->conn_type;
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bool is_fe;
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if (!m_cfg->params_fixup)
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return;
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dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
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w->name);
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skl_dump_mconfig(ctx, m_cfg);
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if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
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is_fe = true;
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else
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is_fe = false;
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skl_tplg_update_params_fixup(m_cfg, params, is_fe);
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skl_tplg_update_buffer_size(ctx, m_cfg);
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dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
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w->name);
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skl_dump_mconfig(ctx, m_cfg);
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}
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/*
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* A pipe can have multiple modules, each of them will be a DAPM widget as
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* well. While managing a pipeline we need to get the list of all the
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@ -178,6 +313,11 @@ skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
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if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
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return -ENOMEM;
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/*
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* apply fix/conversion to module params based on
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* FE/BE params
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*/
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skl_tplg_update_module_params(w, ctx);
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ret = skl_init_module(ctx, mconfig, NULL);
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if (ret < 0)
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return ret;
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